JPS57192058A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS57192058A
JPS57192058A JP7658181A JP7658181A JPS57192058A JP S57192058 A JPS57192058 A JP S57192058A JP 7658181 A JP7658181 A JP 7658181A JP 7658181 A JP7658181 A JP 7658181A JP S57192058 A JPS57192058 A JP S57192058A
Authority
JP
Japan
Prior art keywords
package
leads
wiring layers
dummy
vicinity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7658181A
Other languages
Japanese (ja)
Inventor
Fumihito Inoue
Kazuo Shimizu
Kazumasa Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP7658181A priority Critical patent/JPS57192058A/en
Publication of JPS57192058A publication Critical patent/JPS57192058A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To enhance the freedom of a mounting layout, by providing dummy leads, whose outer ends are provided in the vicinity of the periphery of a package and which do not play the role of the electric leads and are selected from every several pieces of leads in the package. CONSTITUTION:The dummy leads 6 are positioned at the centers of the sides and four corners of the package 1. The dummy leads do not play the electric role, and are cut at the vicinity of the surface of the package 1. They are not protruded from the part under the lower surface of the package 1 like the other leads 2. They do not contact with wiring layers 4 of a printed board 7. Even through the package 1 is mounted on the printed board 7 and many wiring layers 4 are provided, wiring layers 4 can pass through the parts corresponding to many dummy leads 6 under the periphery of the package 1. Therefore the mounting layout becomes easy.
JP7658181A 1981-05-22 1981-05-22 Semiconductor device Pending JPS57192058A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7658181A JPS57192058A (en) 1981-05-22 1981-05-22 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7658181A JPS57192058A (en) 1981-05-22 1981-05-22 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS57192058A true JPS57192058A (en) 1982-11-26

Family

ID=13609238

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7658181A Pending JPS57192058A (en) 1981-05-22 1981-05-22 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS57192058A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62128551A (en) * 1985-11-29 1987-06-10 Mitsubishi Electric Corp Pin arrangement structure of electronic part
JPH02253647A (en) * 1989-03-28 1990-10-12 Nec Corp Semiconductor case
US5250841A (en) * 1992-04-06 1993-10-05 Motorola, Inc. Semiconductor device with test-only leads
EP0646961A2 (en) * 1993-10-04 1995-04-05 Kabushiki Kaisha Toshiba A lead frame structure and a method for manufacturing a semiconductor package device using the lead frame structure
US5637914A (en) * 1994-05-16 1997-06-10 Hitachi, Ltd. Lead frame and semiconductor device encapsulated by resin
US7936053B2 (en) * 2005-11-17 2011-05-03 Stats Chippac Ltd. Integrated circuit package system with lead structures including a dummy tie bar

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62128551A (en) * 1985-11-29 1987-06-10 Mitsubishi Electric Corp Pin arrangement structure of electronic part
JPH02253647A (en) * 1989-03-28 1990-10-12 Nec Corp Semiconductor case
US5250841A (en) * 1992-04-06 1993-10-05 Motorola, Inc. Semiconductor device with test-only leads
EP0646961A2 (en) * 1993-10-04 1995-04-05 Kabushiki Kaisha Toshiba A lead frame structure and a method for manufacturing a semiconductor package device using the lead frame structure
EP0646961A3 (en) * 1993-10-04 1995-08-30 Toshiba Kk A lead frame structure and a method for manufacturing a semiconductor package device using the lead frame structure.
US5637914A (en) * 1994-05-16 1997-06-10 Hitachi, Ltd. Lead frame and semiconductor device encapsulated by resin
US7936053B2 (en) * 2005-11-17 2011-05-03 Stats Chippac Ltd. Integrated circuit package system with lead structures including a dummy tie bar

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