JP4099673B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP4099673B2 JP4099673B2 JP2004369588A JP2004369588A JP4099673B2 JP 4099673 B2 JP4099673 B2 JP 4099673B2 JP 2004369588 A JP2004369588 A JP 2004369588A JP 2004369588 A JP2004369588 A JP 2004369588A JP 4099673 B2 JP4099673 B2 JP 4099673B2
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- 239000004065 semiconductor Substances 0.000 title claims description 114
- 239000010410 layer Substances 0.000 claims description 124
- 239000002356 single layer Substances 0.000 claims description 2
- 239000011229 interlayer Substances 0.000 description 26
- 230000015572 biosynthetic process Effects 0.000 description 18
- 239000002184 metal Substances 0.000 description 14
- 239000012535 impurity Substances 0.000 description 11
- 230000004048 modification Effects 0.000 description 6
- 238000012986 modification Methods 0.000 description 6
- 238000000034 method Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 230000014759 maintenance of location Effects 0.000 description 2
- 239000004020 conductor Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0216—Coatings
- H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/02162—Coatings for devices characterised by at least one potential jump barrier or surface barrier for filtering or shielding light, e.g. multicolour filters for photodetectors
- H01L31/02164—Coatings for devices characterised by at least one potential jump barrier or surface barrier for filtering or shielding light, e.g. multicolour filters for photodetectors for shielding light, e.g. light blocking layers, cold shields for infrared detectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66825—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a floating gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/10—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the top-view layout
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/60—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the control gate being a doped region, e.g. single-poly memory cell
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1462—Coatings
- H01L27/14623—Optical shielding
Description
本発明の第1の半導体装置は、
半導体層に設けられた半導体素子と、
前記半導体素子の周囲に設けられた遮光壁と、
前記半導体素子に電気的に接続された配線層であって、前記遮光壁の設けられていない開孔から該遮光壁の外側に延伸された配線層と、を含み、
前記配線層は、前記開孔に位置している第1部分と、該開孔の外側に位置し、該配線層の延伸方向と交差する分岐部を有することで該開孔の幅と同一以上の幅を有する第2部分と、を含むパターンを有し、
前記分岐部において、前記遮光壁の外側を向いた面は、その表面に凸部を有する。
本発明の第2の半導体装置は、
半導体層に設けられた半導体素子と、
前記半導体素子の周囲に設けられた遮光壁と、
前記半導体素子に電気的に接続された配線層であって、前記遮光壁の設けられていない開孔から該遮光壁の外側に延伸された配線層と、を含み、
前記配線層は、前記開孔に位置している第1部分と、該開孔の外側に位置し、該配線層の延伸方向と交差する分岐部を有することで該開孔の幅と同一以上の幅を有する第2部分と、を含むパターンを有し、
前記第2部分において、前記遮光壁の外側を向いた面は、凹形状である。
第1の実施の形態の半導体装置について、図1、2を参照しつつ説明する。図1(A)は、本実施の形態にかかる半導体装置を模式的に示す平面図であり、図1(B)は、図1のA部を拡大して示す図であり、図2(A)は、図1(B)のI−I線に沿った断面図であり、図2(B)は、図1(B)のII−II線に沿った断面図であり、図2(C)は、図1(B)のIII−III線に沿った断面図である。
次に、第2の実施の形態について、図3〜図7を参照しつつ説明する。図3、4は、第2の実施の形態の半導体装置において、素子形成領域10Aに設けられる不揮発性メモリセル(以下、「メモリセル」という)を説明するための図であり、図5は、第2の実施の形態にかかる半導体装置を模式的に示す平面図であり、図6(A)は、図5のI−I線に沿った断面を模式的に示す断面図であり、図6(B)は、図5のII−II線に沿った断面図であり、図7は、第2の実施の形態の半導体装置の変形例を示す平面図である。
次に、第2の実施の形態の変形例にかかる半導体装置を、図7を参照しつつ説明する。図7は、変形例にかかる半導体装置を示す平面図であり、図5に対応する平面を示す。
次に、第3の実施の形態にかかる半導体装置について、図8、9を参照しつつ説明する。図8は、第3の実施の形態にかかる半導体装置を模式的に示す平面図であり、図5に対応した平面を示す図である。図9は、図8のA部を拡大して示す平面図である。図8に示すように、第3の実施の形態にかかる半導体装置は、上述の実施の形態にかかる半導体装置と比して第2部分26Bの形状が異なる例である。以下の説明では、上述の実施の形態と共通する構造については、詳細な説明は省略する。
図10は、第4の実施の形態にかかる半導体装置を模式的に示す平面図であり、図9に対応した平面を示す図である。図10に示すように、第4の実施の形態にかかる半導体装置は、上述の実施の形態にかかる半導体装置と比して第2部分の形状が異なる例である。以下の説明では、上述の実施の形態と共通する構造については、詳細な説明は省略する。
図11は、第5の実施の形態にかかる半導体装置を模式的に示す平面図であり、図9に対応した平面を示す図である。図11に示すように、第5の実施の形態にかかる半導体装置は、上述の実施の形態にかかる半導体装置と比して第2部分の形状が異なる例である。以下の説明では、上述の実施の形態と共通する構造については、詳細な説明は省略する。
Claims (6)
- 半導体層に設けられた半導体素子と、
前記半導体素子の周囲に設けられた遮光壁と、
前記半導体素子に電気的に接続された配線層であって、前記遮光壁の設けられていない開孔から該遮光壁の外側に延伸された配線層と、を含み、
前記配線層は、前記開孔に位置している第1部分と、該開孔を除く位置に形成され、該配線層の延伸方向と交差する分岐部を有することで該開孔の幅と同一以上の幅を有する第2部分と、を含むパターンを有し、
前記分岐部の側面のうち光が進入してくる方向を向いた面は、その表面に凸部を有する、半導体装置。 - 請求項1において、
前記凸部は、2つの斜面からなる尖鋭形状を有する、半導体装置。 - 請求項1または2において、
前記凸部は、複数設けられており、
複数の前記凸部は、ライン状に設けられている、半導体装置。 - 請求項1ないし3のいずれかにおいて、
前記半導体素子は、
フローティングゲート電極を有する不揮発性メモリである、半導体装置。 - 請求項4において、
前記不揮発性メモリは、単層ゲート型の不揮発性メモリである、半導体装置。 - 請求項4または5において、
前記配線層は、信号線である、半導体装置。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004369588A JP4099673B2 (ja) | 2004-12-21 | 2004-12-21 | 半導体装置 |
US11/287,710 US7304337B2 (en) | 2004-12-21 | 2005-11-28 | Semiconductor device |
US11/977,333 US7667249B2 (en) | 2004-12-21 | 2007-10-24 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004369588A JP4099673B2 (ja) | 2004-12-21 | 2004-12-21 | 半導体装置 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2008014557A Division JP4735862B2 (ja) | 2008-01-25 | 2008-01-25 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2006179591A JP2006179591A (ja) | 2006-07-06 |
JP4099673B2 true JP4099673B2 (ja) | 2008-06-11 |
Family
ID=36594571
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004369588A Expired - Fee Related JP4099673B2 (ja) | 2004-12-21 | 2004-12-21 | 半導体装置 |
Country Status (2)
Country | Link |
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US (2) | US7304337B2 (ja) |
JP (1) | JP4099673B2 (ja) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8351107B2 (en) * | 2003-11-01 | 2013-01-08 | Olympus Corporation | Spatial light modulator having capacitor |
US8228594B2 (en) * | 2003-11-01 | 2012-07-24 | Silicon Quest Kabushiki-Kaisha | Spatial light modulator with metal layers |
JP2006295046A (ja) * | 2005-04-14 | 2006-10-26 | Seiko Epson Corp | 半導体装置 |
JP4626373B2 (ja) * | 2005-04-14 | 2011-02-09 | セイコーエプソン株式会社 | 半導体装置 |
JP5291972B2 (ja) * | 2008-04-09 | 2013-09-18 | シャープ株式会社 | 半導体記憶装置、表示装置及び機器 |
JP5385564B2 (ja) * | 2008-08-18 | 2014-01-08 | ラピスセミコンダクタ株式会社 | 半導体装置及びその製造方法 |
WO2020239538A1 (en) * | 2019-05-29 | 2020-12-03 | Ams International Ag | Reducing optical cross-talk in optical sensor modules |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63308388A (ja) | 1987-06-10 | 1988-12-15 | Mitsubishi Electric Corp | 半導体記憶装置 |
JPS63310180A (ja) | 1987-06-11 | 1988-12-19 | Mitsubishi Electric Corp | 半導体メモリ装置 |
JP2772020B2 (ja) * | 1989-02-22 | 1998-07-02 | 株式会社東芝 | Mos型半導体装置 |
JP2508288B2 (ja) * | 1989-08-30 | 1996-06-19 | 三菱電機株式会社 | 半導体記憶装置 |
JP3269171B2 (ja) * | 1993-04-08 | 2002-03-25 | セイコーエプソン株式会社 | 半導体装置およびそれを有した時計 |
US6011271A (en) * | 1994-04-28 | 2000-01-04 | Fujitsu Limited | Semiconductor device and method of fabricating the same |
JPH0955459A (ja) * | 1995-06-06 | 1997-02-25 | Seiko Epson Corp | 半導体装置 |
US5811322A (en) * | 1996-07-15 | 1998-09-22 | W. L. Gore & Associates, Inc. | Method of making a broadband backside illuminated MESFET with collecting microlens |
JP4066127B2 (ja) * | 1999-03-25 | 2008-03-26 | セイコーエプソン株式会社 | 半導体装置及びその製造方法、回路基板並びに電子機器。 |
JP2003124363A (ja) | 2001-10-19 | 2003-04-25 | Toshiba Corp | 半導体記憶装置 |
ATE445233T1 (de) * | 2002-01-28 | 2009-10-15 | Nichia Corp | Nitrid-halbleiterbauelement mit einem trägersubstrat und verfahren zu seiner herstellung |
US7280278B2 (en) * | 2004-06-02 | 2007-10-09 | Micron Technology, Inc. | Apparatus and method for manufacturing positive or negative microlenses |
-
2004
- 2004-12-21 JP JP2004369588A patent/JP4099673B2/ja not_active Expired - Fee Related
-
2005
- 2005-11-28 US US11/287,710 patent/US7304337B2/en not_active Expired - Fee Related
-
2007
- 2007-10-24 US US11/977,333 patent/US7667249B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US7667249B2 (en) | 2010-02-23 |
US20060131623A1 (en) | 2006-06-22 |
US7304337B2 (en) | 2007-12-04 |
JP2006179591A (ja) | 2006-07-06 |
US20080067564A1 (en) | 2008-03-20 |
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