FR2585863B1 - Procede et structure pour dispositifs de visualisation a cristaux liquides adresses par matrice et transistors a couche mince. - Google Patents

Procede et structure pour dispositifs de visualisation a cristaux liquides adresses par matrice et transistors a couche mince.

Info

Publication number
FR2585863B1
FR2585863B1 FR868611186A FR8611186A FR2585863B1 FR 2585863 B1 FR2585863 B1 FR 2585863B1 FR 868611186 A FR868611186 A FR 868611186A FR 8611186 A FR8611186 A FR 8611186A FR 2585863 B1 FR2585863 B1 FR 2585863B1
Authority
FR
France
Prior art keywords
liquid crystal
thin film
crystal display
display devices
film transistors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR868611186A
Other languages
English (en)
Other versions
FR2585863A1 (fr
Inventor
Harold George Parks
William Weidman Piper
George Edward Possin
Donald Earl Castleberry
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
General Electric Co
Original Assignee
General Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by General Electric Co filed Critical General Electric Co
Publication of FR2585863A1 publication Critical patent/FR2585863A1/fr
Application granted granted Critical
Publication of FR2585863B1 publication Critical patent/FR2585863B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • H01L29/6675Amorphous silicon or polysilicon transistors
    • H01L29/66765Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45Ohmic electrodes
    • H01L29/456Ohmic electrodes on silicon
    • H01L29/458Ohmic electrodes on silicon for thin film silicon, e.g. source or drain electrode
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2202/00Materials and properties
    • G02F2202/10Materials and properties semiconductor
    • G02F2202/103Materials and properties semiconductor a-Si
FR868611186A 1985-08-02 1986-08-01 Procede et structure pour dispositifs de visualisation a cristaux liquides adresses par matrice et transistors a couche mince. Expired - Fee Related FR2585863B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/761,938 US4933296A (en) 1985-08-02 1985-08-02 N+ amorphous silicon thin film transistors for matrix addressed liquid crystal displays

Publications (2)

Publication Number Publication Date
FR2585863A1 FR2585863A1 (fr) 1987-02-06
FR2585863B1 true FR2585863B1 (fr) 1991-10-25

Family

ID=25063665

Family Applications (1)

Application Number Title Priority Date Filing Date
FR868611186A Expired - Fee Related FR2585863B1 (fr) 1985-08-02 1986-08-01 Procede et structure pour dispositifs de visualisation a cristaux liquides adresses par matrice et transistors a couche mince.

Country Status (5)

Country Link
US (1) US4933296A (fr)
EP (1) EP0211401B1 (fr)
JP (1) JP2637079B2 (fr)
DE (1) DE3636221C2 (fr)
FR (1) FR2585863B1 (fr)

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JP2700277B2 (ja) 1990-06-01 1998-01-19 株式会社半導体エネルギー研究所 薄膜トランジスタの作製方法
US5100816A (en) * 1990-07-20 1992-03-31 Texas Instruments Incorporated Method of forming a field effect transistor on the surface of a substrate
US5930608A (en) 1992-02-21 1999-07-27 Semiconductor Energy Laboratory Co., Ltd. Method of fabricating a thin film transistor in which the channel region of the transistor consists of two portions of differing crystallinity
JP2923700B2 (ja) 1991-03-27 1999-07-26 株式会社半導体エネルギー研究所 半導体装置およびその作製方法
JP3255942B2 (ja) 1991-06-19 2002-02-12 株式会社半導体エネルギー研究所 逆スタガ薄膜トランジスタの作製方法
US5633175A (en) * 1991-12-19 1997-05-27 Hitachi, Ltd. Process for stripping photoresist while producing liquid crystal display device
JP3200639B2 (ja) * 1992-05-19 2001-08-20 カシオ計算機株式会社 薄膜トランジスタパネルの製造方法
DE4310640C1 (de) * 1993-03-31 1994-05-11 Lueder Ernst Verfahren zur Herstellung einer Matrix aus a-Si:H-Dünnschichttransistoren
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JPH0766420A (ja) * 1993-08-31 1995-03-10 Matsushita Electric Ind Co Ltd 薄膜の加工方法
DE4339721C1 (de) * 1993-11-22 1995-02-02 Lueder Ernst Verfahren zur Herstellung einer Matrix aus Dünnschichttransistoren
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JPH08184853A (ja) * 1994-12-27 1996-07-16 Sharp Corp アクティブマトリクス基板の製造方法およびアクティブマトリクス基板
JP3444053B2 (ja) * 1995-10-13 2003-09-08 ソニー株式会社 薄膜半導体装置
KR100195269B1 (ko) * 1995-12-22 1999-06-15 윤종용 액정표시장치의 제조방법
KR100232677B1 (ko) * 1996-04-09 1999-12-01 구본준 박막 트랜지스터의 제조방법 및 그 방법에 의해 제조되는 박막 트랜지스터의 구조
KR100223158B1 (ko) * 1996-06-07 1999-10-15 구자홍 액티브매트릭스기판 및 그 제조방법
US20020184970A1 (en) 2001-12-13 2002-12-12 Wickersham Charles E. Sptutter targets and methods of manufacturing same to reduce particulate emission during sputtering
KR100783304B1 (ko) 2000-05-11 2007-12-10 토소우 에스엠디, 인크 음파 위상 변화 검출을 이용하여 스퍼터 타겟들에서 비파괴 청결도를 평가하는 방법 및 장치
US7087142B2 (en) 2001-04-04 2006-08-08 Tosoh Smd, Inc. Method for determining a critical size of an inclusion in aluminum or aluminum alloy sputtering target
US6623653B2 (en) * 2001-06-12 2003-09-23 Sharp Laboratories Of America, Inc. System and method for etching adjoining layers of silicon and indium tin oxide
JP4349904B2 (ja) 2001-08-09 2009-10-21 トーソー エスエムディー,インク. 寸法と位置によって分類された欠陥の種類による、非破壊的なターゲット清浄度特性決定のための方法と装置
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Also Published As

Publication number Publication date
DE3636221A1 (de) 1988-04-28
EP0211401A2 (fr) 1987-02-25
FR2585863A1 (fr) 1987-02-06
DE3636221C2 (de) 1999-12-16
JPS6272168A (ja) 1987-04-02
EP0211401B1 (fr) 1992-05-06
US4933296A (en) 1990-06-12
JP2637079B2 (ja) 1997-08-06
EP0211401A3 (en) 1988-05-18

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