FR2006784A1 - Procede de fabrication de dispositifs a semi-conducteurs - Google Patents

Procede de fabrication de dispositifs a semi-conducteurs

Info

Publication number
FR2006784A1
FR2006784A1 FR6912881A FR6912881A FR2006784A1 FR 2006784 A1 FR2006784 A1 FR 2006784A1 FR 6912881 A FR6912881 A FR 6912881A FR 6912881 A FR6912881 A FR 6912881A FR 2006784 A1 FR2006784 A1 FR 2006784A1
Authority
FR
France
Prior art keywords
semiconductor devices
manufacturing semiconductor
manufacturing
devices
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR6912881A
Other languages
English (en)
Other versions
FR2006784B1 (fr
Inventor
Thomas Murphy Bernard
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
Western Electric Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co Inc filed Critical Western Electric Co Inc
Publication of FR2006784A1 publication Critical patent/FR2006784A1/fr
Application granted granted Critical
Publication of FR2006784B1 publication Critical patent/FR2006784B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76205—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/03—Diffusion
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/031—Diffusion at an edge
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/114—Nitrides of silicon
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/117—Oxidation, selective
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/911—Differential oxidation and etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Light Receiving Elements (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Thyristors (AREA)
  • Formation Of Insulating Films (AREA)
  • Element Separation (AREA)
FR6912881A 1968-04-23 1969-04-23 Procede de fabrication de dispositifs a semi-conducteurs Granted FR2006784A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US72352968A 1968-04-23 1968-04-23

Publications (2)

Publication Number Publication Date
FR2006784A1 true FR2006784A1 (fr) 1970-01-02
FR2006784B1 FR2006784B1 (fr) 1974-06-14

Family

ID=24906648

Family Applications (1)

Application Number Title Priority Date Filing Date
FR6912881A Granted FR2006784A1 (fr) 1968-04-23 1969-04-23 Procede de fabrication de dispositifs a semi-conducteurs

Country Status (7)

Country Link
US (1) US3649386A (fr)
JP (1) JPS4810906B1 (fr)
BE (1) BE731392A (fr)
DE (1) DE1918845B2 (fr)
FR (1) FR2006784A1 (fr)
GB (1) GB1270697A (fr)
NL (1) NL6903469A (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0006510A1 (fr) * 1978-06-30 1980-01-09 International Business Machines Corporation Procédé de formation de régions adjacentes et dopées différemment dans un substrat de silicium
CN117945336A (zh) * 2024-03-27 2024-04-30 芯联越州集成电路制造（绍兴）有限公司 半导体器件及其制备方法

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5082793A (en) * 1965-09-28 1992-01-21 Li Chou H Method for making solid state device utilizing ion implantation techniques
US6849918B1 (en) * 1965-09-28 2005-02-01 Chou H. Li Miniaturized dielectrically isolated solid state device
US4946800A (en) * 1965-09-28 1990-08-07 Li Chou H Method for making solid-state device utilizing isolation grooves
US6979877B1 (en) * 1965-09-28 2005-12-27 Li Chou H Solid-state device
NL159817B (nl) * 1966-10-05 1979-03-15 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting.
NL7010208A (fr) * 1966-10-05 1972-01-12 Philips Nv
NL153374B (nl) * 1966-10-05 1977-05-16 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting voorzien van een oxydelaag en halfgeleiderinrichting vervaardigd volgens de werkwijze.
NL170348C (nl) * 1970-07-10 1982-10-18 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting, waarbij op een oppervlak van een halfgeleiderlichaam een tegen dotering en tegen thermische oxydatie maskerend masker wordt aangebracht, de door de vensters in het masker vrijgelaten delen van het oppervlak worden onderworpen aan een etsbehandeling voor het vormen van verdiepingen en het halfgeleiderlichaam met het masker wordt onderworpen aan een thermische oxydatiebehandeling voor het vormen van een oxydepatroon dat de verdiepingen althans ten dele opvult.
US3648125A (en) * 1971-02-02 1972-03-07 Fairchild Camera Instr Co Method of fabricating integrated circuits with oxidized isolation and the resulting structure
NL166156C (nl) * 1971-05-22 1981-06-15 Philips Nv Halfgeleiderinrichting bevattende ten minste een op een halfgeleidersubstraatlichaam aangebrachte halfge- leiderlaag met ten minste een isolatiezone, welke een in de halfgeleiderlaag verzonken isolatielaag uit door plaatselijke thermische oxydatie van het half- geleidermateriaal van de halfgeleiderlaag gevormd isolerend materiaal bevat en een werkwijze voor het vervaardigen daarvan.
US3947299A (en) * 1971-05-22 1976-03-30 U.S. Philips Corporation Method of manufacturing semiconductor devices
US3814997A (en) * 1971-06-11 1974-06-04 Hitachi Ltd Semiconductor device suitable for impatt diodes or varactor diodes
FR2160759B1 (fr) * 1971-11-26 1974-05-31 Thomson Csf
JPS556299B2 (fr) * 1972-03-24 1980-02-15
US3784847A (en) * 1972-10-10 1974-01-08 Gen Electric Dielectric strip isolation for jfet or mesfet depletion-mode bucket-brigade circuit
JPS4960484A (fr) * 1972-10-12 1974-06-12
US3858231A (en) * 1973-04-16 1974-12-31 Ibm Dielectrically isolated schottky barrier structure and method of forming the same
JPS5214594B2 (fr) * 1973-10-17 1977-04-22
US4056415A (en) * 1975-08-04 1977-11-01 International Telephone And Telegraph Corporation Method for providing electrical isolating material in selected regions of a semiconductive material
NL188550C (nl) * 1981-07-02 1992-07-16 Suwa Seikosha Kk Werkwijze voor het vervaardigen van een halfgeleidersubstraat.
JPS5814085U (ja) * 1981-07-21 1983-01-28 石川島芝浦機械株式会社 移動農機のハンドル装置
DE3925216A1 (de) * 1989-07-29 1991-01-31 Ver Spezialmoebel Verwalt Rolladen-verschluss fuer moebel oder dgl.
US20060132996A1 (en) * 2004-12-17 2006-06-22 Poulton John W Low-capacitance electro-static discharge protection
FR2953062B1 (fr) * 2009-11-24 2011-12-16 St Microelectronics Tours Sas Diode de protection bidirectionnelle basse tension
US9412879B2 (en) * 2013-07-18 2016-08-09 Texas Instruments Incorporated Integration of the silicon IMPATT diode in an analog technology

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1450846A (fr) * 1964-07-21 1966-06-24 Siemens Ag Composant à semi-conducteurs et son procédé de fabrication

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1450846A (fr) * 1964-07-21 1966-06-24 Siemens Ag Composant à semi-conducteurs et son procédé de fabrication

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
REVUE AMERICAINE JOURNAL OF THE ELECTRO-CHEMICAL SOCIETY VOL. 114, N 9, SEPTEMBRE 1967, "DEPOSITION AND PROPERTIES OF ALUMINIUM, OXIDE OBTAINED BY PYROLYTIC DECOMPOSITION OF AN ALUMINIUM, ALKOXIDE" J.A.ABOAF PAGES 948-952) *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0006510A1 (fr) * 1978-06-30 1980-01-09 International Business Machines Corporation Procédé de formation de régions adjacentes et dopées différemment dans un substrat de silicium
CN117945336A (zh) * 2024-03-27 2024-04-30 芯联越州集成电路制造（绍兴）有限公司 半导体器件及其制备方法

Also Published As

Publication number Publication date
BE731392A (fr) 1969-09-15
FR2006784B1 (fr) 1974-06-14
NL6903469A (fr) 1969-10-27
DE1918845A1 (de) 1970-03-12
US3649386A (en) 1972-03-14
DE1918845B2 (de) 1971-06-16
JPS4810906B1 (fr) 1973-04-09
GB1270697A (en) 1972-04-12

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