DE1918845B2 - Verfahren zur herstellung von halbleiteranordnungen - Google Patents

Verfahren zur herstellung von halbleiteranordnungen

Info

Publication number
DE1918845B2
DE1918845B2 DE19691918845 DE1918845A DE1918845B2 DE 1918845 B2 DE1918845 B2 DE 1918845B2 DE 19691918845 DE19691918845 DE 19691918845 DE 1918845 A DE1918845 A DE 1918845A DE 1918845 B2 DE1918845 B2 DE 1918845B2
Authority
DE
Germany
Prior art keywords
manufacturing semiconductor
semiconductor arrangements
arrangements
manufacturing
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE19691918845
Other languages
English (en)
Other versions
DE1918845A1 (de
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of DE1918845A1 publication Critical patent/DE1918845A1/de
Publication of DE1918845B2 publication Critical patent/DE1918845B2/de
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76205—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/03—Diffusion
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/031—Diffusion at an edge
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/114—Nitrides of silicon
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/117—Oxidation, selective
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/911—Differential oxidation and etching
DE19691918845 1968-04-23 1969-04-14 Verfahren zur herstellung von halbleiteranordnungen Withdrawn DE1918845B2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US72352968A 1968-04-23 1968-04-23

Publications (2)

Publication Number Publication Date
DE1918845A1 DE1918845A1 (de) 1970-03-12
DE1918845B2 true DE1918845B2 (de) 1971-06-16

Family

ID=24906648

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19691918845 Withdrawn DE1918845B2 (de) 1968-04-23 1969-04-14 Verfahren zur herstellung von halbleiteranordnungen

Country Status (7)

Country Link
US (1) US3649386A (de)
JP (1) JPS4810906B1 (de)
BE (1) BE731392A (de)
DE (1) DE1918845B2 (de)
FR (1) FR2006784A1 (de)
GB (1) GB1270697A (de)
NL (1) NL6903469A (de)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4946800A (en) * 1965-09-28 1990-08-07 Li Chou H Method for making solid-state device utilizing isolation grooves
US6979877B1 (en) * 1965-09-28 2005-12-27 Li Chou H Solid-state device
US6849918B1 (en) * 1965-09-28 2005-02-01 Chou H. Li Miniaturized dielectrically isolated solid state device
US5082793A (en) * 1965-09-28 1992-01-21 Li Chou H Method for making solid state device utilizing ion implantation techniques
NL7010208A (de) * 1966-10-05 1972-01-12 Philips Nv
NL153374B (nl) * 1966-10-05 1977-05-16 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting voorzien van een oxydelaag en halfgeleiderinrichting vervaardigd volgens de werkwijze.
NL159817B (nl) * 1966-10-05 1979-03-15 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting.
NL170348C (nl) * 1970-07-10 1982-10-18 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting, waarbij op een oppervlak van een halfgeleiderlichaam een tegen dotering en tegen thermische oxydatie maskerend masker wordt aangebracht, de door de vensters in het masker vrijgelaten delen van het oppervlak worden onderworpen aan een etsbehandeling voor het vormen van verdiepingen en het halfgeleiderlichaam met het masker wordt onderworpen aan een thermische oxydatiebehandeling voor het vormen van een oxydepatroon dat de verdiepingen althans ten dele opvult.
US3648125A (en) * 1971-02-02 1972-03-07 Fairchild Camera Instr Co Method of fabricating integrated circuits with oxidized isolation and the resulting structure
US3947299A (en) * 1971-05-22 1976-03-30 U.S. Philips Corporation Method of manufacturing semiconductor devices
NL166156C (nl) * 1971-05-22 1981-06-15 Philips Nv Halfgeleiderinrichting bevattende ten minste een op een halfgeleidersubstraatlichaam aangebrachte halfge- leiderlaag met ten minste een isolatiezone, welke een in de halfgeleiderlaag verzonken isolatielaag uit door plaatselijke thermische oxydatie van het half- geleidermateriaal van de halfgeleiderlaag gevormd isolerend materiaal bevat en een werkwijze voor het vervaardigen daarvan.
US3814997A (en) * 1971-06-11 1974-06-04 Hitachi Ltd Semiconductor device suitable for impatt diodes or varactor diodes
FR2160759B1 (de) * 1971-11-26 1974-05-31 Thomson Csf
JPS556299B2 (de) * 1972-03-24 1980-02-15
US3784847A (en) * 1972-10-10 1974-01-08 Gen Electric Dielectric strip isolation for jfet or mesfet depletion-mode bucket-brigade circuit
JPS4960484A (de) * 1972-10-12 1974-06-12
US3858231A (en) * 1973-04-16 1974-12-31 Ibm Dielectrically isolated schottky barrier structure and method of forming the same
JPS5214594B2 (de) * 1973-10-17 1977-04-22
US4056415A (en) * 1975-08-04 1977-11-01 International Telephone And Telegraph Corporation Method for providing electrical isolating material in selected regions of a semiconductive material
US4151010A (en) * 1978-06-30 1979-04-24 International Business Machines Corporation Forming adjacent impurity regions in a semiconductor by oxide masking
NL188550C (nl) * 1981-07-02 1992-07-16 Suwa Seikosha Kk Werkwijze voor het vervaardigen van een halfgeleidersubstraat.
JPS5814085U (ja) * 1981-07-21 1983-01-28 石川島芝浦機械株式会社 移動農機のハンドル装置
DE3925216A1 (de) * 1989-07-29 1991-01-31 Ver Spezialmoebel Verwalt Rolladen-verschluss fuer moebel oder dgl.
US20060132996A1 (en) * 2004-12-17 2006-06-22 Poulton John W Low-capacitance electro-static discharge protection
FR2953062B1 (fr) * 2009-11-24 2011-12-16 St Microelectronics Tours Sas Diode de protection bidirectionnelle basse tension
US9412879B2 (en) * 2013-07-18 2016-08-09 Texas Instruments Incorporated Integration of the silicon IMPATT diode in an analog technology

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1450846A (fr) * 1964-07-21 1966-06-24 Siemens Ag Composant à semi-conducteurs et son procédé de fabrication

Also Published As

Publication number Publication date
GB1270697A (en) 1972-04-12
FR2006784A1 (fr) 1970-01-02
FR2006784B1 (de) 1974-06-14
DE1918845A1 (de) 1970-03-12
JPS4810906B1 (de) 1973-04-09
BE731392A (de) 1969-09-15
NL6903469A (de) 1969-10-27
US3649386A (en) 1972-03-14

Similar Documents

Publication Publication Date Title
DE1918845B2 (de) Verfahren zur herstellung von halbleiteranordnungen
AT326468B (de) Verfahren zur herstellung von nahrungsmitteln
CH547826A (de) Verfahren zur herstellung von mercaptosilanen.
AT324101B (de) Verfahren zur herstellung von lebensmitteln
CH486774A (de) Verfahren zur Herstellung von Halbleiterelementen
AT307504B (de) Verfahren zur Herstellung eines Halbleiterbauelementes
CH547819A (de) Verfahren zur herstellung von isothiazolderiavaten.
CH512824A (de) Verfahren zur Herstellung von Halbleitervorrichtungen
CH549010A (de) Verfahren zur herstellung von novenamin.
CH550755A (de) Verfahren zur herstellung von coenzymen.
CH550166A (de) Verfahren zur herstellung von indolderivaten.
AT334977B (de) Verfahren zur herstellung isolierter halbleiterbereiche
CH551991A (de) Verfahren zur herstellung von azacarbazolen.
AT303686B (de) Verfahren zur Herstellung von Halbleiterverbindungen
AT294418B (de) Verfahren zur herstellung von polyolefinen
CH555826A (de) Verfahren zur herstellung von indolderivaten.
CH497792A (de) Verfahren zur Herstellung von Halbleitervorrichtungen
CH555366A (de) Verfahren zur herstellung von 3-aza-a-homo-steroide.
CH493936A (de) Halbleiteranordnung und Verfahren zur Herstellung der Halbleiteranordnung
AT335078B (de) Verfahren zur herstellung von 3beta-hydroxy-5alfa-cardenoliden und -bufadienoliden
CH558980A (de) Verfahren zur herstellung von ferromagnetischem material.
CH557864A (de) Verfahren zur herstellung von verbesserten chrompigmenten.
AT290623B (de) Verfahren zur Herstellung von Halbleitervorrichtungen
CH549613A (de) Verfahren zur herstellung von formgebilden.
DE2032373B2 (de) Verfahren zur herstellung von zellkautschuk

Legal Events

Date Code Title Description
BHN Withdrawal