Classifications

• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
  • H10D62/40—Crystalline structures
  • H10D62/405—Orientations of crystalline planes
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
  • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
  • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
  • H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
  • H10D62/8325—Silicon carbide
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P10/00—Bonding of wafers, substrates or parts of devices
  • H10P10/12—Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates
  • H10P10/128—Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates by direct semiconductor to semiconductor bonding
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P30/00—Ion implantation into wafers, substrates or parts of devices
  • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
  • H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
  • H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
  • H10P30/2042—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors into crystalline silicon carbide
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P30/00—Ion implantation into wafers, substrates or parts of devices
  • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
  • H10P30/21—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically active species
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P30/00—Ion implantation into wafers, substrates or parts of devices
  • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
  • H10P30/22—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping using masks
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P30/00—Ion implantation into wafers, substrates or parts of devices
  • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
  • H10P30/28—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by an annealing step, e.g. for activation of dopants
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
  • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement

Definitions

• the thickness of the first zone is preferably between 0.5 ⁇ m and 3.0 ⁇ m.
• Vbr the breakdown voltage is, and where is.
• the field-free contact zone or field stop zone preferably has a vertical thickness of at most 2 ⁇ m, preferably at most 1 ⁇ m.
• the donor substrate is polytype 4H, 6H or 3C SiC. These polytypes have turned out to be advantageous for the production of semiconductor devices.
• the doping of the first layer provides a constant dopant depth profile or a substantially constant dopant depth profile.
• the plateau is followed by a falling edge, i.e. in the area of the doping depth, the drop in the profile is not vertical or abrupt.
• the doping of the first layer provides a dopant depth profile that descends in steps from the outer surface of the donor substrate facing the ion beam, the steps in a near-surface area of the first layer facing the ion beam being up to 40%, preferably up to 30%, of the Total depth of the first layer are formed.
• the doping of the first layer provides a dopant depth profile that falls continuously from the outer surface of the donor substrate facing the ion beam.
• the predetermined breaking point is preferably in the area of the first layer, particularly preferably in an end area of the first layer close to the predetermined doping depth, with the edge area particularly preferably not being thicker than 1 ⁇ m. In this way, as little doped material as possible remains on the donor substrate after splitting off.
• the predetermined breaking point is in the region of the remaining part of the donor substrate, and after step e) the further step is also carried out of carrying out an ion implantation into the composite substrate from the side facing away from the acceptor substrate. This has the advantage that an active zone can be formed with a greater overall thickness. Due to the superimposition of two different implantations that is made possible in this way, different preferred doping profiles can also be generated or preferred doping profiles can be generated step by step.
• the fission initiating ions are selected from the following: hydrogen (H or H 2 ), helium (He), boron (B).
• a particle dose of the fission-initiating ions is preferably between 1 E15 cm' 2 and 5E17 cm' 2 in each case. With this dose, a safe cleavage is achieved.
• Figure 2 is a schematic view of an energy filter irradiation arrangement for irradiating the donor substrate.
• FIG. 25 schematically shows the cross section of an embodiment of the semiconductor component according to the invention in the form of a vertical superjunction MOSFET.
• An ion beam 10 is generated by a particle accelerator (not shown) and guided into the irradiation chamber 8 . There the energy of the ion beam 10 is spread out by an energy filter 20 and it hits the donor substrate 12 to be irradiated.
• the energy filter 20 can be arranged in a separate vacuum chamber that can be closed with valves within the irradiation chamber 8 or directly adjacent to the irradiation chamber 8.
• FIG. 7 shows the result of the optional step of producing a contact layer 24 in a superficial area of the first layer 21 or applying a contact layer 24 to the surface of the first layer 21 .
• the dopant concentration in the contact layer 24 is preferably at least 100 times, more preferably at least 1,000 times, more preferably at least 10,000 times, even more preferably at least 100,000 times above an average dopant concentration in the rest of the first layer 21 or in the first layer 21
• a particle dose of the fission-initiating ions is preferably between 1 E15 cm' 2 and 5E17 cm' 2 .
• the energy sharpness (AE/E) of the ion beam of the fission-initiating ions is preferably less than 10' 2 , more preferably less than 10' 4 .
• the temperature in the donor substrate 12 remains below 300°C, preferably below 200°C.
• the chuck on which the donor substrate 12 lies is optionally cooled. With these parameters, a doping profile is generated which has a sharp peak (see the Gaussian distribution marked A in FIG. 3).
• the doping of the supplementary doped layer 38 can then be carried out from the side facing away from the acceptor substrate 28 by means of a further ion implantation using an energy filter.
• the statements made above with regard to FIGS. 2 to 6 regarding ion implantation by means of an energy filter apply identically to ion implantation into the supplementary doped layer 38 .
• the thickness of the supplementary doped layer 38 is typically between 3 and 15 ⁇ m. Total thicknesses of the active zone doped by ion implantation of up to 30 ⁇ m are thus obtained.
• the composite substrate 18 can become a finished semiconductor component 50 through further steps, for example through the implantation of further active regions, the production of oxides, the deposition of gate electrodes, contacts, lines or vias, etc.
• all p-doped shielding structures 60 have several common features.
• the shielding structures 60 are not designed to be continuous parallel to the first surface 58, but instead are designed to be periodically interrupted. Due to the distance from the first surface 58, the distances are formed in such a way that the maximum tolerable field strength on the first surface 58 is reliably not exceeded in the “open” areas in blocking operation.
• the shielding structures 60 are connected to the source potential, gate potential or anode potential either directly or via lines (third dimension, not shown).
• the shielding structures 60 are either isolated (apart from the electrical connection) embedded in an n-region or, starting from the first surface 58, they are formed as doped regions with a high aspect ratio.

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• Electrodes Of Semiconductors (AREA)
• Mechanical Treatment Of Semiconductor (AREA)
• Junction Field-Effect Transistors (AREA)
• Recrystallisation Techniques (AREA)
• Crystals, And After-Treatments Of Crystals (AREA)
• Physical Vapour Deposition (AREA)

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• 2021
  • 2021-12-10 WO PCT/EP2021/085296 patent/WO2022128818A1/de not_active Ceased
  • 2021-12-10 US US18/267,872 patent/US20240055472A1/en active Pending
  • 2021-12-10 EP EP21836128.5A patent/EP4264672A1/de active Pending
  • 2021-12-10 JP JP2023535862A patent/JP7724570B2/ja active Active
• 2025
  • 2025-07-29 JP JP2025126662A patent/JP2025156404A/ja active Pending

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