EP3317685A1 - Composant électrique et procédé de réalisation pour réaliser un tel composant électrique - Google Patents

Composant électrique et procédé de réalisation pour réaliser un tel composant électrique

Info

Publication number
EP3317685A1
EP3317685A1 EP16739410.5A EP16739410A EP3317685A1 EP 3317685 A1 EP3317685 A1 EP 3317685A1 EP 16739410 A EP16739410 A EP 16739410A EP 3317685 A1 EP3317685 A1 EP 3317685A1
Authority
EP
European Patent Office
Prior art keywords
package
electrical component
connection
encapsulation material
component according
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP16739410.5A
Other languages
German (de)
English (en)
Inventor
Georg Stute
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TE Connectivity Sensors Germany GmbH
Original Assignee
TE Connectivity Sensors Germany GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TE Connectivity Sensors Germany GmbH filed Critical TE Connectivity Sensors Germany GmbH
Publication of EP3317685A1 publication Critical patent/EP3317685A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R33/00—Arrangements or instruments for measuring magnetic variables
    • G01R33/0047—Housings or packaging of magnetic sensors ; Holders
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01D—MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
    • G01D11/00—Component parts of measuring arrangements not specially adapted for a specific variable
    • G01D11/24—Housings ; Casings for instruments
    • G01D11/245—Housings for sensors
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R33/00—Arrangements or instruments for measuring magnetic variables
    • G01R33/02—Measuring direction or magnitude of magnetic fields or magnetic flux
    • G01R33/022—Measuring gradient
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
    • H01L25/105—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R33/00—Arrangements or instruments for measuring magnetic variables
    • G01R33/02—Measuring direction or magnitude of magnetic fields or magnetic flux
    • G01R33/06—Measuring direction or magnitude of magnetic fields or magnetic flux using galvano-magnetic devices
    • G01R33/09—Magnetoresistive devices
    • G01R33/096—Magnetoresistive devices anisotropic magnetoresistance sensors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06555—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
    • H01L2225/06558—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking the devices having passive surfaces facing each other, i.e. in a back-to-back arrangement
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
    • H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
    • H01L2225/1047—Details of electrical connections between containers
    • H01L2225/1064—Electrical connections provided on a side surface of one or more of the containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame

Definitions

  • the invention relates to a semiconductor package having a first package with a first leadframe and a chip and encapsulation material attached to the first leadframe encapsulating the chip and at least portions of the leadframe.
  • the invention relates to a manufacturing method for producing such an electrical component and an electrical component having an electrical component.
  • Semiconductor packages are used in many applications. They have a lead frame and a chip attached to the lead frame.
  • An encapsulation material encapsulates the chip and at least parts of the leadframe, most of the outbound electrical leads, throughout the leadframe of the semiconductor package.
  • the sheath of a chip (often referred to as "the” in English), including the connection points, such as leads, pins or balls, can be referred to as housing or package
  • the connection points such as leads, pins or balls
  • housing or package For such packages, there have been standardization efforts, for example by the JEDEC (formerly Joint Electron Device Engineering Council, now JEDEC Solid State Technology Association.) Packages are commonly used between THROUGH THROUGH THONG THERMAL THERMAL THERMAL THERMAL THERMAL THERMAL THERMAL THERMAL AND THERMAL MOUNTED THERMAL MOUNTING (THERMALLY MOUNTED THERMAL THERMAL THERMAL TECHNOLOGY)
  • the packages are typically used to attach the chip to a printed circuit board.
  • the chip is connected to an intermediate material (also referred to here as leadframe or "lead frame") Electrical connections, for example wires, lead from the electrical connections of the chip to electrical connections of the package.
  • These electrical connections can be leads, pins or balls.
  • the present invention seeks to provide an electrical component that can be easily connected to a circuit board.
  • the invention has for its object to propose a manufacturing method with which such a component can be produced particularly easily.
  • the invention is based on the basic idea of taking two packages and firmly connecting the encapsulation material of the first package with the encapsulation material of the second package. This creates an electrical component formed from at least two packages. It has been found that such an electrical component can be connected to a printed circuit board particularly well. This applies in particular to the preferred embodiment, in which the electrical component is to be connected to a narrow side of the first package with a circuit board.
  • the electrical component according to the invention has a first package with a first leadframe, a chip attached to the first leadframe, and encapsulation material comprising the chip and at least parts of the leadframe encapsulates.
  • the package is designed as a Surface Mounted Device (SMD).
  • SMD Surface Mounted Device
  • the first package and / or the second package is a DFN (Dual Fiat No-Iead Package), QFN (Quad Fiat No Leads Package),
  • VCC Very Thin Quad Fiat pack
  • LCC Long Term Evolution Chip Carrier
  • LGA MLPQ Micro Leadframe Package Quad
  • MLPM Micro Leadframe Package Micro
  • MLPD Micro Leadframe Package Dual
  • DRMLF Double Row Micro Leadframe Package
  • TDFN Thin Dual Fiat No-Iead Package
  • XDFN eXtreme thin Dual Fiat No-Iead Package
  • QFN Quant Fiat No-Iead Package
  • QFN-TEP Quantad Fiat No-Iead Package with Top Exposed Ped
  • TQFN Thin Quad Fiat No-Iead Package
  • VQFN Very Thin Quad Fiat No Leads Package
  • the first package and the second package are designed according to the same design.
  • the extent to which the encapsulating material encapsulates the chip and the leadframe results from the aforementioned types of construction. Often the chip and the entire lead frame
  • the second package is empty, ie has no chip arranged in the package.
  • the second package is essentially used to stably connect the first package with the chip arranged in the encapsulation material to the printed circuit board, in particular if the package is connected to the printed circuit board perpendicular to the usual type and not lying down shall be.
  • Packages can now be produced on a large industrial scale. The disadvantages of adding a second (empty) package are offset by the advantages of more stably connecting the first package to the PCB.
  • the second package has a chip attached to the second leadframe. The encapsulating material of the second package encapsulates the chip and at least portions of the leadframe of the second package.
  • the chip in the second package may be identical or similar to the chip in the first package, ie, for example, have sensors with the same measurement principle. However, embodiments are also conceivable in which the chip in the second package is different from the chip in the first package. As a result, a stably connectable to the circuit board electrical component is created, which can take over a plurality of functions. If the chips are designed as measuring sensors, then an electrical component can be created in this way, which can measure with two different measuring methods. With The chip in the first package can be a first measurement method and the chip in the second package a second measurement method can be realized. Furthermore, in the second package passive supporting components such as support magnets can be installed or active components such as coils that support the measurement principle
  • the encapsulating material of the first package is fixedly connected to the encapsulating material of the second package.
  • Electrical components of the type according to the invention are often handled by gripping arms with suction pipette or the like. For this it is essential that the electrical component is stable in itself.
  • Encapsulation material of the second package can be made non-positively or positively.
  • the encapsulation material of the first package is therefore connected by means of joining with the encapsulation material of the second package.
  • the encapsulating material of the first package is bonded to the encapsulating material of the second package.
  • friction welding or ultrasonic welding for joining the encapsulating material is also conceivable.
  • connection surfaces of the encapsulating material of the second package are connected by joining.
  • the connection surfaces are profiled, for example, be roughened or provided with sawtooth profiles to support the mating connection.
  • the connection surfaces are planar.
  • a first planar connection surface is formed on the encapsulating material of the first package
  • a second planar connection surface is formed on the encapsulating material of the second package
  • the first planar connection surface is joined to the second planar connection surface by joining.
  • the leadframe has a flat receiving surface to which the chip is attached.
  • the chip is on a flat receiving surface of the first lead frame attached to the first lead frame and the first planar connection surface parallel to the receiving surface of the first lead frame executed.
  • the second leadframe on a flat receiving surface for a chip, wherein the second planar connection surface is parallel to the receiving surface of the second leadframe is executed. Even with the parallel arrangement of the connection surfaces to the receiving surfaces of the lead frame, the height of the electrical component can be reduced.
  • the majority of known from the prior art, in particular the majority of standardized packages have a substantially cuboid shape. Often, the four side surfaces of the cuboid are smaller than the surface of the top of the cuboid. In a particularly preferred embodiment, to form the electrical component according to the invention, these upper sides of cuboid packages are firmly connected to one another. The tops of the cuboid packages then each form the planar connection surfaces of the respective package.
  • the first package has externally accessible electrical connections. Additionally or alternatively, the second package has externally accessible electrical connections. If packages with standardized designs are used for the production of the electrical component according to the invention, the arrangement of the electrical connections of the first package and of the second package results from this standardized design. Particularly preferably, a design of the type DFN or TDFN is used as the first package and as the second package.
  • the first package is cuboidal.
  • the second package may be configured cuboid.
  • the electrical component itself is cuboidal. This can result from the fact that both the first package and the second package are cuboid, so that after the joining of the two packages, the resulting electrical component is also cuboid.
  • the execution of the first package, or the second package as a cuboid component simplifies both the handling of the packages in producing the electrical component according to the invention. Further, as stated above, the cuboid shape provides good bonding surfaces by which the first package and the second package can be firmly joined together.
  • Cuboid components have twelve edges. They have an upper side and a lower side and four side surfaces arranged at right angles to one another and arranged at right angles to the upper side and the lower side.
  • a side surface has four edges, namely an edge to the bottom, an edge to the top and a first edge to a first further side surface and a second edge to a second, the first oppositely disposed further side surface.
  • an electrical connection is formed in the region of one of these four edges of a side surface.
  • the port has a mating surface that is partially in the surface of this page.
  • connection forms part of an edge. That is, a part of the edge is formed on the electric terminal.
  • the electrical connection can then have a partial surface which is located in the surface of the page as well as a further partial surface located in the adjacent surface, ie depending on the position of the edge in the surface of the underside, the surface of the upper side or in the surface of a the adjacent other pages is located.
  • electrical connections of the first package are in the region of a first edge of this side and in the region of a second edge, wherein the first edge and the second edge are arranged at right angles to each other.
  • the first package has electrical connections only at these two edges.
  • the first package has electrical connections in the region of three edges of this side surface, wherein the three edges merge into one another and are arranged at right angles to one another.
  • the first package has connections only at these three edges.
  • the second package has electrical connections which are arranged on the edges of the cuboid forming the second package in the preferred embodiment, comparable to the first package.
  • Particularly preferred is a design in which the electrical component is cuboid-shaped and has on at least one side neither electrical connections of the first package nor electrical connections of the second package.
  • Such a connection-free side of the electrical component is advantageous if the chip has a sensor in the first package, for example a sensor sensitive to magnetic fields. If one side of the electrical component is executed connection-free, then disturbing influences are prevented at least on this side.
  • the electrical component is designed to be symmetrical, at least with regard to the lead frames and the shape of the encapsulation material.
  • a first planar connection surface is formed on the encapsulant of the first package
  • a second planar connection surface is formed on the encapsulation material of the second package, the first planar connection surface being joined to the second planar connection surface, the lead frame and the encapsulation material of the first package with respect to the plane parallel to the first connection surface and the second connection surface, located centrally between the first connection surface and the second connection surface, are mirror-symmetrical to the lead frame and the encapsulation material of the second package.
  • the symmetrical forming of the electrical component offers the advantage of being able to handle it well.
  • the chip has a magnetic field-sensitive sensor.
  • the chip has a magnetoresistive sensor.
  • the sensor may have the anisotropic magnetoresistive effect (AMR effect) or the gigantic magnetoresistive effect (GMR effect).
  • AMR effect anisotropic magnetoresistive effect
  • GMR effect gigantic magnetoresistive effect
  • the sensor may also have other effects, such as Giant Magneto Impedance (GMI), Tunnel Magnetoresistance Effect (TMR) or the Hall effect or all sensors whose direction of measurement is in the Z axis.
  • Giant Magneto Impedance GMI
  • TMR Tunnel Magnetoresistance Effect
  • the magnetic-field-sensitive sensor contains at least one Wheatstone bridge. This consists in particular of several locally distributed over the chip sensor elements (in particular a plurality of locally distributed over the chip resistors). In a preferred embodiment, these are interconnected in such a way that local field direction or field strength differences between the individual sensor elements which are generated by a transmitter magnet arrangement are used to generate a sensor signal dependent on a transmitter position or a sensor angle relative to the sensor.
  • the electrical component has a plurality of magnetic field-sensitive sensors.
  • a plurality of magnetic field-sensitive sensors are provided in one of the packages.
  • at least one magnetic field-sensitive sensor is provided in each package.
  • the magnetic field-sensitive sensor may be similar sensor chips, in particular preferably have an identical structure. As a result, for example, redundant measurements can be performed and thus the precision of the generated signal can be increased.
  • at least two different magnetic field-sensitive sensors are provided. These can be designed for the detection of the fields of different encoders or locally different encoder structures, in particular a sensor chip, which determines a position or an angle by an incremental measurement, and a second sensor chip, which detects a magnetic reference mark.
  • a device for sensor signal processing or evaluation is provided either in the same package as the magnetic field-sensitive sensor or in the second package.
  • the manufacturing method according to the invention for producing an electrical component according to the invention provides that the encapsulation material of the first package is firmly connected to the encapsulation material of the second package.
  • first frame including a plurality of leadframes, wherein the chip is attached to at least one first leadframe and at least the first chip and at least a portion of the first leadframe are encapsulated by an encapsulation material and a first connection surface is formed on the encapsulation material;
  • a second frame including a plurality of lead frames, wherein at least a part of a lead frame of the second frame is encapsulated by an encapsulating material and the second encapsulation surface is formed on the encapsulating material,
  • the frames containing the plurality of leadframes have guides.
  • the frames may have holes at suitable locations, with which they can be plugged onto pins.
  • the guides on the respective frame can be ensured when connecting the two frames that the two frames are brought together exactly in the relative position to each other, as desired for the creation of the electrical component according to the invention.
  • the provision of the first frame takes place in that the first frame having a guide is pushed onto a guide element, for example, is pushed onto a pin with holes provided in it. Subsequently, in a preferred embodiment, adhesive is applied to the first bonding surfaces of the first bonding surfaces
  • the second frame with the connecting surfaces of the first packages facing connecting surfaces of the united in the second frame second packages with the provided in the second frame guide is pushed onto the guide means and also brought into contact with the adhesive.
  • the first packages and the second packages are pressed against each other during the curing of the adhesive.
  • the individual electrical components are separated out of this sandwich, for example by means of sawing.
  • the electrical components are tested at the end of the production.
  • the electrical component according to the invention has a printed circuit board and an electrical component connected to the printed circuit board. The connection of the electric
  • Component with the circuit board is particularly preferably via the connection of provided on the electrical component electrical connections with electrical connections to the circuit board.
  • the connection of the terminals by means of soldering (eg reflow soldering).
  • the printed circuit board is particularly preferably a solid printed circuit board. It can be made of fiber-reinforced plastic. However, it is also possible to use printed circuit boards made of Teflon, aluminum oxide, ceramic or flexible printed circuit boards, for example those made of polyester film, rigid-flex boards.
  • Fig. 1 a perspective view of an electrical according to the invention
  • FIG. 2 shows a first side view of a component according to the invention
  • FIG. 3 shows a plan view of a component according to the invention
  • Fig. 5 another perspective view of an inventive
  • Component; 7 shows a perspective view of a first frame which is used in the production method according to the invention
  • FIG. 8 shows the first frame according to FIG. 7 with adhesive applied to the connecting surfaces
  • FIG. 9 shows the first frame with adhesive applied to it according to FIG. 8 and a second second frame placed upside down on the first frame;
  • FIG. 10 the use of the component according to the invention as a path length sensor in a perspective plan view;
  • FIG. 11 shows the use of the component according to the invention as a path length sensor in a perspective plan view
  • Fig. 13 a schematic representation of the structure of a magnetic field-sensitive sensor which is installed in the electrical component
  • Fig. 14 a schematic representation of the structure of two magnetic field-sensitive sensors that can be installed in different packages of the electrical component.
  • the electrical component 1 according to the invention shown in FIGS. 1 to 5 has a first package 2 and a second package 3.
  • the first package 2 has a first leadframe 4. At the first lead frame a not shown in the figures chip is attached.
  • the first package includes encapsulation material 5 encapsulating the chip and at least portions of the leadframe 4.
  • the second package 3 likewise has a connection frame 6, referred to here as a second connection frame.
  • the second package 3 Encapsulation material 7, which encapsulates at least parts of the lead frame 6.
  • Both the first package 2 and the second package 3 have a standardized design of a package, namely are designed as TDFN (Thin Dual Fiat no-Iead Package).
  • the first package has an underside 8 visible in the view of FIG. 2, an upper side 9 lying opposite the underside 8 and side surfaces 10, 11, 12, 13 connecting the upper side 9 and the lower side 8.
  • the second package 3 has a comparable construction and has comparable surfaces.
  • the surface 9 of the first package forms a first, planar connection surface.
  • the comparable surface of the second package 3 forms a second, planar connecting surface.
  • the encapsulation material 5 of the first package 2 is firmly connected to the encapsulation material 7 of the second package 3.
  • the first planar connection surface is glued to the second planar connection surface.
  • the first package has terminals 14. These are, as can be seen in FIGS. 1, 2 and 3, formed in the region of the edges of the first package.
  • the side surface on which the respective terminal 14 is provided has four edges, namely an edge to the bottom 9, an edge to the top 8 and a first edge to a first further side surface and a second edge to a second, the first oppositely arranged further side surface.
  • the terminals are each formed in the region of one of these four edges of a side surface.
  • the respective terminal 14 has a terminal surface which is partially in the surface of this page.
  • the terminal 14 forms part of an edge. That is, a part of the edge is formed on the electric terminal 14.
  • the electrical connection 14 has a partial surface, which is located in the surface of the page and a further partial surface, which is in the adjacent surface, so depending on the position of the edge in the surface of the bottom, the surface of the top or in the surface of a the adjacent other pages is located.
  • FIG. 6 shows the electrical component according to the invention in a perspective plan view.
  • the circuit board 20 and the electrical component 1 according to the invention are connected to the side surface 13 with the printed circuit board 20.
  • the connection is made by soldering to the terminals 14 at the edge to the side surface 13.
  • Both the terminals 14 of the first package 2, as well as not visible in the view of Figure 6, comparable terminals of the second package 13 are soldered to terminals of the circuit board 20 , As on both sides of the electrical component. 1 Soldered connections are made, it is prevented that the upright electrical component 1 tilts to one side.
  • first a first frame 21 is provided.
  • This frame contains a plurality of lead frames.
  • FIG. 7 shows the respective encapsulation material 5 of the packages 1 containing the respective lead frame and the respective chip. Since each package contains a print on its connection surface, the individual packages in the frame 21 in FIG. 7 can be easily recognized.
  • the frame 21 has holes 22. With these holes 22, the frame 21 is pushed onto fixing pins 23 and thus fixed in one position.
  • FIG. 8 illustrates that an adhesive 24 is applied to the first joining surfaces of the first packages.
  • FIG. 9 shows, for better illustration only with regard to the left part of the frame 21, that a second frame 25, which in its construction corresponds to the first frame 21, is also placed with its holes 22 on the fixing pins 23, namely - as in FIG apparent - over head.
  • the second connecting surfaces of the second packages of the second frame 25 come into contact with the adhesive 24 and, after hardening of the adhesive 24, are firmly bonded by joining to the first connecting surfaces of the first packages of the first frame 21.
  • the first frame 21 and the second frame 25 can be pressed against each other.
  • the electrical components 1 according to the invention are separated by sawing from the "sandwich" produced by gluing the first frame 21 together with the second frame 25. Thereafter, they can still be subjected to a functional test.
  • FIG. 10 shows a perspective top view of an inventive electrical component 1 with a first package 2 and a second package 3.
  • FIG. 10 also shows a pole strip 30.
  • the pole strip 30 can be moved relative to the electrical component, either in which the pole strip 30 is fixed and the electrical component 1 is moved relative to the pole strip 30 or by the electrical component 1 is fixed and the pole strip 30 is moved or by both PolstMail 30 and the electrical component 1 are moved, but with different high and / or different speeds.
  • the black area 31 in FIG. 10 clarifies that a magnetic-field-sensitive sensor is provided in the second package 3 in such a way that the sensitive sensor layer lies at the upper edge of the second package 3.
  • the structure according to the invention of the electrical component 1 thus makes it possible to bring the magnetic field-sensitive layer particularly close to the pole strip 30 in relation to the printed circuit board 20 (not shown in FIG. 10).
  • FIG. 11 differs from that shown in FIG. 10 in that also in the first package 2 a magnetic field-sensitive sensor (black area 31) is arranged. In the embodiment of FIG. 11, this is identical to the magnetic-field-sensitive sensor in the second package 3, so that redundant measurements become possible.
  • FIG. 12 differs from that shown in FIG. 11 in that in the first package 2 a magnetic field-sensitive sensor (black area 31) is arranged, which is different from the magnetic field-sensitive sensor arranged in the second package 3.
  • the magnetic-field-sensitive sensor provided in the second package 3 may be designed to fine-position the sensor, for example, to detect the position with a precision of 1 mm, while the sensor in the first package 2 has twice or more read widths for coarse positioning.
  • FIG. 13 shows a schematic representation of the arrangement of the resistors 32 of a magnetoresistive sensor element in relation to the pole strip 30.
  • FIG. 13 shows that in each case four resistors 32 are connected to one Wheatstone bridge in each case and that all the resistors 32 are arranged parallel to one another. Such an arrangement lends itself to the implementation of the design shown in FIG.
  • FIG. 14 illustrates the possibility of fulfilling different measuring tasks by using differently constructed magnetoresistive sensors in the packages.
  • a magnetoresistive sensor On the left in FIG. 14, the structure of a magnetoresistive sensor is shown, as is also known from FIG.
  • This magnetoresistive sensor can be used as a path length sensor and be installed, for example, in the second package 3.
  • the sensor shown on the right in FIG. 14 differs from that shown on the left in that the resistors 32 of the second Wheatstone bridge do not run parallel to the resistors 32 of the first Wheatstone bridge, but are rotated through 45 ° thereto.
  • Such a sensor structure is suitable for determining a rotation angle.
  • This magnetoresistive sensor could be used in the first package 2 be installed.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Geometry (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

La présente invention concerne un composant électrique comprenant un premier boîtier comprenant une première grille de connexion et une puce mise en place contre la première grille de connexion et un matériau d'encapsulation qui encapsule la puce et au moins des parties de la grille de connexion, le composant comprenant un second boîtier comprenant une seconde grille de connexion et un matériau d'encapsulation qui encapsule au moins des parties de la grille de connexion, le matériau d'encapsulation du premier boîtier étant relié fixement au matériau d'encapsulation du second boîtier.
EP16739410.5A 2015-07-03 2016-07-04 Composant électrique et procédé de réalisation pour réaliser un tel composant électrique Withdrawn EP3317685A1 (fr)

Applications Claiming Priority (2)

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DE102015008503.4A DE102015008503A1 (de) 2015-07-03 2015-07-03 Elektrisches Bauteil und Herstellungsverfahren zum Herstellen eines solchen elektrischen Bauteils
PCT/EP2016/001141 WO2017005359A1 (fr) 2015-07-03 2016-07-04 Composant électrique et procédé de réalisation pour réaliser un tel composant électrique

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EP3317685A1 true EP3317685A1 (fr) 2018-05-09

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US (1) US10571529B2 (fr)
EP (1) EP3317685A1 (fr)
CN (1) CN108139450B (fr)
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WO (1) WO2017005359A1 (fr)

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US20180128883A1 (en) 2018-05-10
US10571529B2 (en) 2020-02-25
CN108139450B (zh) 2020-11-24
WO2017005359A1 (fr) 2017-01-12
DE102015008503A1 (de) 2017-01-05
CN108139450A (zh) 2018-06-08

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