EP2548225B1 - System-in-package using embedded-die coreless substrates, and processes of forming same - Google Patents
System-in-package using embedded-die coreless substrates, and processes of forming same Download PDFInfo
- Publication number
- EP2548225B1 EP2548225B1 EP11756940.0A EP11756940A EP2548225B1 EP 2548225 B1 EP2548225 B1 EP 2548225B1 EP 11756940 A EP11756940 A EP 11756940A EP 2548225 B1 EP2548225 B1 EP 2548225B1
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- EP
- European Patent Office
- Prior art keywords
- die
- embedded
- substrate
- coreless
- disposed
- Prior art date
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Images
Classifications
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- H—ELECTRICITY
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- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H01L2924/3025—Electromagnetic shielding
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/725,925 US8891246B2 (en) | 2010-03-17 | 2010-03-17 | System-in-package using embedded-die coreless substrates, and processes of forming same |
PCT/US2011/028689 WO2011116106A2 (en) | 2010-03-17 | 2011-03-16 | System-in-package using embedded-die coreless substrates, and processes of forming same |
Publications (3)
Publication Number | Publication Date |
---|---|
EP2548225A2 EP2548225A2 (en) | 2013-01-23 |
EP2548225A4 EP2548225A4 (en) | 2013-12-25 |
EP2548225B1 true EP2548225B1 (en) | 2018-02-28 |
Family
ID=44647093
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP11756940.0A Active EP2548225B1 (en) | 2010-03-17 | 2011-03-16 | System-in-package using embedded-die coreless substrates, and processes of forming same |
Country Status (7)
Country | Link |
---|---|
US (1) | US8891246B2 (ko) |
EP (1) | EP2548225B1 (ko) |
KR (1) | KR101374463B1 (ko) |
CN (1) | CN102812550B (ko) |
SG (1) | SG183401A1 (ko) |
TW (1) | TWI546904B (ko) |
WO (1) | WO2011116106A2 (ko) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110767606A (zh) * | 2019-12-24 | 2020-02-07 | 杭州见闻录科技有限公司 | 一种具有复合功能的电子元器件及其制造方法 |
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US8891246B2 (en) | 2010-03-17 | 2014-11-18 | Intel Corporation | System-in-package using embedded-die coreless substrates, and processes of forming same |
US8535989B2 (en) | 2010-04-02 | 2013-09-17 | Intel Corporation | Embedded semiconductive chips in reconstituted wafers, and systems containing same |
US8319318B2 (en) | 2010-04-06 | 2012-11-27 | Intel Corporation | Forming metal filled die back-side film for electromagnetic interference shielding with coreless packages |
US8618652B2 (en) | 2010-04-16 | 2013-12-31 | Intel Corporation | Forming functionalized carrier structures with coreless packages |
US8939347B2 (en) | 2010-04-28 | 2015-01-27 | Intel Corporation | Magnetic intermetallic compound interconnect |
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US8313958B2 (en) | 2010-05-12 | 2012-11-20 | Intel Corporation | Magnetic microelectronic device attachment |
US8434668B2 (en) | 2010-05-12 | 2013-05-07 | Intel Corporation | Magnetic attachment structure |
US8609532B2 (en) | 2010-05-26 | 2013-12-17 | Intel Corporation | Magnetically sintered conductive via |
US8264849B2 (en) * | 2010-06-23 | 2012-09-11 | Intel Corporation | Mold compounds in improved embedded-die coreless substrates, and processes of forming same |
US20120001339A1 (en) | 2010-06-30 | 2012-01-05 | Pramod Malatkar | Bumpless build-up layer package design with an interposer |
US20120032337A1 (en) * | 2010-08-06 | 2012-02-09 | Taiwan Semiconductor Manufacturing Company, Ltd. | Flip Chip Substrate Package Assembly and Process for Making Same |
US8754516B2 (en) | 2010-08-26 | 2014-06-17 | Intel Corporation | Bumpless build-up layer package with pre-stacked microelectronic devices |
US8304913B2 (en) | 2010-09-24 | 2012-11-06 | Intel Corporation | Methods of forming fully embedded bumpless build-up layer packages and structures formed thereby |
US8624392B2 (en) | 2011-06-03 | 2014-01-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Electrical connection for chip scale packaging |
US8937382B2 (en) | 2011-06-27 | 2015-01-20 | Intel Corporation | Secondary device integration into coreless microelectronic device packages |
US8848380B2 (en) | 2011-06-30 | 2014-09-30 | Intel Corporation | Bumpless build-up layer package warpage reduction |
US8912668B2 (en) | 2012-03-01 | 2014-12-16 | Taiwan Semiconductor Manufacturing Company, Ltd. | Electrical connections for chip scale packaging |
US9548281B2 (en) | 2011-10-07 | 2017-01-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Electrical connection for chip scale packaging |
CN104025285B (zh) | 2011-10-31 | 2017-08-01 | 英特尔公司 | 多管芯封装结构 |
US9162867B2 (en) * | 2011-12-13 | 2015-10-20 | Intel Corporation | Through-silicon via resonators in chip packages and methods of assembling same |
US9224674B2 (en) * | 2011-12-15 | 2015-12-29 | Intel Corporation | Packaged semiconductor die with bumpless die-package interface for bumpless build-up layer (BBUL) packages |
WO2013095442A1 (en) * | 2011-12-21 | 2013-06-27 | Intel Corporation | Dense interconnect with solder cap (disc) formation with laser ablation and resulting semiconductor structures and packages |
WO2013101156A1 (en) * | 2011-12-30 | 2013-07-04 | Intel Corporation | Integration of laminate mems in bbul coreless package |
US9601421B2 (en) * | 2011-12-30 | 2017-03-21 | Intel Corporation | BBUL material integration in-plane with embedded die for warpage control |
JP5574068B2 (ja) * | 2012-02-17 | 2014-08-20 | 株式会社村田製作所 | 部品内蔵基板 |
WO2013172814A1 (en) | 2012-05-14 | 2013-11-21 | Intel Corporation | Microelectronic package utilizing multiple bumpless build-up structures and through-silicon vias |
WO2013184145A1 (en) | 2012-06-08 | 2013-12-12 | Intel Corporation | Microelectronic package having non-coplanar, encapsulated microelectronic devices and a bumpless build-up layer |
US9196573B2 (en) | 2012-07-31 | 2015-11-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bump on pad (BOP) bonding structure |
US9673161B2 (en) | 2012-08-17 | 2017-06-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Bonded structures for package and substrate |
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US9136236B2 (en) | 2012-09-28 | 2015-09-15 | Intel Corporation | Localized high density substrate routing |
US9190380B2 (en) | 2012-12-06 | 2015-11-17 | Intel Corporation | High density substrate routing in BBUL package |
US9502336B2 (en) * | 2013-03-13 | 2016-11-22 | Intel Corporation | Coreless substrate with passive device pads |
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KR20120127500A (ko) | 2012-11-21 |
KR101374463B1 (ko) | 2014-03-17 |
US8891246B2 (en) | 2014-11-18 |
TW201201328A (en) | 2012-01-01 |
EP2548225A2 (en) | 2013-01-23 |
SG183401A1 (en) | 2012-09-27 |
CN102812550A (zh) | 2012-12-05 |
TWI546904B (zh) | 2016-08-21 |
CN102812550B (zh) | 2015-08-12 |
WO2011116106A3 (en) | 2012-01-12 |
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