EP1976001A3 - Method for manufacturing semiconductor device - Google Patents

Method for manufacturing semiconductor device Download PDF

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Publication number
EP1976001A3
EP1976001A3 EP08004617A EP08004617A EP1976001A3 EP 1976001 A3 EP1976001 A3 EP 1976001A3 EP 08004617 A EP08004617 A EP 08004617A EP 08004617 A EP08004617 A EP 08004617A EP 1976001 A3 EP1976001 A3 EP 1976001A3
Authority
EP
European Patent Office
Prior art keywords
layer
organic resin
semiconductor device
forming
over
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP08004617A
Other languages
German (de)
English (en)
French (fr)
Other versions
EP1976001A2 (en
Inventor
Yoshitaka Dozen
Eiji Sugiyama
Hisashi Ohtani
Takuya Tsurume
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Publication of EP1976001A2 publication Critical patent/EP1976001A2/en
Publication of EP1976001A3 publication Critical patent/EP1976001A3/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0214—Manufacture or treatment of multiple TFTs using temporary substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/451—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by the compositions or shapes of the interlayer dielectrics
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/481—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs integrated with passive devices, e.g. auxiliary capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices

Landscapes

  • Thin Film Transistor (AREA)
  • Electroluminescent Light Sources (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
EP08004617A 2007-03-26 2008-03-12 Method for manufacturing semiconductor device Withdrawn EP1976001A3 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007079120 2007-03-26

Publications (2)

Publication Number Publication Date
EP1976001A2 EP1976001A2 (en) 2008-10-01
EP1976001A3 true EP1976001A3 (en) 2012-08-22

Family

ID=39562221

Family Applications (1)

Application Number Title Priority Date Filing Date
EP08004617A Withdrawn EP1976001A3 (en) 2007-03-26 2008-03-12 Method for manufacturing semiconductor device

Country Status (6)

Country Link
US (2) US7736958B2 (enExample)
EP (1) EP1976001A3 (enExample)
JP (1) JP5268395B2 (enExample)
KR (1) KR101389758B1 (enExample)
CN (2) CN101276743B (enExample)
TW (1) TWI447822B (enExample)

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KR101389758B1 (ko) 2014-04-29
CN102496607A (zh) 2012-06-13
EP1976001A2 (en) 2008-10-01
US20080242005A1 (en) 2008-10-02
US7736958B2 (en) 2010-06-15
US8338931B2 (en) 2012-12-25
KR20080087692A (ko) 2008-10-01
CN101276743A (zh) 2008-10-01
TWI447822B (zh) 2014-08-01
TW200903665A (en) 2009-01-16
US20100200663A1 (en) 2010-08-12
JP5268395B2 (ja) 2013-08-21
JP2008270761A (ja) 2008-11-06
CN102496607B (zh) 2015-03-25

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