EP1966800A2 - Body effect sensing method for non-volatile memories - Google Patents
Body effect sensing method for non-volatile memoriesInfo
- Publication number
- EP1966800A2 EP1966800A2 EP06848820A EP06848820A EP1966800A2 EP 1966800 A2 EP1966800 A2 EP 1966800A2 EP 06848820 A EP06848820 A EP 06848820A EP 06848820 A EP06848820 A EP 06848820A EP 1966800 A2 EP1966800 A2 EP 1966800A2
- Authority
- EP
- European Patent Office
- Prior art keywords
- memory cells
- bit line
- sensing
- states
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 230000015654 memory Effects 0.000 title claims abstract description 216
- 238000000034 method Methods 0.000 title claims description 89
- 230000000694 effects Effects 0.000 title abstract description 19
- 230000001419 dependent effect Effects 0.000 claims abstract description 9
- 238000007599 discharging Methods 0.000 claims description 12
- 230000004044 response Effects 0.000 claims description 9
- 230000000670 limiting effect Effects 0.000 claims description 2
- 238000012795 verification Methods 0.000 claims 3
- 238000007667 floating Methods 0.000 description 37
- 238000003860 storage Methods 0.000 description 26
- 238000009826 distribution Methods 0.000 description 22
- 230000008569 process Effects 0.000 description 18
- 239000010410 layer Substances 0.000 description 11
- 230000010354 integration Effects 0.000 description 10
- 238000003491 array Methods 0.000 description 7
- 230000008878 coupling Effects 0.000 description 7
- 238000010168 coupling process Methods 0.000 description 7
- 238000005859 coupling reaction Methods 0.000 description 7
- 239000000758 substrate Substances 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 238000013500 data storage Methods 0.000 description 6
- 238000013461 design Methods 0.000 description 6
- 238000013459 approach Methods 0.000 description 5
- 230000008901 benefit Effects 0.000 description 5
- 230000002093 peripheral effect Effects 0.000 description 5
- 230000002829 reductive effect Effects 0.000 description 5
- 230000008859 change Effects 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 230000007423 decrease Effects 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000012212 insulator Substances 0.000 description 3
- 230000007334 memory performance Effects 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 230000001934 delay Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 230000000979 retarding effect Effects 0.000 description 2
- 238000005201 scrubbing Methods 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 230000007480 spreading Effects 0.000 description 2
- 238000003892 spreading Methods 0.000 description 2
- 230000003068 static effect Effects 0.000 description 2
- 244000146510 Pereskia bleo Species 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- LPQOADBMXVRBNX-UHFFFAOYSA-N ac1ldcw0 Chemical compound Cl.C1CN(C)CCN1C1=C(F)C=C2C(=O)C(C(O)=O)=CN3CCSC1=C32 LPQOADBMXVRBNX-UHFFFAOYSA-N 0.000 description 1
- 238000010420 art technique Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- OYVAGSVQBOHSSS-UAPAGMARSA-O bleomycin A2 Chemical compound N([C@H](C(=O)N[C@H](C)[C@@H](O)[C@H](C)C(=O)N[C@@H]([C@H](O)C)C(=O)NCCC=1SC=C(N=1)C=1SC=C(N=1)C(=O)NCCC[S+](C)C)[C@@H](O[C@H]1[C@H]([C@@H](O)[C@H](O)[C@H](CO)O1)O[C@@H]1[C@H]([C@@H](OC(N)=O)[C@H](O)[C@@H](CO)O1)O)C=1N=CNC=1)C(=O)C1=NC([C@H](CC(N)=O)NC[C@H](N)C(N)=O)=NC(N)=C1C OYVAGSVQBOHSSS-UAPAGMARSA-O 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 230000002401 inhibitory effect Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000013011 mating Effects 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 230000003278 mimic effect Effects 0.000 description 1
- 239000002159 nanocrystal Substances 0.000 description 1
- 230000008520 organization Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000003252 repetitive effect Effects 0.000 description 1
- 230000002441 reversible effect Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
- 230000005641 tunneling Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5642—Sensing or reading circuits; Data output circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/12—Programming voltage switching circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/26—Sensing or reading circuits; Data output circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/30—Power supply circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
- G11C2211/564—Miscellaneous aspects
- G11C2211/565—Multilevel memory comprising elements in triple well structure
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1048—Data bus control circuits, e.g. precharging, presetting, equalising
Definitions
- the peripheral circuitry supplies the reference voltages to the bit line comparators sequentially.
- the reference values can all be available concurrently to a multiplexing circuit that supplies the different value, or the line supplying the reference values to the comparator can itself receive the various reference values in a time multiplexed manner.
- Figure 6 provides Table 1 of example operating voltages of the NAND memory cell array of Figures 2-5;
- select gate lines are electrically shorted together using one contact for each select gate, as in the STI embodiment the poly-1 layer is etched into isolated strips during the STI definition.
- poly 1 strips are also etched, leaving the polyl gates residing above select gate channels as isolated conductors.
- poly-2 layer will form a conducting line, connecting the individual poly-1 select gates to each other in order to form the select gate lines, which extend in a parallel direction to word lines.
- Figure 8 illustrates threshold voltage distributions for the memory cell array 1 when each floating gate storage element stores two bits of data, namely four data states, in each memory cell (M).
- the curve 33 represents a distribution of the threshold levels V T of the cells within the array 1 that are in the erased state (E data state), being negative threshold voltage levels.
- Threshold voltage distributions 34 and 35 of memory cells storing A and B user data, respectively, are shown to be between V V A and V V B and between V V B and Vyc- A curve 36 shows the distribution of cells that have been programmed to the C data state, being the highest threshold voltage level set more than 2V and less than 4.5V of the read pass voltage.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Read Only Memory (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/321,996 US7349264B2 (en) | 2005-12-28 | 2005-12-28 | Alternate sensing techniques for non-volatile memories |
| US11/320,917 US7616481B2 (en) | 2005-12-28 | 2005-12-28 | Memories with alternate sensing techniques |
| PCT/US2006/062513 WO2007076451A2 (en) | 2005-12-28 | 2006-12-21 | Body effect sensing method for non-volatile memories |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| EP1966800A2 true EP1966800A2 (en) | 2008-09-10 |
Family
ID=38197637
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP06848820A Withdrawn EP1966800A2 (en) | 2005-12-28 | 2006-12-21 | Body effect sensing method for non-volatile memories |
Country Status (5)
| Country | Link |
|---|---|
| EP (1) | EP1966800A2 (enExample) |
| JP (1) | JP4568365B2 (enExample) |
| KR (1) | KR101357068B1 (enExample) |
| TW (1) | TWI323464B (enExample) |
| WO (1) | WO2007076451A2 (enExample) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7616481B2 (en) | 2005-12-28 | 2009-11-10 | Sandisk Corporation | Memories with alternate sensing techniques |
| US7349264B2 (en) | 2005-12-28 | 2008-03-25 | Sandisk Corporation | Alternate sensing techniques for non-volatile memories |
| KR100923810B1 (ko) * | 2007-02-22 | 2009-10-27 | 주식회사 하이닉스반도체 | 메모리 소자와 그 동작 방법 |
| US8416624B2 (en) | 2010-05-21 | 2013-04-09 | SanDisk Technologies, Inc. | Erase and programming techniques to reduce the widening of state distributions in non-volatile memories |
| KR20150128823A (ko) * | 2013-03-14 | 2015-11-18 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치의 구동 방법 및 반도체 장치 |
| US11049557B2 (en) * | 2019-07-19 | 2021-06-29 | Macronix International Co., Ltd. | Leakage current compensation in crossbar array |
| KR102775482B1 (ko) * | 2021-01-19 | 2025-02-28 | 양쯔 메모리 테크놀로지스 씨오., 엘티디. | 반도체 메모리 디바이스 |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5602789A (en) * | 1991-03-12 | 1997-02-11 | Kabushiki Kaisha Toshiba | Electrically erasable and programmable non-volatile and multi-level memory systemn with write-verify controller |
| JPH08249893A (ja) * | 1995-03-07 | 1996-09-27 | Toshiba Corp | 半導体記憶装置 |
| KR0169267B1 (ko) * | 1993-09-21 | 1999-02-01 | 사토 후미오 | 불휘발성 반도체 기억장치 |
| JP3476952B2 (ja) * | 1994-03-15 | 2003-12-10 | 株式会社東芝 | 不揮発性半導体記憶装置 |
| JP2697665B2 (ja) * | 1995-03-31 | 1998-01-14 | 日本電気株式会社 | 半導体記憶装置及び半導体記憶装置からのデータ読み出し方法 |
| US5687114A (en) * | 1995-10-06 | 1997-11-11 | Agate Semiconductor, Inc. | Integrated circuit for storage and retrieval of multiple digital bits per nonvolatile memory cell |
| JP4246831B2 (ja) * | 1999-02-08 | 2009-04-02 | 株式会社東芝 | 半導体集積回路装置のデータ判別方法 |
| US6259627B1 (en) * | 2000-01-27 | 2001-07-10 | Multi Level Memory Technology | Read and write operations using constant row line voltage and variable column line load |
| US7630237B2 (en) * | 2003-02-06 | 2009-12-08 | Sandisk Corporation | System and method for programming cells in non-volatile integrated memory devices |
-
2006
- 2006-12-21 WO PCT/US2006/062513 patent/WO2007076451A2/en not_active Ceased
- 2006-12-21 EP EP06848820A patent/EP1966800A2/en not_active Withdrawn
- 2006-12-21 KR KR1020087015402A patent/KR101357068B1/ko not_active Expired - Fee Related
- 2006-12-21 JP JP2008548823A patent/JP4568365B2/ja not_active Expired - Fee Related
- 2006-12-28 TW TW095149528A patent/TWI323464B/zh not_active IP Right Cessation
Non-Patent Citations (1)
| Title |
|---|
| See references of WO2007076451A2 * |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20080096644A (ko) | 2008-10-31 |
| TWI323464B (en) | 2010-04-11 |
| WO2007076451A3 (en) | 2007-09-20 |
| KR101357068B1 (ko) | 2014-02-03 |
| WO2007076451A2 (en) | 2007-07-05 |
| JP4568365B2 (ja) | 2010-10-27 |
| JP2009522706A (ja) | 2009-06-11 |
| TW200741718A (en) | 2007-11-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7460406B2 (en) | Alternate sensing techniques for non-volatile memories | |
| US7616481B2 (en) | Memories with alternate sensing techniques | |
| US6456528B1 (en) | Selective operation of a multi-state non-volatile memory system in a binary mode | |
| US7385854B2 (en) | Selective operation of a multi-state non-volatile memory system in a binary mode | |
| EP1769506B1 (en) | Multi-purpose non-volatile memory card | |
| JP4510031B2 (ja) | 非揮発性メモリの雑／ファインプログラミングのための効率的ベリフィケーション | |
| JP4726807B2 (ja) | 非揮発性メモリの雑／ファインプログラミングのための可変電流シンキング | |
| US8374031B2 (en) | Techniques for the fast settling of word lines in NAND flash memory | |
| US6859397B2 (en) | Source side self boosting technique for non-volatile memory | |
| EP1665282B1 (en) | Erase inhibit in non-volatile memories | |
| JP2007520028A (ja) | 非揮発性メモリの雑／ファインプログラミングのためのチャージパケット測定 | |
| US7733701B2 (en) | Reading non-volatile storage with efficient setup | |
| CN101176166A (zh) | 具有对源极线偏置误差的控制栅极补偿的非易失性存储器及方法 | |
| JP4568365B2 (ja) | 不揮発性メモリの代替の感知技術 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
| 17P | Request for examination filed |
Effective date: 20080317 |
|
| AK | Designated contracting states |
Kind code of ref document: A2 Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LI LT LU LV MC NL PL PT RO SE SI SK TR |
|
| 17Q | First examination report despatched |
Effective date: 20090605 |
|
| STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN |
|
| 18D | Application deemed to be withdrawn |
Effective date: 20091016 |