EP1956876A4 - Keramiksubstrat, elektronische vorrichtung und verfahren zur herstellung des keramiksubstrats - Google Patents
Keramiksubstrat, elektronische vorrichtung und verfahren zur herstellung des keramiksubstratsInfo
- Publication number
- EP1956876A4 EP1956876A4 EP06832552A EP06832552A EP1956876A4 EP 1956876 A4 EP1956876 A4 EP 1956876A4 EP 06832552 A EP06832552 A EP 06832552A EP 06832552 A EP06832552 A EP 06832552A EP 1956876 A4 EP1956876 A4 EP 1956876A4
- Authority
- EP
- European Patent Office
- Prior art keywords
- ceramic substrate
- electronic device
- producing
- producing ceramic
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000919 ceramic Substances 0.000 title 2
- 239000000758 substrate Substances 0.000 title 2
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4803—Insulating or insulated parts, e.g. mountings, containers, diamond heatsinks
- H01L21/4807—Ceramic parts
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4803—Insulating or insulated parts, e.g. mountings, containers, diamond heatsinks
- H01L21/481—Insulating layers on insulating parts, with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/15—Ceramic or glass substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
- H01L23/49894—Materials of the insulating layers or coatings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68345—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during the manufacture of self supporting substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01004—Beryllium [Be]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01019—Potassium [K]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0102—Calcium [Ca]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01057—Lanthanum [La]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0183—Dielectric layers
- H05K2201/0195—Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/099—Coating over pads, e.g. solder resist partly over pads
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/243—Reinforcing the conductive pattern characterised by selective plating, e.g. for finish plating of pads
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
- Y10T428/24917—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
- Y10T428/24926—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including ceramic, glass, porcelain or quartz layer
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing Of Printed Wiring (AREA)
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005346851 | 2005-11-30 | ||
JP2006116036 | 2006-04-19 | ||
JP2006282823 | 2006-10-17 | ||
PCT/JP2006/322540 WO2007063692A1 (ja) | 2005-11-30 | 2006-11-13 | セラミック基板、電子装置およびセラミック基板の製造方法 |
Publications (3)
Publication Number | Publication Date |
---|---|
EP1956876A1 EP1956876A1 (de) | 2008-08-13 |
EP1956876A4 true EP1956876A4 (de) | 2011-05-11 |
EP1956876B1 EP1956876B1 (de) | 2013-06-12 |
Family
ID=38092028
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP06832552.1A Active EP1956876B1 (de) | 2005-11-30 | 2006-11-13 | Keramiksubstrat, elektronische vorrichtung und verfahren zur herstellung des keramiksubstrats |
Country Status (6)
Country | Link |
---|---|
US (1) | US7473460B2 (de) |
EP (1) | EP1956876B1 (de) |
JP (1) | JP4561831B2 (de) |
KR (1) | KR100885136B1 (de) |
TW (1) | TWI311451B (de) |
WO (1) | WO2007063692A1 (de) |
Families Citing this family (31)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8174830B2 (en) | 2008-05-06 | 2012-05-08 | Rockwell Collins, Inc. | System and method for a substrate with internal pumped liquid metal for thermal spreading and cooling |
US8581108B1 (en) | 2006-08-23 | 2013-11-12 | Rockwell Collins, Inc. | Method for providing near-hermetically coated integrated circuit assemblies |
US8617913B2 (en) * | 2006-08-23 | 2013-12-31 | Rockwell Collins, Inc. | Alkali silicate glass based coating and method for applying |
US8166645B2 (en) * | 2006-08-23 | 2012-05-01 | Rockwell Collins, Inc. | Method for providing near-hermetically coated, thermally protected integrated circuit assemblies |
US8076185B1 (en) | 2006-08-23 | 2011-12-13 | Rockwell Collins, Inc. | Integrated circuit protection and ruggedization coatings and methods |
US8637980B1 (en) | 2007-12-18 | 2014-01-28 | Rockwell Collins, Inc. | Adhesive applications using alkali silicate glass for electronics |
US8084855B2 (en) * | 2006-08-23 | 2011-12-27 | Rockwell Collins, Inc. | Integrated circuit tampering protection and reverse engineering prevention coatings and methods |
US7915527B1 (en) | 2006-08-23 | 2011-03-29 | Rockwell Collins, Inc. | Hermetic seal and hermetic connector reinforcement and repair with low temperature glass coatings |
WO2008132913A1 (ja) * | 2007-04-20 | 2008-11-06 | Murata Manufacturing Co., Ltd. | 多層セラミック基板およびその製造方法ならびに電子部品 |
US8363189B2 (en) * | 2007-12-18 | 2013-01-29 | Rockwell Collins, Inc. | Alkali silicate glass for displays |
US8221089B2 (en) | 2008-09-12 | 2012-07-17 | Rockwell Collins, Inc. | Thin, solid-state mechanism for pumping electrically conductive liquids in a flexible thermal spreader |
US8205337B2 (en) * | 2008-09-12 | 2012-06-26 | Rockwell Collins, Inc. | Fabrication process for a flexible, thin thermal spreader |
US8616266B2 (en) | 2008-09-12 | 2013-12-31 | Rockwell Collins, Inc. | Mechanically compliant thermal spreader with an embedded cooling loop for containing and circulating electrically-conductive liquid |
US8650886B2 (en) | 2008-09-12 | 2014-02-18 | Rockwell Collins, Inc. | Thermal spreader assembly with flexible liquid cooling loop having rigid tubing sections and flexible tubing sections |
JP5456989B2 (ja) * | 2008-06-02 | 2014-04-02 | 太陽誘電株式会社 | 電子部品の製造方法 |
US8119040B2 (en) * | 2008-09-29 | 2012-02-21 | Rockwell Collins, Inc. | Glass thick film embedded passive material |
DE102009038674B4 (de) * | 2009-08-24 | 2012-02-09 | Epcos Ag | Trägervorrichtung, Anordnung mit einer solchen Trägervorrichtung sowie Verfahren zur Herstellung eines mindestens eine keramische Schicht umfassenden struktururierten Schichtstapels |
TW201130093A (en) * | 2010-02-19 | 2011-09-01 | Asahi Glass Co Ltd | Substrate for mounting element, and method for manufacturing the substrate |
EP2670560B1 (de) | 2011-02-04 | 2016-01-13 | Antaya Technologies Corp. | Bleifreie lötzusammensetzung |
JP5582069B2 (ja) * | 2011-03-04 | 2014-09-03 | 株式会社村田製作所 | セラミック多層基板 |
EP2704873B1 (de) * | 2011-05-03 | 2022-02-09 | Pilkington Group Limited | Verglasung mit gelötetem anschlusselement |
US9435915B1 (en) | 2012-09-28 | 2016-09-06 | Rockwell Collins, Inc. | Antiglare treatment for glass |
DE102013104739B4 (de) * | 2013-03-14 | 2022-10-27 | Rogers Germany Gmbh | Metall-Keramik-Substrate sowie Verfahren zum Herstellen eines Metall-Keramik-Substrates |
WO2015060045A1 (ja) | 2013-10-24 | 2015-04-30 | 株式会社村田製作所 | 配線基板およびその製造方法 |
JP6493560B2 (ja) * | 2015-11-30 | 2019-04-03 | 株式会社村田製作所 | 多層セラミック基板及び電子部品 |
JP6699723B2 (ja) * | 2016-05-09 | 2020-05-27 | 株式会社村田製作所 | セラミック電子部品 |
CN109156080B (zh) | 2016-05-16 | 2021-10-08 | 株式会社村田制作所 | 陶瓷电子部件 |
JP6455633B2 (ja) * | 2016-05-17 | 2019-01-23 | 株式会社村田製作所 | 多層セラミック基板及び電子装置 |
JP6870427B2 (ja) | 2017-03-30 | 2021-05-12 | Tdk株式会社 | 電子部品 |
CN219181776U (zh) * | 2020-06-17 | 2023-06-13 | 株式会社村田制作所 | 电子部件 |
US20220216171A1 (en) * | 2021-01-06 | 2022-07-07 | Huawei Technologies Co., Ltd. | Chip package structure, preparation method, and electronic device |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54122871A (en) * | 1978-03-17 | 1979-09-22 | Tokyo Shibaura Electric Co | Method of producing circuit board |
JPS63302594A (ja) * | 1987-06-03 | 1988-12-09 | Hitachi Ltd | 厚膜導体電極の形成方法 |
JP2746774B2 (ja) * | 1991-06-05 | 1998-05-06 | 株式会社ミツバ | 回路基板の製造方法 |
JPH0918144A (ja) * | 1995-06-28 | 1997-01-17 | Hitachi Ltd | ガラスセラミック多層配線基板及びその製造方法並びにガラスセラミック多層配線基板実装構造体 |
US5710071A (en) * | 1995-12-04 | 1998-01-20 | Motorola, Inc. | Process for underfilling a flip-chip semiconductor device |
JP3780386B2 (ja) * | 1996-03-28 | 2006-05-31 | 株式会社村田製作所 | セラミック回路基板及びその製造方法 |
US6025649A (en) * | 1997-07-22 | 2000-02-15 | International Business Machines Corporation | Pb-In-Sn tall C-4 for fatigue enhancement |
US6337445B1 (en) * | 1998-03-16 | 2002-01-08 | Texas Instruments Incorporated | Composite connection structure and method of manufacturing |
US6228196B1 (en) * | 1998-06-05 | 2001-05-08 | Murata Manufacturing Co., Ltd. | Method of producing a multi-layer ceramic substrate |
JP2000223821A (ja) * | 1999-01-27 | 2000-08-11 | Kyocera Corp | セラミック配線基板 |
US6187418B1 (en) * | 1999-07-19 | 2001-02-13 | International Business Machines Corporation | Multilayer ceramic substrate with anchored pad |
JP2002084065A (ja) * | 2000-09-07 | 2002-03-22 | Murata Mfg Co Ltd | 多層セラミック基板およびその製造方法ならびに電子装置 |
WO2002025365A1 (fr) * | 2000-09-20 | 2002-03-28 | Hitachi, Ltd | Affichage a cristaux liquides |
JP2002231860A (ja) | 2001-01-31 | 2002-08-16 | Kyocera Corp | 電子部品装置 |
JP3891838B2 (ja) * | 2001-12-26 | 2007-03-14 | 株式会社ルネサステクノロジ | 半導体装置およびその製造方法 |
JP4610185B2 (ja) * | 2003-12-24 | 2011-01-12 | 京セラ株式会社 | 配線基板並びにその製造方法 |
JP2005268392A (ja) * | 2004-03-17 | 2005-09-29 | Kyocera Corp | 電子部品の製造方法 |
JP2005340449A (ja) * | 2004-05-26 | 2005-12-08 | Seiko Epson Corp | 半導体装置の製造方法 |
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2006
- 2006-11-01 TW TW095140394A patent/TWI311451B/zh active
- 2006-11-13 EP EP06832552.1A patent/EP1956876B1/de active Active
- 2006-11-13 JP JP2007508660A patent/JP4561831B2/ja active Active
- 2006-11-13 KR KR1020077010564A patent/KR100885136B1/ko active IP Right Grant
- 2006-11-13 WO PCT/JP2006/322540 patent/WO2007063692A1/ja active Application Filing
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2007
- 2007-05-30 US US11/755,144 patent/US7473460B2/en active Active
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Also Published As
Publication number | Publication date |
---|---|
TW200726336A (en) | 2007-07-01 |
KR100885136B1 (ko) | 2009-02-23 |
JPWO2007063692A1 (ja) | 2009-05-07 |
JP4561831B2 (ja) | 2010-10-13 |
WO2007063692A1 (ja) | 2007-06-07 |
KR20070088629A (ko) | 2007-08-29 |
EP1956876A1 (de) | 2008-08-13 |
US20070224400A1 (en) | 2007-09-27 |
US7473460B2 (en) | 2009-01-06 |
EP1956876B1 (de) | 2013-06-12 |
TWI311451B (en) | 2009-06-21 |
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