EP1374257B1 - Procede pour produire des puces resistances a couche mince - Google Patents

Procede pour produire des puces resistances a couche mince Download PDF

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Publication number
EP1374257B1
EP1374257B1 EP02700251A EP02700251A EP1374257B1 EP 1374257 B1 EP1374257 B1 EP 1374257B1 EP 02700251 A EP02700251 A EP 02700251A EP 02700251 A EP02700251 A EP 02700251A EP 1374257 B1 EP1374257 B1 EP 1374257B1
Authority
EP
European Patent Office
Prior art keywords
resistor
laser
substrate
tracks
thin film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
EP02700251A
Other languages
German (de)
English (en)
Other versions
EP1374257A1 (fr
Inventor
Wolfgang Werner
Horst Wolf
Reiner Wilhelm KÜHL
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BC Components Holdings BV
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BC Components Holdings BV
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Filing date
Publication date
Application filed by BC Components Holdings BV filed Critical BC Components Holdings BV
Publication of EP1374257A1 publication Critical patent/EP1374257A1/fr
Application granted granted Critical
Publication of EP1374257B1 publication Critical patent/EP1374257B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
    • H01C17/003—Apparatus or processes specially adapted for manufacturing resistors using lithography, e.g. photolithography
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
    • H01C17/006—Apparatus or processes specially adapted for manufacturing resistors adapted for manufacturing resistor chips
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
    • H01C17/22—Apparatus or processes specially adapted for manufacturing resistors adapted for trimming
    • H01C17/24—Apparatus or processes specially adapted for manufacturing resistors adapted for trimming by removing or adding resistive material
    • H01C17/242—Apparatus or processes specially adapted for manufacturing resistors adapted for trimming by removing or adding resistive material by laser
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S430/00—Radiation imagery chemistry: process, composition, or product thereof
    • Y10S430/146—Laser beam
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/94—Laser ablative material removal

Definitions

  • the present invention relates to the field of manufacturing passive electronic components. It concerns a procedure for Manufacture of thin film chip resistors according to the preamble of agreement 1.
  • US-A-3 699 649 shows a method of making resistors through a mask and a laser beam can be produced.
  • a method for producing a laser structuring of conductor tracks is known from DE-C1-38 43 230. This is the direct structuring proposed by metal films on plastic for printed circuit boards.
  • DE-A-44 29 794 shows a method for producing chip resistors in a flat design.
  • the resistors are adjusted using electrons or laser beams.
  • the object is achieved by the entirety of the features of claim 1 solved.
  • the essence of the invention is to structure the resistance tracks a laser-lithographic one for the individual resistors Use direct exposure process, in which a complete resistance or several complete resistors with a single over which entire area of the exposure-reaching exposure (a "laser shot”) be structured using an appropriately structured mask can.
  • a preferred embodiment of the method according to the invention is distinguished is characterized in that for laser lithographic direct exposure a UV laser (e.g. excimer laser) with wavelengths from 150nm to 400nm is used in the beam path of one of the trainees Structure of the resistor tracks corresponding mask is inserted, and that in the present case an excimer laser laser radiation with wavelengths in the range between 248 nm to 351 nm.
  • a UV laser e.g. excimer laser
  • an excimer laser laser radiation with wavelengths in the range between 248 nm to 351 nm.
  • a substrate which prefers notches due to structuring agents, but also laser scratches is divided into individual areas that in each of the areas Thin film chip resistance is generated that the patterning agent a plurality of mutually perpendicular, forming a grid Notches in the surface of the substrate include, and that after Completion of the individual thin film chip resistors the substrate is divided into individual thin-film chip resistors along the notches.
  • the structuring e.g. Laser scribe can also be used in the manufacturing process, i.e. after applying the thin layers.
  • Another preferred embodiment of the method according to the invention is characterized in that before structuring the resistance layer into the individual resistance tracks for each of the ones to be generated Thin-film chip resistors in the end regions of the ones to be generated Resistance tracks local contact layers as islands or as continuous strips are applied to the resistance layer.
  • Thin-film technology e.g. masked vapor deposition
  • Thick film processes are also conceivable, as well as combinations from both.
  • the order of the manufacturing processes resistance layer, Contact layer can also be reversed.
  • the substrate 10 consists, for example, of a glass, silicon, SiO or an insulating ceramic such as Al 2 O 3 or AIN. It is divided on the top by notches 11, 12 running perpendicular to each other in the manner of a grid, into individual regions 13, in each of which a thin-film chip resistor is to be produced.
  • the substrate 10 can also be sawn or laser scratched or can be present without subdivision. Depending on the subdivision, resistance arrays or resistance networks can also be created.
  • the resistance layer 14 is usually a metal layer made of a suitable resistance alloy, e.g. CrNi, CrSi, TaN, CuNi.
  • the resistance layer is preferred by sputtering or applied by vapor deposition. Germination e.g. Pd for subsequent Metallizations are conceivable. It is still conceivable instead to apply a masked coating to the entire surface coating, to be electrical, for example, in adjacent areas 13 to produce separate resistance layers. Several too Resistance layers on top of each other are conceivable.
  • the resistance layer with the desired composition and thickness or resistance value are then 4 on the resistance layer 14 or on the top of the substrate 10 and possibly local contact layers on the underside 15, 16 and 17, 18 applied.
  • the areas 13 there will be a pair spaced apart contact layers 15, 16 used between which the resistance path (24 in Fig. 7) extends.
  • the contact areas 17, 18 can also be continuous, as indicated at 17 in FIG. 4 is.
  • the contact layers 15, 16 are preferred in the thin-film process and the contact layers 17, 18 using thick-film technology applied.
  • the order of manufacture is preferably so performed that the contact layer on the resistance layer that means is applied in a subsequent process step. But it is also possible to place the contact layer under the resistance layer, i.e. in a previous process step. In particular, can the lower contact layer 17, 18 applied as the first process step become.
  • a masked laser radiation 21 is generated from a flat laser radiation 20 with a beam cross-section of up to 20 ⁇ 30 mm 2 through a suitably structured mask 19, which is optically imaged on a surface that is at least as large as the surface of the resistance path to be structured ( 25), meets the resistance layer 14.
  • the mask 19 has mask openings 21 in the regions in which the material of the resistance layer 14 is removed or brought into a non-conductive state by oxidation.
  • the resistance tracks of a resistor or a plurality of adjacent resistors in the example in FIG.
  • these are two) are structured in a non-writing process by means of a single or several “laser shots” in an image field of up to several mm 2 in size.
  • the mask 19 is designed in such a way that the resistance layer 14 is also exposed in the area of the notches 11, 12, so that when there is a full-area resistance layer 14, the individual areas 13 are electrically isolated at the same time.
  • the result of the structuring is a thin-film chip resistor 100, as is shown by way of example for one of the regions 13 in FIG. 7.
  • the various thin film chip resistors 100 ', 100 "by breaking the substrate 10 along through the notches 11, 12 predetermined dividing lines 28 are separated.
  • the dividing lines can also be related Resistance arrays or resistance networks are generated.
  • thin film chip resistors can be made extremely inexpensively with the invention with the advantages of a lithographic technique be structuring including electrical insulation of the individual elements not writing by a focused laser beam takes place, but as direct exposure of an entire or even of several whole components with one laser shot, and with that in contrast to photolithography in one process step.

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Plasma & Fusion (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Non-Adjustable Resistors (AREA)
  • Semiconductor Integrated Circuits (AREA)

Claims (10)

  1. Procédé pour la fabrication de résistances chips en couches minces (100, 100', 100"), du type selon lequel sur la face supérieure d'un substrat plan (10) sont appliquées une couche de résistance (14) et une couche de contact (15, 16), qui sont structurées au moyen d'un rayonnement laser de telle façon que sur le substrat (10) apparaisse une pluralité de pistes résistantes (24) séparées les unes des autres et présentant une valeur de résistance prédéterminée de manière approximative, caractérisé en ce que l'isolation électrique des éléments de résistance (13) et la structuration des pistes résistantes (24) individuelles interviennent simultanément pour l'ensemble de la piste formant résistance au moyen d'un procédé lithographique d'exposition directe à un laser, en ce que pour l'exposition lithographique directe à un laser, on utilise un laser UV, dans la trajectoire de rayon de laquelle on insère un masque correspondant à la structure des pistes résistantes (24) à développer et en ce que ladite structure est reproduite optiquement (25) sur la surface du substrat.
  2. Procédé selon la revendication 1, caractérisé en ce que plusieurs éléments de résistance (13), en particulier voisins, sont simultanément isolés électriquement et structurés par une ou plusieurs expositions au rayonnement et en ce que lors de l'exposition lithographique directe à un laser et additionnelle en vue de la structuration des pistes résistantes (24), les pistes résistantes (24) des résistances chips voisines en couches minces sont simultanément isolées électriquement l'une de l'autre.
  3. Procédé selon la revendication 1, caractérisé en ce qu'un rayonnement par laser du type Excimer (20) par exemple émet dans des longueurs d'onde situées dans le domaine compris entre 150nm et 400 nm.
  4. Procédé selon l'une des revendications 1 à 3, caractérisé en ce que l'on utilise un substrat (10), qui est subdivisé par le biais de moyens de structuration (11, 12) en zones individuelles (13) et en ce que dans chaque zone (13), une résistance chip en couches minces (100, 100', 100") est produite.
  5. Procédé selon la revendication 4, caractérisé en ce que les moyens de structuration, tels que par exemple entaillage, gravure au laser, rayure au laser, sciage ou analogue comportent une pluralité d'entailles (11, 22) formant un maillage ou grille et en disposition transversale mutuelle, et en ce qu'après l'achèvement des résistances chips en couches minces (100, 100', 100"), le substrat est séparé en morceaux le long des entailles (11, 22) en résistances chips en couches minces (100, 100', 100") individuelles ou aussi en arrangements de résistances ou en réseaux de résistances.
  6. Procédé selon l'une des revendications 1 à 5, caractérisé en ce qu'avant la structuration de la couche résistante (14) sous forme des pistes résistantes (24) pour chacune des résistances chips en couches minces (100, 100', 100") à produire, des couches locales de contact (15, 16) sont appliquées sur la couche résistante (14).
  7. Procédé selon la revendication 6, caractérisé en ce qu'additionnellement aux couches de contact (15, 16) sur la couche résistante (14) sont appliquées d'autres couches ou bandes de contact (17, 18) locales sur la face inférieure du substrat (10).
  8. Procédé selon la revendication 6 ou 7, caractérisé en ce que les couches de contact (15, 16) sont appliquées sur une face supérieure de préférence par des procédés en couche mince, au moyen de sputtering ou de métallisation, et en ce que les couches de contact (17, 18) sont appliquées sur une face inférieure, de préférence selon le procédé en couche épaisse.
  9. Procédé selon l'une des revendications 1 à 8, caractérisé en ce qu'après la structuration des pistes résistantes (24) au moyen du procédé lithographique d'exposition directe à un laser, une compensation fine des pistes résistantes (24) est réalisée.
  10. Procédé selon la revendication 9, caractérisé en ce que la compensation fine est réalisée avec un rayon laser (23).
EP02700251A 2001-03-02 2002-02-19 Procede pour produire des puces resistances a couche mince Expired - Lifetime EP1374257B1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE10110179A DE10110179B4 (de) 2001-03-02 2001-03-02 Verfahren zum Herstellen von Dünnschicht-Chipwiderständen
DE10110179 2001-03-02
PCT/EP2002/001730 WO2002071419A1 (fr) 2001-03-02 2002-02-19 Procede pour produire des puces resistances a couche mince

Publications (2)

Publication Number Publication Date
EP1374257A1 EP1374257A1 (fr) 2004-01-02
EP1374257B1 true EP1374257B1 (fr) 2004-09-15

Family

ID=7676132

Family Applications (1)

Application Number Title Priority Date Filing Date
EP02700251A Expired - Lifetime EP1374257B1 (fr) 2001-03-02 2002-02-19 Procede pour produire des puces resistances a couche mince

Country Status (9)

Country Link
US (1) US6998220B2 (fr)
EP (1) EP1374257B1 (fr)
JP (1) JP4092209B2 (fr)
KR (1) KR100668185B1 (fr)
CN (1) CN100413000C (fr)
AT (1) ATE276575T1 (fr)
DE (2) DE10110179B4 (fr)
TW (1) TW594802B (fr)
WO (1) WO2002071419A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6998220B2 (en) 2001-03-02 2006-02-14 Bc Components Holdings B.V. Method for the production of thin layer chip resistors

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7378337B2 (en) * 2003-11-04 2008-05-27 Electro Scientific Industries, Inc. Laser-based termination of miniature passive electronic components
TW200534296A (en) * 2004-02-09 2005-10-16 Rohm Co Ltd Method of making thin-film chip resistor
JP2011187985A (ja) * 2004-03-31 2011-09-22 Mitsubishi Materials Corp チップ抵抗器の製造方法
US7882621B2 (en) * 2008-02-29 2011-02-08 Yageo Corporation Method for making chip resistor components
CN102176356A (zh) * 2011-03-01 2011-09-07 西安天衡计量仪表有限公司 一种铂电阻芯片及铂电阻芯片的制备方法
DE102018115205A1 (de) 2018-06-25 2020-01-02 Vishay Electronic Gmbh Verfahren zur Herstellung einer Vielzahl von Widerstandsbaueinheiten

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DE1765145C3 (de) * 1968-04-09 1973-11-29 Siemens Ag, 1000 Berlin U. 8000 Muenchen Verfahren zum Bearbeiten dunner Schichten von elektrischen Schalt kreisen mit Laserstrahlen
US3699649A (en) * 1969-11-05 1972-10-24 Donald A Mcwilliams Method of and apparatus for regulating the resistance of film resistors
US4468414A (en) 1983-07-29 1984-08-28 Harris Corporation Dielectric isolation fabrication for laser trimming
US4594265A (en) * 1984-05-15 1986-06-10 Harris Corporation Laser trimming of resistors over dielectrically isolated islands
DE3843230C1 (en) * 1988-12-22 1989-09-21 W.C. Heraeus Gmbh, 6450 Hanau, De Process for making a metallic pattern on a base, in particular for the laser structuring of conductor tracks
JPH04178503A (ja) * 1990-11-14 1992-06-25 Nec Corp 歪センサーの製造方法
US5384230A (en) * 1992-03-02 1995-01-24 Berg; N. Edward Process for fabricating printed circuit boards
DE4429794C1 (de) * 1994-08-23 1996-02-29 Fraunhofer Ges Forschung Verfahren zum Herstellen von Chip-Widerständen
US5683928A (en) * 1994-12-05 1997-11-04 General Electric Company Method for fabricating a thin film resistor
US5852226A (en) * 1997-01-14 1998-12-22 Pioneer Hi-Bred International, Inc. Soybean variety 93B82
US5976392A (en) * 1997-03-07 1999-11-02 Yageo Corporation Method for fabrication of thin film resistor
DE19901540A1 (de) * 1999-01-16 2000-07-20 Philips Corp Intellectual Pty Verfahren zur Feinabstimmung eines passiven, elektronischen Bauelementes
US6365483B1 (en) * 2000-04-11 2002-04-02 Viking Technology Corporation Method for forming a thin film resistor
US6605760B1 (en) * 2000-12-22 2003-08-12 Pioneer Hi-Bred International, Inc. Soybean variety 94B73
US6613965B1 (en) * 2000-12-22 2003-09-02 Pioneer Hi-Bred International, Inc. Soybean variety 94B54
DE10110179B4 (de) 2001-03-02 2004-10-14 BCcomponents Holding B.V. Verfahren zum Herstellen von Dünnschicht-Chipwiderständen

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6998220B2 (en) 2001-03-02 2006-02-14 Bc Components Holdings B.V. Method for the production of thin layer chip resistors

Also Published As

Publication number Publication date
US20040126704A1 (en) 2004-07-01
DE10110179B4 (de) 2004-10-14
DE10110179A1 (de) 2002-12-05
JP2004530290A (ja) 2004-09-30
DE50201035D1 (de) 2004-10-21
CN100413000C (zh) 2008-08-20
US6998220B2 (en) 2006-02-14
KR100668185B1 (ko) 2007-01-11
JP4092209B2 (ja) 2008-05-28
TW594802B (en) 2004-06-21
CN1552080A (zh) 2004-12-01
WO2002071419A1 (fr) 2002-09-12
ATE276575T1 (de) 2004-10-15
EP1374257A1 (fr) 2004-01-02
KR20030086282A (ko) 2003-11-07

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