EP1145324A3 - Mos-transistorstruktur mit einer trench-gate-elektrode und einem verringerten spezifischen einschaltwiderstand und verfahren zur herstellung einer mos-transistorstruktur - Google Patents

Mos-transistorstruktur mit einer trench-gate-elektrode und einem verringerten spezifischen einschaltwiderstand und verfahren zur herstellung einer mos-transistorstruktur

Info

Publication number
EP1145324A3
EP1145324A3 EP00920348A EP00920348A EP1145324A3 EP 1145324 A3 EP1145324 A3 EP 1145324A3 EP 00920348 A EP00920348 A EP 00920348A EP 00920348 A EP00920348 A EP 00920348A EP 1145324 A3 EP1145324 A3 EP 1145324A3
Authority
EP
European Patent Office
Prior art keywords
transistor structure
mos
trench
producing
methods
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP00920348A
Other languages
English (en)
French (fr)
Other versions
EP1145324A2 (de
Inventor
Franz Hirler
Wolfgang Werner
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Publication of EP1145324A2 publication Critical patent/EP1145324A2/de
Publication of EP1145324A3 publication Critical patent/EP1145324A3/de
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/063—Reduced surface field [RESURF] pn-junction structures
    • H01L29/0634—Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843—Source or drain regions of field-effect devices
    • H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • H01L29/0852—Source or drain regions of field-effect devices of field-effect transistors with insulated gate of DMOS transistors
    • H01L29/0873—Drain regions
    • H01L29/0878—Impurity concentration or distribution
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
EP00920348A 1999-03-24 2000-03-01 Mos-transistorstruktur mit einer trench-gate-elektrode und einem verringerten spezifischen einschaltwiderstand und verfahren zur herstellung einer mos-transistorstruktur Withdrawn EP1145324A3 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE19913375 1999-03-24
DE19913375A DE19913375B4 (de) 1999-03-24 1999-03-24 Verfahren zur Herstellung einer MOS-Transistorstruktur
PCT/DE2000/000621 WO2000057481A2 (de) 1999-03-24 2000-03-01 Mos-transistorstruktur mit einer trench-gate-elektrode und einem verringerten spezifischen einschaltwiderstand und verfahren zur herstellung einer mos-transistorstruktur

Publications (2)

Publication Number Publication Date
EP1145324A2 EP1145324A2 (de) 2001-10-17
EP1145324A3 true EP1145324A3 (de) 2001-10-24

Family

ID=7902261

Family Applications (1)

Application Number Title Priority Date Filing Date
EP00920348A Withdrawn EP1145324A3 (de) 1999-03-24 2000-03-01 Mos-transistorstruktur mit einer trench-gate-elektrode und einem verringerten spezifischen einschaltwiderstand und verfahren zur herstellung einer mos-transistorstruktur

Country Status (5)

Country Link
US (1) US6465843B1 (de)
EP (1) EP1145324A3 (de)
JP (1) JP2002540603A (de)
DE (1) DE19913375B4 (de)
WO (1) WO2000057481A2 (de)

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US6818513B2 (en) 2001-01-30 2004-11-16 Fairchild Semiconductor Corporation Method of forming a field effect transistor having a lateral depletion structure
US6916745B2 (en) 2003-05-20 2005-07-12 Fairchild Semiconductor Corporation Structure and method for forming a trench MOSFET having self-aligned features
US6803626B2 (en) 2002-07-18 2004-10-12 Fairchild Semiconductor Corporation Vertical charge control semiconductor device
US6710403B2 (en) 2002-07-30 2004-03-23 Fairchild Semiconductor Corporation Dual trench power MOSFET
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US7033876B2 (en) 2001-07-03 2006-04-25 Siliconix Incorporated Trench MIS device having implanted drain-drift region and thick bottom oxide and process for manufacturing the same
US7009247B2 (en) 2001-07-03 2006-03-07 Siliconix Incorporated Trench MIS device with thick oxide layer in bottom of gate contact trench
US7291884B2 (en) * 2001-07-03 2007-11-06 Siliconix Incorporated Trench MIS device having implanted drain-drift region and thick bottom oxide
US6764906B2 (en) * 2001-07-03 2004-07-20 Siliconix Incorporated Method for making trench mosfet having implanted drain-drift region
US6569738B2 (en) * 2001-07-03 2003-05-27 Siliconix, Inc. Process for manufacturing trench gated MOSFET having drain/drift region
DE10239862B4 (de) * 2002-08-29 2007-03-15 Infineon Technologies Ag Trench-Transistorzelle, Transistoranordnung und Verfahren zur Herstellung einer Transistoranordnung
US7576388B1 (en) 2002-10-03 2009-08-18 Fairchild Semiconductor Corporation Trench-gate LDMOS structures
US6710418B1 (en) 2002-10-11 2004-03-23 Fairchild Semiconductor Corporation Schottky rectifier with insulation-filled trenches and method of forming the same
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US7368777B2 (en) 2003-12-30 2008-05-06 Fairchild Semiconductor Corporation Accumulation device with charge balance structure and method of forming the same
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DE102005012117B4 (de) * 2005-03-16 2008-10-16 Infineon Technologies Austria Ag Transistorbauelement
JP2006269720A (ja) * 2005-03-24 2006-10-05 Toshiba Corp 半導体素子及びその製造方法
DE112006000832B4 (de) 2005-04-06 2018-09-27 Fairchild Semiconductor Corporation Trenched-Gate-Feldeffekttransistoren und Verfahren zum Bilden derselben
DE112006001516T5 (de) 2005-06-10 2008-04-17 Fairchild Semiconductor Corp. Feldeffekttransistor mit Ladungsgleichgewicht
US7492003B2 (en) * 2006-01-24 2009-02-17 Siliconix Technology C. V. Superjunction power semiconductor device
US7446374B2 (en) 2006-03-24 2008-11-04 Fairchild Semiconductor Corporation High density trench FET with integrated Schottky diode and method of manufacture
US7319256B1 (en) 2006-06-19 2008-01-15 Fairchild Semiconductor Corporation Shielded gate trench FET with the shield and gate electrodes being connected together
US20090053869A1 (en) * 2007-08-22 2009-02-26 Infineon Technologies Austria Ag Method for producing an integrated circuit including a trench transistor and integrated circuit
CN101868856B (zh) 2007-09-21 2014-03-12 飞兆半导体公司 用于功率器件的超结结构及制造方法
US9484451B2 (en) 2007-10-05 2016-11-01 Vishay-Siliconix MOSFET active area and edge termination area charge balance
US7772668B2 (en) 2007-12-26 2010-08-10 Fairchild Semiconductor Corporation Shielded gate trench FET with multiple channels
JP5298565B2 (ja) * 2008-02-22 2013-09-25 富士電機株式会社 半導体装置およびその製造方法
US20120273916A1 (en) 2011-04-27 2012-11-01 Yedinak Joseph A Superjunction Structures for Power Devices and Methods of Manufacture
JP5216801B2 (ja) 2010-03-24 2013-06-19 株式会社東芝 半導体装置
US8432000B2 (en) 2010-06-18 2013-04-30 Fairchild Semiconductor Corporation Trench MOS barrier schottky rectifier with a planar surface using CMP techniques
CN102468169A (zh) * 2010-11-01 2012-05-23 中芯国际集成电路制造(上海)有限公司 Umos晶体管及其形成方法
US8836028B2 (en) 2011-04-27 2014-09-16 Fairchild Semiconductor Corporation Superjunction structures for power devices and methods of manufacture
US8786010B2 (en) 2011-04-27 2014-07-22 Fairchild Semiconductor Corporation Superjunction structures for power devices and methods of manufacture
US8673700B2 (en) 2011-04-27 2014-03-18 Fairchild Semiconductor Corporation Superjunction structures for power devices and methods of manufacture
US8772868B2 (en) 2011-04-27 2014-07-08 Fairchild Semiconductor Corporation Superjunction structures for power devices and methods of manufacture
KR101619580B1 (ko) 2011-05-18 2016-05-10 비쉐이-실리코닉스 반도체 장치
CN102412266B (zh) * 2011-10-13 2014-12-10 上海华虹宏力半导体制造有限公司 提高soa能力的功率器件结构及其制造方法
US9431249B2 (en) 2011-12-01 2016-08-30 Vishay-Siliconix Edge termination for super junction MOSFET devices
US9614043B2 (en) 2012-02-09 2017-04-04 Vishay-Siliconix MOSFET termination trench
US9842911B2 (en) 2012-05-30 2017-12-12 Vishay-Siliconix Adaptive charge balanced edge termination
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CN105632931B (zh) * 2014-11-04 2020-04-28 台湾积体电路制造股份有限公司 半导体器件的制造方法及半导体器件
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Also Published As

Publication number Publication date
JP2002540603A (ja) 2002-11-26
DE19913375B4 (de) 2009-03-26
WO2000057481A2 (de) 2000-09-28
DE19913375A1 (de) 2000-10-05
EP1145324A2 (de) 2001-10-17
WO2000057481A3 (de) 2001-07-26
US6465843B1 (en) 2002-10-15

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