EP0107233A1 - Basisbandsignal-Echoentzerrer - Google Patents

Basisbandsignal-Echoentzerrer Download PDF

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Publication number
EP0107233A1
EP0107233A1 EP83201433A EP83201433A EP0107233A1 EP 0107233 A1 EP0107233 A1 EP 0107233A1 EP 83201433 A EP83201433 A EP 83201433A EP 83201433 A EP83201433 A EP 83201433A EP 0107233 A1 EP0107233 A1 EP 0107233A1
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EP
European Patent Office
Prior art keywords
signal
circuit
data
filter
echo canceller
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EP83201433A
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English (en)
French (fr)
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EP0107233B1 (de
Inventor
Richard Brie
Loic Bernard Yves Guidoux
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Telecommunications Radioelectriques et Telephoniques SA TRT
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Telecommunications Radioelectriques et Telephoniques SA TRT
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B3/00—Line transmission systems
    • H04B3/02—Details
    • H04B3/20—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other
    • H04B3/23—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other using a replica of transmitted signal in the time domain, e.g. echo cancellers
    • H04B3/235—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other using a replica of transmitted signal in the time domain, e.g. echo cancellers combined with adaptive equaliser
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B3/00—Line transmission systems
    • H04B3/02—Details
    • H04B3/20—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other
    • H04B3/23—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other using a replica of transmitted signal in the time domain, e.g. echo cancellers
    • H04B3/238—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other using a replica of transmitted signal in the time domain, e.g. echo cancellers using initial training sequence

Definitions

  • the invention relates to an echo canceller used in a data transmission modem to cancel in the baseband signal of the reception channel, an echo signal generated by the data signal of the transmit channel, this canceller d comprising a difference circuit for forming a difference signal between the signal of the reception channel and an echo copy signal, this difference signal being applied to a decision circuit restoring the data signal, the copy signal echo being formed at a sampling frequency F at least equal to the frequency data from the transmission channel, using an adjustable digital processing device which is connected to the transmission channel and which comprises at least one transversal filter operating at times of frequency sampling and having coefficients which are adjusted to minimize a predetermined function of an error signal.
  • Echo cancellers are used in modems whose unidirectional transmission and reception channels are coupled by a coupling circuit so that these modems have two-wire access to the outside. It is known that when a link is established between two modems by their two-wire accesses, an echo signal created by the signal in the transmission path of the same modem can inadvertently occur in the reception channel of a modem and due to imperfections in its coupling circuit and / or signal reflections in the link. The purpose of an echo canceller is to automatically cancel this unwanted echo signal which is superimposed in the reception channel of a local modem on the useful signal originating from the remote modem, in the case of simultaneous duplex transmission.
  • Baseband echo cancellers obviously find direct use in baseband data modems. But we can also use cancellers in baseband echo in modems for transmitting data by modulation of a carrier, by making these echo cancellers work on the baseband signals resulting in the receiver from the demodulation of the received signal.
  • the adjustable digital processing device consists of a single transversal filter operating at sampling instants having the frequency data, so the sampling frequency F in the echo canceller is equal to this frequency .
  • This digital transversal filter therefore works at instants of frequency sampling on the data signal of the transmission channel and its coefficients are to be adjusted so that it generates at these sampling times a so-called echo copy signal, simulating the echo signal appearing in the reception channel.
  • This digital echo copy signal is converted to analog and then applied to a difference circuit to be subtracted from the signal in the receive channel to form a signal in which the echo signal is canceled.
  • the criterion used for the adjustment of the coefficients of the transversal filter is the minimization of a predetermined function (generally the mean square value) of an error signal.
  • This error signal must be significant of the echo signal when the echo canceller or the residual echo signal is switched on (difference between the echo signal and the echo copy signal) during the convergence of the echo canceller, this residual echo or echo signal being present in the difference circuit output signal.
  • This error signal to be converted to digital for the adjustment of the coefficients of the transversal filter is constituted in the echo cancellers known by the output signal of the difference circuit.
  • the useful data signal received is superimposed on the residual echo signal and its relative level becomes increasingly large during convergence. This can result in a problem that is related to the converted converter sant digital error signal and which can give rise to a stop of the convergence of the echo canceller for a relatively high residual echo signal.
  • the convergence of the echo canceller can possibly start if, at the sampling instants, the echo signal has a higher amplitude than the useful signal received, but this convergence stops when, at these instants of sampling, the residual echo signal reaches substantially the high level of the useful signal received.
  • Another solution described in the published French patent application No. 80 20 251 consists in making an estimate of the level of the useful signal received and in comparing at the sampling times the output signal of the difference circuit with two dependent positive and negative thresholds of this level, the error being considered as zero when said output signal is between these levels, and as positive or negative depending on whether said output signal is higher in absolute value than the positive threshold or the negative threshold.
  • the digital signal representative of the error signal and used for adjusting the coefficients is formed by two bits and the echo canceller can converge to a very reduced value of the residual echo signal.
  • the present invention provides another particularly simple solution of the same problem, by using for the adjustment of the coefficients an error signal which is formed in a completely different way, avoiding the use of an auxiliary signal and allowing convergence in n using only the sign of this error signal.
  • the error signal used to modify the coefficients of each transversal filter is determined at the present sampling instant by forming the difference between the value of the output signal of said difference circuit at this sampling instant and the value of the output signal of the difference circuit at a previous sampling instant, previously multiplied by the ratio of the value of the signal of data restored at the present sampling instant at the value of the data signal restored at the previous sampling instant, the modification of the coefficients being effected or not depending on whether the two said values of the restored data signal are different from zero or at minus one of these two values is zero.
  • the echo canceller of the invention makes it possible to cancel an echo signal superimposed on a received data signal, whether this received data signal results from the transmission side of a signal of multi-level data, a two-level data signal or a three-level data signal resulting from pseudoternary coding of two-level data.
  • the decision circuit can reproduce a data signal at two levels positive and negative and the error signal e (n) for each transversal filter can be formed as the difference or the sum of the values of the output signal of the difference circuit at the present sampling instant of the filter and at an earlier sampling instant depending on whether the values of the data signal restored at the present instant d 'sampling and at the previous sampling instant have the same sign or different signs.
  • a particularly simple embodiment of the echo canceller of the invention is obtained by using for the adjustment of the coefficients of each transversal filter the signal Sgn e (n) characterizing the sign of the error signal e (n), formed, for example, as just indicated in the case of two-level data or pseudoternary data.
  • the use of the error signal e (n) formed in accordance with the invention is suitable when the echo signal has approximately a lower level than the useful data signal received.
  • the echo signal risks having a higher level than the received useful signal, which occurs for example in the case of a long transmission line, it is advantageous to use for the adjustment of the coefficients of each transversal filter a signal E (n) having a zero value when the sign of the error signal characterized by Sgn e (n) and the sign of the output signal of the difference circuit are different and a value equal to + 1 or - 1 when these two signs are positive or negative at the same time.
  • the echo signal is reduced substantially to the level of the useful signal received using the signal consisting of the sign of the difference circuit output signal while in the final step the residual echo signal is reduced to an almost zero value using the signal Sgn [e (n)] formed in accordance with the invention.
  • FIG. 1 shows the structure of an echo canceller incorporated in a baseband data transmission modem and to which the invention applies.
  • This modem comprises a unidirectional transmission channel 1 and a unidirectional reception channel 2, which are coupled to a bidirectional transmission line 3 via the coupling circuit 4.
  • the transmission channel 1 is connected to a data source 6 which supplies data at a frequency 1 / T.
  • Those data can be of two levels or of the multilevel type (i.e. more than two levels).
  • the data from the source 6 is applied to a linear encoder 7 which provides an encoded signal having a spectrum more suitable for transmission than the initial data signal.
  • an initial two-level data signal it is possible, for example, to perform two-phase coding, with a coded signal remaining at two levels; one can also perform a so-called pseudoternary coding, with a coded signal having three possible levels including the zero level.
  • the coded data signal is amplified in the transmission amplifier 8 before being applied to the transmission access of the coupling circuit 4.
  • the data signal thus processed in the transmission channel 1 is transmitted to the remote modem not shown, via transmission line 3.
  • the data signal transmitted in the same way by the remote modem is received in the local modem shown in the figure, and it is directed by the coupling circuit 4, to the input of the reception channel 2 of this modem.
  • the received signal is first amplified in the reception amplifier 9, to be directed to the decision circuit 10 in which the received signal is sampled and which provides a data signal which can still be processed in d other unrepresented parts of the receiver. If the data supplied by the data source of the remote transmitter is of the two-level type or of the multilevel type and is not otherwise coded, the decision circuit 10 restores the same data signal when the echo canceller has converged.
  • the decision circuit 10 restores this data coded in biphase, with two levels. If the two-level data from the source of the remote transmitter have been coded in pseudoternary, the decision circuit 10 restores the initial data at two levels. Thus the decision circuit 10 always restores a data signal at two levels or a multilevel signal.
  • the sampling pulses used in the receiver and in particular in the decision circuit 10 to sample the received signal are supplied by a clock generator 11.
  • the latter generates a clock signal H of frequency y, which is synchronized by known means on the frequency signal T which is used in the remote modem to transmit the data.
  • the clock signal H supplied by the generator 11 thus synchronized is also used for the transmission of the data by the data source 6 of the local modem.
  • the echo canceller responsible for suppressing this echo signal e (t) comprises a difference circuit 12 which receives on its terminal (+) the signal ⁇ (t) + s (t) appearing in the reception channel and on its terminal (-) an echo copy signal (t) so as to form a difference signal r (t) such that:
  • the part [e (t) - (t)] of this difference signal is the residual echo signal which is practically zero when the convergence of the echo canceller is achieved.
  • the echo canceller comprises an adjustable digital processing device 13 which receives the signal supplied by the data source 6 and which must be adjusted to supply at sampling instants an echo copy signal. allowing cancellation of the echo signal in the signal difference r (t).
  • a processing device is envisaged consisting of a single digital transverse filter 13 operating at sampling instants having the frequency data supplied by the data source 6.
  • This filter 13 provides at these times nT, characterized by the integer n, the digital echo copy signal (not).
  • nT characterized by the integer n
  • the digital echo copy signal not.
  • d (n) the samples of the data applied to the instants n at the input of the transversal filter 13.
  • This transversal filter is arranged in the usual way to store at each instant n, N samples d (n - i) applied to its input (i integer ranging from 0 to N - 1), and to calculate the samples of the echo copy signal (n) according to the expression: C i representing the coefficients of the filter.
  • the digital echo copy signal thus calculated is applied to the digital-analog converter 14 which supplies the analog signal (t) applied to the input (-) of the difference circuit 12.
  • the coefficients C. of the transverse filter 13 are adjustable and adjusted in the adjustment circuit 15 so as to minimize a predetermined function of an error signal e (n) which is produced in digital form, at times n, in the circuit computation 16 and which must be significant of the echo signal, or of the residual echo signal present in the difference signal r (t).
  • the method of calculating this error signal e (n) will be explained below.
  • the coefficients C. of the filter 13 are adjusted so as to minimize the mean square value of the error signal e (n) or E [
  • the coefficients C i are adjusted by successive recurrences according to the recurrence formula: a being a coefficient less than 1.
  • ⁇ is a fixed coefficient of low value compared to 1, which conditions the magnitude of the modifications to be made to the coefficients C i (n) at the recurrence n, to obtain the coefficients C i (n + 1) at the recurrence (n + 1).
  • the practical recurrence formula (4) can be implemented in the adjustment circuit 15, according to a diagram shown in FIG. 2 for a coefficient C i .
  • the data signal d (n - i) available in a memory cell of the transversal filter 13 is applied to a multiplier circuit 17 to be multiplied by the error signal e (n) produced in the calculation circuit error 16.
  • the product thus formed is applied to the multiplier circuit 18 to be multiplied by the fixed coefficient ⁇ .
  • the modification term ⁇ .d (n - i) .e (n) thus formed is applied to an accumulator formed by the adder circuit 19 and the memory 20 providing a delay of a sampling period T.
  • the adder circuit forms the sum of the modification term calculated at time n and the coefficient C i (n) appearing at time n at the output of memory 20. This sum available at time n + 1 at the output of memory 20 constitutes the coefficient C i (n + 1) to be used at time n + 1 in the transversal filter 13.
  • the error signal e (n) used for adjusting the coefficients Ci of the transversal filter 13 is formed in the calculation circuit 16, by the samples r (n) converted to digital of the analog signal r (t) supplied by the difference circuit 12.
  • the conversion rate to form the digital error signal e (n) may be high and to reduce the cost of this conversion, we try to use only a one-bit converter giving the sign of the samples r (n) of the difference signal r (t).
  • the recurrence formula (6) is then applied by replacing e (n) by r (n).
  • the residual echo signal [ ⁇ e (n) - (n)] is greater than the useful signal received s (n)
  • the sign of r (n) is significant of the residual echo signal and the modification of the coefficients can be carried out in the correct direction to reduce the echo signal residual. This may occur for example for long transmission lines, when the echo canceller is put into service.
  • the sampling instants n can occur continuously at instants when the amplitude of the useful signal received s (n) is high and one can be found, as soon as the canceller is put into service. echo or very quickly during convergence, in the situation where the convergence of the echo canceller ceases, with a residual echo [ ⁇ (n) - (n)] having an amplitude of the order of magnitude of the high amplitude of the useful signal received s (n).
  • the present invention provides a simple solution and completely different from the solutions envisaged in the prior art.
  • the error signal e (n) used for the modification of the coefficients of the transversal filter 13 at a present sampling instant n is determined in the error calculation circuit 16 by forming the difference between the value r (n) at the instant n of the signal r (t) leaving the difference circuit 12 and the value of this signal r (t) at a sampling instant prior to the instant n, the latter value having been previously multiplied by the ratio of the value a (n) of the data signal restored by the decision circuit at time n, to the value of this data signal restored at said previous sampling instant.
  • the prior sampling instant considered may be the sampling instant (n - 1) T just preceding the instant nT and in this case, the error signal e (n) used for adjusting the coefficients g i in the echo canceller of the invention can be expressed by the formula:
  • the modifications of the coefficients are carried out with the error signal e (n): this occurs for example for multilevel data without zero level or for data at two levels or for data coded in pseudoternary.
  • the modifications of the coefficients are carried out with the error signal e (n) when the two values of the data signal a (n) and a (n - 1) are different from zero and are not performed when at least one of these two values is equal to zero.
  • the implementation of the invention can be carried out in the general case as indicated by the diagram of echo canceller of FIG. 3.
  • the signal r (t) supplied by the difference circuit 12 is sampled by the sampling and holding circuit 59 actuated by the signal H of frequency 1 T.
  • This sampled signal is applied to a delay circuit 60 producing an equal delay at a sampling period T so that at a sampling instant n, the values r (n) and r (n - 1) of the signal r are obtained at the input and at the output of this circuit 60 (t) leaving the difference circuit 12.
  • the data signal restored by the decision circuit 10 is applied to a delay circuit 61 also producing a delay equal to a period T so that at time n, we obtain at the input and at the output of this delay circuit 61, the values a (n) and a (n - 1) of the restored data signal.
  • the report is formed in circuit 62.
  • the multiplier circuit 63 forms the product r (n - 1). which is applied to the input (-) of the difference circuit 64.
  • This difference circuit 64 receives on its input (+) the quantity r (n) and also provides, in accordance with formula (7), the signal d ' error e (n) which is applied to the adjustment circuit 15 of the coefficients of the transversal filter 13.
  • an AND gate 65 has its two inputs connected respectively to the input and to the output of the delay circuit 61.
  • the AND gate 65 provides a logic signal x which authorizes the modification of the coefficients by the error signal e (n) when the two values a (n) and a (n - 1) of the restored data signal, are different from zero and does not authorize not this modification when at least one of these values a (n) and a (n - 1) is equal to zero.
  • the action of the logic signal x can for example be to cancel the term of modification of the coefficients applied to the adder circuit 19 (see FIG. 2), when the modification is not authorized.
  • the decision circuit 10 restores data at two positive and negative levels, in the form of the sign of the sampled signal r (t).
  • the error signal e (n) of formula (7) can be in the form:
  • FIG. 4 shows a particular embodiment of the calculation circuit 16 forming the signal Sgn [e (n)], in the case where the data signal restored by the decision circuit has two positive and negative levels, constituted by the sign of the signal r (t).
  • the elaboration of the quantities Sgn [e (n)] in this circuit 16 is based on the following relations, directly deduced from relations (9):
  • the difference circuit 12 receiving on its terminal (+) the signal of the reception channel e (t) + s (t) and on its terminal (-) the echo copy signal converted into analog (t).
  • the difference signal r (t) supplied by the circuit 12 is processed in the calculation circuit 16, in which it is notably applied to the cascade mounting of two sampling and holding circuits 23 and 24.
  • the first circuit 23 is actuated by the clock signal H having the frequency y and the second circuit 24 is actuated by the complementary signal H.
  • the operation of this arrangement 23, 24 is explained with the aid of FIG. 5.
  • the diagram 5a represents the clock signal H with rising edges occurring at times n - 2, n - 1 and n.
  • Diagram 5b represents the signal H.
  • Diagram 5c represents the analog difference signal r (t) which is applied to the input e l of circuit 23 and which has the values r (n - 2), r (n - 1 ), r (n) at times n - 2, n - 1, n. It is assumed that the sampling circuits 23 and 24 are conducting when their control signals H and H are in the low state and blocked when these signals are in the high state. We deduce the appearance of the signal at the output s 1 of the circuit 23 (that is to say at the input e 2 of the circuit 24), as shown in diagram 5d.
  • the shape of the signal at the output s 2 of the circuit 24, represented in the diagram 5e, is deduced from the diagram 5d, taking into account a certain time of establishment of the signal, when the circuit 24 becomes conducting.
  • the diagrams in FIG. 5 clearly show that just before a rising edge of the clock H, for example that which occurs at time n, the signal at the input e 1 of the circuit 23 has the value r (n) and the signal at the output s 2 of circuit 24 has the value r (n - 1).
  • the difference signal r (t) is applied to the input (+) of the two comparator circuits 25 and 26.
  • the signal obtained at the output of circuit 24 is applied directly to the input (-) of the comparator circuit 25 and, via an inverting amplifier 27, at the input (-) of comparator circuit 26.
  • the signals ⁇ (n) and Z (n) do represent the quantities Sgn necessary according to the formulas (19) to obtain the quantity Sgn [e (n)].
  • the signals ⁇ (n) and ⁇ (n) thus formed are applied to the input D of flip-flops 28 and 29, to be sampled on the rising edges of the clock signal H.
  • the signals A (n) and Z (n ) sampled are applied to the switching device 30 which is responsible, in application of the formulas (19), for directing to the output 21 of the calculation circuit 16 either the signal ⁇ (n) or the signal ⁇ (n) depending on whether the quantity PS (n) is positive or negative.
  • the switching device 30 is formed in the usual way using the AND gate 32 equipped with an inverting input, AND gate 33 and OR gate 34 mounted as shown in the figure. It is controlled by a logic control signal appearing on its terminal 39 and representative of the quantity PS (n).
  • This control signal is formed as follows: the difference signal r (t) is applied to the input (+) of the comparator circuit 22, the input (-) of which is at ground zero potential.
  • the output signal of the comparator circuit 22 thus representing the quantity Sgn [r (t)], is applied simultaneously to a first input of the Exclusive OR circuit 36 and to the input D of the flip-flop 37 to be sampled at the rising edges of l clock H.
  • the output of flip-flop 37 is connected to the second input of the Exclusive OR circuit 36.
  • the first input of the Exclusive OR circuit 36 therefore receives the quantity Sgn [r (n)] while its second input receives the quantity sgn [r (n - 1) that had been stored in the flip-flop 37 at the instant preceding n - 1.
  • the comparator circuit 22 associated at flip-flop 37 plays the role of the decision circuit referenced 10 in FIGS. 1 and 3.
  • the use of the error signal e (n) formed in accordance with the invention according to formula (7) or of the sign Sgn [e (n)] of this error signal allows the convergence of the echo canceller when conditions (11) and (14) are satisfied, which is for example the case, as soon as the echo canceller is put into service, for short transmission lines and well equalized.
  • this error signal e (n) or of its sign Sgn e (n) for the adjustment of the coefficients does not make it possible to obtain a convergence leading to the cancellation of the echo when conditions (11) and (14) are not checked, which is for example the case for long or poorly equalized transmission lines.
  • the echo signal e (t) has, when the echo canceller is put into service, a high level with respect to the level of the useful signal received s (t).
  • a known echo canceller using as an error signal the sign of the difference signal r (t), that is to say at the sampling times n the quantities Sgn [ (n)], can reduce the initial high echo signal for a long line, to a residual echo signal level having the order of magnitude of the level of the received useful signal.
  • the amplitude of the received signal s (t), at the sampling instants is variable, even in a homochronous transmission system, which contributes to a certain reduction in the level of the residual echo signal with a known echo canceller.
  • a variant of the invention therefore consists in jointly using the sign of the signal difference r (t) and the sign of the error signal e (n) to form a signal E (n) used as an error signal for the adjustment of the coefficients.
  • this 2-bit signal E (n) can take 3 values: the values + 1 or - 1 depending on whether the quantities Sgn [r (n)] and Sgn e [(n)] have the same value equal to + 1 or - 1 and the value 0 if the quantities Sgn [r (n)] and Sgn [e (n)] have different values.
  • This signal E (n) is used to modify the value of the coefficients Ci of the transversal filter 13, according to a recurrence formula analogous to formula (14), either:
  • this variant of the invention using such a signal E (n) makes it possible to obtain the convergence of the echo canceller for transmission lines equalized or not and of any length in the difficult case of systems. of homochronous transmission. Indeed, in any case, one of the quantities Sgn r (n) or Sgn [e (n)] used to form the signal E (n), successively takes the correct values allowing the modification of the coefficients in the sense of convergence, while the other quantity takes at least from time to time the same correct values.
  • FIG. 6 represents an embodiment of the circuit 16 calculating the signal E (n).
  • the circuit 16 in FIG. 6 includes all the elements of the circuit 16 in FIG. 4 bearing the references 22 to 38 and mounted in the same way.
  • the circuit 16 further comprises the logic device 40 using the signal Sgn r (n) formed at the output of the flip-flop 37 and the signal Sgn e (n) formed at the output of the switching circuit 30.
  • the device 40 is arranged to form from the logic signals Sgn [e (n)] and Sgn [r (n)], the signal E (n) expressed in the two's complement code, which is most practical for performing additions and subtractions necessary for setting the coefficients.
  • the function of the logic device 40 is described by the truth table in table I below:
  • the first two columns of Table I together show the four possible configurations for the set of two signals Sgn [e (n)] and Sgn [r (n)].
  • a logic signal "1" corresponds to a sign (+) for each of these two signals and a lo g i-signal that "0" corresponds to a sign (-).
  • the third and fourth columns indicate, with regard to these four configurations, the bit values to be obtained to form the signal E (n) in the two's complement code, in accordance with the definition of the signal E (n).
  • the third column indicated by LSB provides the least significant bit of the signal E (n)
  • the fourth column indicated by MSBS provides the other bits of the signal E (n).
  • the signals Sgn [r (n)] and Sgn [e (n)] are applied to the two inputs of the Exclusive OR circuit 41.
  • the output signal from the circuit 41 is applied to the inverter circuit 42 which supplies the LSB signal corresponding to the bit. the least significant of the signal E (n).
  • the signal Sgn [e (n)] is applied to the inverter circuit 43.
  • the output signals from the inverter circuits 42 and 43 are applied to the AND circuit 44 which supplies the MSBS signal corresponding to the other bits of the signal E (n).
  • the two signals LSB and MSBS are applied to the input D of the two flip-flops 45 and 46 to be sampled at the rising edges of the clock H.
  • the outputs of flip-flops 45 and 46 are connected to the output terminals 47 and 48 of circuit 16 On all of these two output terminals appears the signal E (n) expressed in the code of two's complements and intended to be used in the circuit 15 for adjusting the coefficients of the transversal filter 13.
  • the sample frequency - swims in the echo canceller that is to say the frequency at which the samples of the echo copy signal was equal to the frequency of the data signal in the transmission channel.
  • the digital processing device calculating the echo copy signal is composed, as shown in FIG. 1, of a transversal filter operating at the frequency 1 of the data.
  • the data signal to be transmitted is coded (in biphase for example) and transmitted in a frequency band whose maximum frequency is greater than the frequency Datas ; to cancel in the widest possible band the echo generated by this transmitted signal, it is necessary that in the echo canceller, the echo copy signal is provided with a sampling frequency much higher than the frequency Datas.
  • An echo canceller operating with a sampling frequency F e equal for example to 4 times the frequency of the transmitted data has a structure known per se which can be represented in the form shown in FIG. 7.
  • the data signal d (n) supplied by the data source 6 is applied in the device digital processing 50 to 4 cross filters 51-0, 51-1, 51-2, 51-3.
  • the signal d (n) is sampled using the clock signals H 0 , H 1 , H 2 , H 3 supplied by the clock generator 52, having the same frequency y, but offset between them a sampling period T e of the echo canceller.
  • the sampling instants produced by the clock signals H 0 to H 3 are given in Table II below:
  • each transversal filter 51-0 to 51-3 are calculated at the frequency y the samples of the echo copy signals o (n) to 3 (n), using coefficients which are set in setting circuits 53-0 to 53-3.
  • the analog echo copy signal e (t) is applied, as in the echo canceller of FIG. 1, to the difference circuit 12 which supplies the difference signal r (t), in which the echo signal e (t) is canceled after the convergence of the echo canceller.
  • the difference signal r (t) is applied to the calculation circuit 55 responsible for generating the error signals e (n) to e 3 (n) to be used in the circuits for adjusting the coefficients 53-0 to 53-3.
  • the present invention applies to this known structure of echo canceller, for calculating the error signals e (n) to e 3 (n).
  • These error signals can be calculated according to formulas (7), (8) or (9), using as present times the instants indicated in Table II and as previous sampling instants of the instants separated from the first by the period T of the data.
  • formula (8) gives the following expression for the error signals ⁇ o (n) to e 3 (n):
  • the echo canceller of FIG. 7 formed by four transversal filters 51-0 to 51-3 whose coefficients are adjusted according to recurrence formulas of the type of formula (4), using error signals e o (n) to e 3 (n) formed according to the formulas (20), behaves as if it consisted of 4 echo sub-cancellers, each of which has an operation identical to that of FIG. 1 and independent of the operation of the other echo cancellers. The convergence of these 4 echo sub-cancellers is obtained under the same conditions as the echo canceller of FIG. 1.
  • the variant of the invention consisting in using signals E 0 (n) to E can also be used for adjusting the coefficients of the filters 51-0 to 51-3 3 (n) formed from the signals Sgn e (n) to Sgn [e 3 (n)] and from the signals Sgn [r o (n)] to Sgn [r 3 (n)] formed by signal sampling Sgn [r (t)] at the instants determined by the clock signals H 0 to H 3 .
  • the signals E o (n) to E 3 (n) can each be formed according to the diagram in FIG. 6.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
EP83201433A 1982-10-11 1983-10-07 Basisbandsignal-Echoentzerrer Expired EP0107233B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR8216998A FR2534427A1 (fr) 1982-10-11 1982-10-11 Annuleur d'echo pour signal de donnees en bande de base
FR8216998 1982-10-11

Publications (2)

Publication Number Publication Date
EP0107233A1 true EP0107233A1 (de) 1984-05-02
EP0107233B1 EP0107233B1 (de) 1987-01-28

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US (1) US4571465A (de)
EP (1) EP0107233B1 (de)
JP (1) JPS59139732A (de)
AU (1) AU565362B2 (de)
CA (1) CA1211523A (de)
DE (1) DE3369617D1 (de)
FR (1) FR2534427A1 (de)

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EP0637141A2 (de) * 1993-07-30 1995-02-01 AT&T Corp. Unterdrückung von nahem Übersprechen

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LU85402A1 (de) * 1983-12-01 1984-09-11 Siemens Ag Verfahren und schaltungsanordnung zur kompensation von uebersprech-u./o.echosignalen
JPS6173434A (ja) * 1984-09-19 1986-04-15 Nec Corp エコ−除去方法
JPS6173435A (ja) * 1984-09-19 1986-04-15 Nec Corp エコ−除去装置
JPS6175629A (ja) * 1984-09-21 1986-04-18 Nec Corp エコ−除去方法
JPS6173432A (ja) * 1984-09-19 1986-04-15 Nec Corp エコ−除去装置
JPS6173430A (ja) * 1984-09-19 1986-04-15 Nec Corp エコ−除去装置
JPS6175633A (ja) * 1984-09-21 1986-04-18 Nec Corp エコ−除去方法
JPS6173433A (ja) * 1984-09-19 1986-04-15 Nec Corp エコ−除去方法
JPS6173431A (ja) * 1984-09-19 1986-04-15 Nec Corp エコ−除去方法
JPS6173429A (ja) * 1984-09-19 1986-04-15 Nec Corp エコ−除去方法
GB2164827B (en) * 1984-09-19 1988-04-20 Nec Corp Method of cancelling echoes in full-duplex data transmission system
JPS6175631A (ja) * 1984-09-21 1986-04-18 Nec Corp エコ−除去装置
JPS6175630A (ja) * 1984-09-21 1986-04-18 Nec Corp エコ−除去装置
JPS6175632A (ja) * 1984-09-21 1986-04-18 Nec Corp エコ−除去装置
JPS61187426A (ja) * 1985-02-14 1986-08-21 Nec Corp エコ−除去装置
JPS61200725A (ja) * 1985-03-01 1986-09-05 Nec Corp エコ−除去装置
JPS61228731A (ja) * 1985-04-02 1986-10-11 Nec Corp エコ−除去装置
JPS61228730A (ja) * 1985-04-02 1986-10-11 Nec Corp エコ−除去装置
JPS61234131A (ja) * 1985-04-09 1986-10-18 Nec Corp エコ−除去装置
SE447777B (sv) * 1985-04-22 1986-12-08 Ellemtel Utvecklings Ab Forfarande for instellning av ett digitalt utjemnarfilter vid samtidig adaptiv ekoeliminering och adaptiv eliminering av storningar som uppstar genom intersymbolinterferens, samt anordning for genomforande av forfarande
US4760596A (en) * 1986-02-25 1988-07-26 Gte Laboratories Incorporated Adaptive echo cancellation and equalization system signal processor and method therefor
US4970715A (en) * 1987-03-27 1990-11-13 Universal Data Systems, Inc. Modem with improved remote echo location and cancellation
US4989221A (en) * 1987-03-30 1991-01-29 Codex Corporation Sample rate converter
EP0287742B1 (de) * 1987-04-22 1993-01-13 International Business Machines Corporation Echokompensationseinrichtung für Datenübertragung über eine Zweidrahtleitung
EP0287743B1 (de) * 1987-04-22 1993-03-03 International Business Machines Corporation Echokompensationseinrichtung mit Korrektur von Phasenabweichungen
US4995030A (en) * 1988-02-01 1991-02-19 Memotec Datacom, Inc. Far end echo cancellation method and apparatus
JPH03262939A (ja) * 1990-03-14 1991-11-22 Fujitsu Ltd エコー経路変動検出方法およびその装置
ES2113320B1 (es) * 1996-05-30 1999-01-16 Alcatel Standard Electrica Dispositivo supresor del eco.
US7013226B2 (en) * 2003-10-14 2006-03-14 Intel Corporation Reflectometer with echo canceller
JP6221623B2 (ja) * 2013-10-23 2017-11-01 日本電気株式会社 情報処理装置、情報処理方法、プログラム

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EP0637141A2 (de) * 1993-07-30 1995-02-01 AT&T Corp. Unterdrückung von nahem Übersprechen
EP0637141A3 (de) * 1993-07-30 1995-08-16 At & T Corp Unterdrückung von nahem Übersprechen.

Also Published As

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JPH0310255B2 (de) 1991-02-13
AU565362B2 (en) 1987-09-10
US4571465A (en) 1986-02-18
FR2534427A1 (fr) 1984-04-13
AU2001483A (en) 1984-04-19
DE3369617D1 (en) 1987-03-05
FR2534427B1 (de) 1984-11-23
EP0107233B1 (de) 1987-01-28
CA1211523A (en) 1986-09-16
JPS59139732A (ja) 1984-08-10

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