DE69839635D1 - s und ein mit diesem Verfahren behandelter Siliziumwafer - Google Patents

s und ein mit diesem Verfahren behandelter Siliziumwafer

Info

Publication number
DE69839635D1
DE69839635D1 DE69839635T DE69839635T DE69839635D1 DE 69839635 D1 DE69839635 D1 DE 69839635D1 DE 69839635 T DE69839635 T DE 69839635T DE 69839635 T DE69839635 T DE 69839635T DE 69839635 D1 DE69839635 D1 DE 69839635D1
Authority
DE
Germany
Prior art keywords
silicon wafer
wafer treated
treated
silicon
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69839635T
Other languages
English (en)
Inventor
Norihiro Kobayashi
Toshihiko Miyano
Satoshi Oka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shin Etsu Handotai Co Ltd
Original Assignee
Shin Etsu Handotai Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shin Etsu Handotai Co Ltd filed Critical Shin Etsu Handotai Co Ltd
Application granted granted Critical
Publication of DE69839635D1 publication Critical patent/DE69839635D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3225—Thermally inducing defects using oxygen present in the silicon body for intrinsic gettering
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/974—Substrate surface preparation
DE69839635T 1997-10-30 1998-10-28 s und ein mit diesem Verfahren behandelter Siliziumwafer Expired - Lifetime DE69839635D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31446597A JP3346249B2 (ja) 1997-10-30 1997-10-30 シリコンウエーハの熱処理方法及びシリコンウエーハ

Publications (1)

Publication Number Publication Date
DE69839635D1 true DE69839635D1 (de) 2008-08-07

Family

ID=18053671

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69839635T Expired - Lifetime DE69839635D1 (de) 1997-10-30 1998-10-28 s und ein mit diesem Verfahren behandelter Siliziumwafer

Country Status (6)

Country Link
US (1) US6531416B1 (de)
EP (1) EP0915502B1 (de)
JP (1) JP3346249B2 (de)
KR (1) KR100562438B1 (de)
DE (1) DE69839635D1 (de)
TW (1) TW563174B (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5994761A (en) 1997-02-26 1999-11-30 Memc Electronic Materials Spa Ideal oxygen precipitating silicon wafers and oxygen out-diffusion-less process therefor
US6403502B1 (en) 1997-03-27 2002-06-11 Shin-Etsu Handotai Co., Ltd. Heat treatment method for a silicon wafer and a silicon wafer heat-treated by the method
JP3346249B2 (ja) * 1997-10-30 2002-11-18 信越半導体株式会社 シリコンウエーハの熱処理方法及びシリコンウエーハ
US6336968B1 (en) 1998-09-02 2002-01-08 Memc Electronic Materials, Inc. Non-oxygen precipitating czochralski silicon wafers
EP1114454A2 (de) 1998-09-02 2001-07-11 MEMC Electronic Materials, Inc. Silizium auf isolator struktur aus einem einkristallsilizium mit niedriger fehlerdichte
WO2000041227A1 (fr) * 1998-12-28 2000-07-13 Shin-Etsu Handotai Co.,Ltd. Procede de recuit thermique d'une plaquette de silicium, et plaquette de silicium
FR2797713B1 (fr) * 1999-08-20 2002-08-02 Soitec Silicon On Insulator Procede de traitement de substrats pour la microelectronique et substrats obtenus par ce procede
KR20070036804A (ko) * 1999-08-27 2007-04-03 고마쯔 덴시 긴조꾸 가부시끼가이샤 실리콘 웨이퍼 및 그 제조 방법, 실리콘 웨이퍼의 평가방법
DE19952705A1 (de) * 1999-11-02 2001-05-10 Wacker Siltronic Halbleitermat Verfahren zur Herstellung einer Halbleiterscheibe mit einer epitaktischen Schicht
DE10066099B4 (de) * 2000-09-25 2008-11-20 Mitsubishi Materials Silicon Corp. Wärmebehandlungsverfahren für einen Siliciumwafer
JP2002110685A (ja) * 2000-09-27 2002-04-12 Shin Etsu Handotai Co Ltd シリコンウェーハの熱処理方法
JP4720058B2 (ja) * 2000-11-28 2011-07-13 株式会社Ｓｕｍｃｏ シリコンウェーハの製造方法
JP5052728B2 (ja) 2002-03-05 2012-10-17 株式会社Ｓｕｍｃｏ シリコン単結晶層の製造方法
KR100398505B1 (ko) * 2003-02-05 2003-09-19 코닉 시스템 주식회사 단결정 실리콘 웨이퍼의 ｃｏｐ 제거방법
US20060009011A1 (en) * 2004-07-06 2006-01-12 Gary Barrett Method for recycling/reclaiming a monitor wafer
JP4183093B2 (ja) 2005-09-12 2008-11-19 コバレントマテリアル株式会社 シリコンウエハの製造方法
JP2008053521A (ja) 2006-08-25 2008-03-06 Ｓｕｍｃｏ Ｔｅｃｈｘｉｖ株式会社 シリコンウェーハの熱処理方法
WO2010109873A1 (ja) 2009-03-25 2010-09-30 株式会社Sumco シリコンウェーハおよびその製造方法
JP2013163598A (ja) * 2012-01-10 2013-08-22 Globalwafers Japan Co Ltd シリコンウェーハの製造方法
JP5660237B2 (ja) * 2014-03-18 2015-01-28 株式会社Sumco シリコンウェーハの製造方法
JP2018030765A (ja) * 2016-08-25 2018-03-01 信越半導体株式会社 シリコン単結晶ウェーハの製造方法、シリコンエピタキシャルウェーハの製造方法、シリコン単結晶ウェーハ及びシリコンエピタキシャルウェーハ

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4231809A (en) * 1979-05-25 1980-11-04 Bell Telephone Laboratories, Incorporated Method of removing impurity metals from semiconductor devices
JPS60247935A (ja) 1984-05-23 1985-12-07 Toshiba Ceramics Co Ltd 半導体ウエハの製造方法
US4617066A (en) * 1984-11-26 1986-10-14 Hughes Aircraft Company Process of making semiconductors having shallow, hyperabrupt doped regions by implantation and two step annealing
US4780174A (en) * 1986-12-05 1988-10-25 Lan Shan Ming Dislocation-free epitaxial growth in radio-frequency heating reactor
JPH02177541A (ja) * 1988-12-28 1990-07-10 Toshiba Ceramics Co Ltd シリコンウェハ及びシリコンウェハの熱処理方法
JPH03159118A (ja) * 1989-11-16 1991-07-09 Hitachi Cable Ltd 砒化ガリウム単結晶ウェハの熱処理方法
JPH0684925A (ja) * 1992-07-17 1994-03-25 Toshiba Corp 半導体基板およびその処理方法
JP3022044B2 (ja) 1993-04-09 2000-03-15 東芝セラミックス株式会社 シリコンウエハの製造方法およびシリコンウエハ
JP3410828B2 (ja) 1993-10-15 2003-05-26 コマツ電子金属株式会社 シリコンウェーハの製造方法
US5474022A (en) * 1994-04-21 1995-12-12 Mitsubishi Materials Corporation Double crucible for growing a silicon single crystal
JPH07321104A (ja) * 1994-05-25 1995-12-08 Komatsu Electron Metals Co Ltd シリコンウェーハの熱処理方法
JP3285111B2 (ja) * 1994-12-05 2002-05-27 信越半導体株式会社 結晶欠陥の少ないシリコン単結晶の製造方法
US5788763A (en) * 1995-03-09 1998-08-04 Toshiba Ceramics Co., Ltd. Manufacturing method of a silicon wafer having a controlled BMD concentration
KR100200973B1 (ko) * 1995-03-20 1999-06-15 후지이 아키히로 경사표면 실리콘 웨이퍼, 그 형성방법 및 반도체소자
JPH097907A (ja) * 1995-06-20 1997-01-10 Toshiba Ceramics Co Ltd 裏面ポリシリコン付きウエーハ及びその製造方法
DE19622664A1 (de) * 1996-06-05 1997-12-11 Wacker Siltronic Halbleitermat Verfahren und Vorrichtung zur Herstellung von Einkristallen
GB2314346A (en) * 1996-06-22 1997-12-24 Northern Telecom Ltd Rapid thermal annealing
DE19637182A1 (de) * 1996-09-12 1998-03-19 Wacker Siltronic Halbleitermat Verfahren zur Herstellung von Halbleiterscheiben aus Silicium mit geringer Defektdichte
CN1253610C (zh) * 1997-04-09 2006-04-26 Memc电子材料有限公司 低缺陷密度、自间隙原子受控制的硅
JP3919308B2 (ja) * 1997-10-17 2007-05-23 信越半導体株式会社 結晶欠陥の少ないシリコン単結晶の製造方法ならびにこの方法で製造されたシリコン単結晶およびシリコンウエーハ
JP3346249B2 (ja) * 1997-10-30 2002-11-18 信越半導体株式会社 シリコンウエーハの熱処理方法及びシリコンウエーハ
JP3407629B2 (ja) * 1997-12-17 2003-05-19 信越半導体株式会社 シリコン単結晶ウエーハの熱処理方法ならびにシリコン単結晶ウエーハ

Also Published As

Publication number Publication date
EP0915502B1 (de) 2008-06-25
EP0915502A2 (de) 1999-05-12
TW563174B (en) 2003-11-21
US6531416B1 (en) 2003-03-11
KR19990037496A (ko) 1999-05-25
KR100562438B1 (ko) 2006-07-06
EP0915502A3 (de) 2000-02-23
JPH11135514A (ja) 1999-05-21
JP3346249B2 (ja) 2002-11-18

Similar Documents

Publication Publication Date Title
DE69839635D1 (de) s und ein mit diesem Verfahren behandelter Siliziumwafer
DE69814710D1 (de) Beschichtungs-Vorrichtung und Verfahren
DE69834401D1 (de) Businterfacesystem und verfahren
DE69534700D1 (de) Halbleiteranordnungen und verfahren
DE59806872D1 (de) Leistungshalbleiter-bauelement und verfahren zu dessen herstellung
DE19580932T1 (de) Verfahren und Vorrichtung zum Polieren von Wafern
DE69732650D1 (de) Halbleiter brückenelement mit oberflächenverbindung, vorrichtungen und verfahren
DE59704120D1 (de) Verfahren und Vorrichtung zum Polieren von Halbleiterscheiben
DE59801545D1 (de) Beschichtungsverfahren und vorrichtung
DE69607547D1 (de) Verfahren und Vorrichtung zum Polieren von Halbleiterscheiben
DE59802824D1 (de) Verfahren und Vorrichtung zum Polieren von Halbleiterscheiben
DE69809213D1 (de) Telekommunikationsgerät und verfahren
DE69737588D1 (de) Halbleiteranordnung und Herstellungsverfahren dafür
DE59807823D1 (de) Verfahren und einrichtung zum serienweisen Beschichten von Werkstücken
DE69615603D1 (de) Vorrichtung und Verfahren zum Reinigen von Halbleiterplättchen
DE69800975T2 (de) Verfahren und Vorrichtung zu Oberflächenbehandlung
DE69738525D1 (de) Pilz-antigene und verfahren zu deren herstellung
DE69509561T2 (de) Verfahren und Vorrichtung zum Abfasen von Halbleiterscheiben
DE69829919D1 (de) Polierverfahren und Vorrichtung
DE69816818D1 (de) Mehrheitsentscheidungsvorrichtung und entsprechendes verfahren
DE69618882T2 (de) Verfahren und Vorrichtung zum Polieren von Halbleitersubstraten
DE69808881T2 (de) Verfahren und einrichtung zum verbesserten verbindungsaufbau
DE69802063D1 (de) Belichtungsapparat und Verfahren
DE69820184D1 (de) Lichtemittierendes Halbleiterbauelement und Verfahren zu dessen Herstellung
DE69703312T2 (de) Vorrichtung und Verfahren zum Polieren von Halbleiterscheiben

Legal Events

Date Code Title Description
8364 No opposition during term of opposition