DE69837054T2 - GASIMMERSIONSLASER-ERHITZUNGSMETHODE GEEIGNET ZUR HERSTELLUNG INTEGRIERTER SCHALTUNGEN VON REDUZIERTER GRÖßE - Google Patents

GASIMMERSIONSLASER-ERHITZUNGSMETHODE GEEIGNET ZUR HERSTELLUNG INTEGRIERTER SCHALTUNGEN VON REDUZIERTER GRÖßE Download PDF

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Publication number
DE69837054T2
DE69837054T2 DE69837054T DE69837054T DE69837054T2 DE 69837054 T2 DE69837054 T2 DE 69837054T2 DE 69837054 T DE69837054 T DE 69837054T DE 69837054 T DE69837054 T DE 69837054T DE 69837054 T2 DE69837054 T2 DE 69837054T2
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DE
Germany
Prior art keywords
silicon
mosfets
layer
source
depth
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69837054T
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German (de)
English (en)
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DE69837054D1 (de
Inventor
Somit Los Gatos TALWAR
Kurt San Jose WEINER
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Ultratech Inc
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Ultratech Inc
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Filing date
Publication date
Application filed by Ultratech Inc filed Critical Ultratech Inc
Publication of DE69837054D1 publication Critical patent/DE69837054D1/de
Application granted granted Critical
Publication of DE69837054T2 publication Critical patent/DE69837054T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/948—Radiation resist
    • Y10S438/952—Utilizing antireflective layer

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Toxicology (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Recrystallisation Techniques (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
DE69837054T 1998-08-27 1998-11-25 GASIMMERSIONSLASER-ERHITZUNGSMETHODE GEEIGNET ZUR HERSTELLUNG INTEGRIERTER SCHALTUNGEN VON REDUZIERTER GRÖßE Expired - Lifetime DE69837054T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/141,842 US5956603A (en) 1998-08-27 1998-08-27 Gas immersion laser annealing method suitable for use in the fabrication of reduced-dimension integrated circuits
US141842 1998-08-27
PCT/US1998/025264 WO2000013213A1 (en) 1998-08-27 1998-11-25 Gas immersion laser annealing method suitable for use in the fabrication of reduced-dimension integrated circuits

Publications (2)

Publication Number Publication Date
DE69837054D1 DE69837054D1 (de) 2007-03-22
DE69837054T2 true DE69837054T2 (de) 2007-06-06

Family

ID=22497510

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69837054T Expired - Lifetime DE69837054T2 (de) 1998-08-27 1998-11-25 GASIMMERSIONSLASER-ERHITZUNGSMETHODE GEEIGNET ZUR HERSTELLUNG INTEGRIERTER SCHALTUNGEN VON REDUZIERTER GRÖßE

Country Status (7)

Country Link
US (1) US5956603A (enExample)
EP (1) EP1121713B1 (enExample)
JP (1) JP4295922B2 (enExample)
KR (1) KR100582484B1 (enExample)
DE (1) DE69837054T2 (enExample)
TW (1) TW409293B (enExample)
WO (1) WO2000013213A1 (enExample)

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US6521501B1 (en) * 1999-05-11 2003-02-18 Advanced Micro Devices, Inc. Method of forming a CMOS transistor having ultra shallow source and drain regions
US6586318B1 (en) * 1999-12-28 2003-07-01 Xerox Corporation Thin phosphorus nitride film as an N-type doping source used in laser doping technology
JP2001313390A (ja) * 2000-02-29 2001-11-09 Agere Systems Inc 半導体材料における選択的レーザ・アニール
US6570656B1 (en) 2000-04-10 2003-05-27 Ultratech Stepper, Inc. Illumination fluence regulation system and method for use in thermal processing employed in the fabrication of reduced-dimension integrated circuits
US6645838B1 (en) * 2000-04-10 2003-11-11 Ultratech Stepper, Inc. Selective absorption process for forming an activated doped region in a semiconductor
US6635588B1 (en) * 2000-06-12 2003-10-21 Ultratech Stepper, Inc. Method for laser thermal processing using thermally induced reflectivity switch
JP4389359B2 (ja) * 2000-06-23 2009-12-24 日本電気株式会社 薄膜トランジスタ及びその製造方法
US6335253B1 (en) 2000-07-12 2002-01-01 Chartered Semiconductor Manufacturing Ltd. Method to form MOS transistors with shallow junctions using laser annealing
JP2002050764A (ja) * 2000-08-02 2002-02-15 Matsushita Electric Ind Co Ltd 薄膜トランジスタ、アレイ基板、液晶表示装置、有機ｅｌ表示装置およびその製造方法
US6391695B1 (en) * 2000-08-07 2002-05-21 Advanced Micro Devices, Inc. Double-gate transistor formed in a thermal process
US6635541B1 (en) * 2000-09-11 2003-10-21 Ultratech Stepper, Inc. Method for annealing using partial absorber layer exposed to radiant energy and article made with partial absorber layer
US6479821B1 (en) * 2000-09-11 2002-11-12 Ultratech Stepper, Inc. Thermally induced phase switch for laser thermal processing
US6730583B2 (en) * 2000-10-26 2004-05-04 Hynix Semiconductor Inc. Method for fabricating semiconductor device
US6365476B1 (en) 2000-10-27 2002-04-02 Ultratech Stepper, Inc. Laser thermal process for fabricating field-effect transistors
JP4845299B2 (ja) 2001-03-09 2011-12-28 富士通セミコンダクター株式会社 半導体装置の製造方法
US6720241B2 (en) * 2001-06-18 2004-04-13 Matsushita Electric Industrial Co., Ltd. Method for manufacturing semiconductor device
JP4209606B2 (ja) * 2001-08-17 2009-01-14 株式会社半導体エネルギー研究所 半導体装置の作製方法
TWI282126B (en) * 2001-08-30 2007-06-01 Semiconductor Energy Lab Method for manufacturing semiconductor device
US7112517B2 (en) 2001-09-10 2006-09-26 Semiconductor Energy Laboratory Co., Ltd. Laser treatment device, laser treatment method, and semiconductor device fabrication method
US7317205B2 (en) * 2001-09-10 2008-01-08 Semiconductor Energy Laboratory Co., Ltd. Light emitting device and method of manufacturing a semiconductor device
US6734081B1 (en) * 2001-10-24 2004-05-11 Lsi Logic Corporation Shallow trench isolation structure for laser thermal processing
US6723634B1 (en) * 2002-03-14 2004-04-20 Advanced Micro Devices, Inc. Method of forming interconnects with improved barrier layer adhesion
US7135423B2 (en) * 2002-05-09 2006-11-14 Varian Semiconductor Equipment Associates, Inc Methods for forming low resistivity, ultrashallow junctions with low damage
US6803270B2 (en) * 2003-02-21 2004-10-12 International Business Machines Corporation CMOS performance enhancement using localized voids and extended defects
JP4589606B2 (ja) 2003-06-02 2010-12-01 住友重機械工業株式会社 半導体装置の製造方法
JP2005101196A (ja) * 2003-09-24 2005-04-14 Hitachi Ltd 半導体集積回路装置の製造方法
US7109087B2 (en) * 2003-10-03 2006-09-19 Applied Materials, Inc. Absorber layer for DSA processing
US6897118B1 (en) * 2004-02-11 2005-05-24 Chartered Semiconductor Manufacturing Ltd. Method of multiple pulse laser annealing to activate ultra-shallow junctions
US7145104B2 (en) * 2004-02-26 2006-12-05 Ultratech, Inc. Silicon layer for uniformizing temperature during photo-annealing
US7622374B2 (en) * 2005-12-29 2009-11-24 Infineon Technologies Ag Method of fabricating an integrated circuit
US20070212859A1 (en) * 2006-03-08 2007-09-13 Paul Carey Method of thermal processing structures formed on a substrate
WO2007103643A2 (en) * 2006-03-08 2007-09-13 Applied Materials, Inc. Method and apparatus for thermal processing structures formed on a substrate
US7548364B2 (en) 2006-07-31 2009-06-16 Applied Materials, Inc. Ultra-fast beam dithering with surface acoustic wave modulator
US20080025354A1 (en) * 2006-07-31 2008-01-31 Dean Jennings Ultra-Fast Beam Dithering with Surface Acoustic Wave Modulator
US20080045041A1 (en) * 2006-08-17 2008-02-21 Toshiba America Electronic Components, Inc. Liquid Immersion Laser Spike Anneal
US7692275B2 (en) * 2007-02-26 2010-04-06 International Business Machines Corporation Structure and method for device-specific fill for improved anneal uniformity
US7759773B2 (en) * 2007-02-26 2010-07-20 International Business Machines Corporation Semiconductor wafer structure with balanced reflectance and absorption characteristics for rapid thermal anneal uniformity
US7745909B2 (en) * 2007-02-26 2010-06-29 International Business Machines Corporation Localized temperature control during rapid thermal anneal
US20090096066A1 (en) * 2007-10-10 2009-04-16 Anderson Brent A Structure and Method for Device-Specific Fill for Improved Anneal Uniformity
US7679166B2 (en) * 2007-02-26 2010-03-16 International Business Machines Corporation Localized temperature control during rapid thermal anneal
US7732353B2 (en) * 2007-04-18 2010-06-08 Ultratech, Inc. Methods of forming a denuded zone in a semiconductor wafer using rapid laser annealing
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US9302348B2 (en) 2011-06-07 2016-04-05 Ultratech Inc. Ultrafast laser annealing with reduced pattern density effects in integrated circuit fabrication
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Also Published As

Publication number Publication date
DE69837054D1 (de) 2007-03-22
JP2002524846A (ja) 2002-08-06
EP1121713B1 (en) 2007-02-07
EP1121713A1 (en) 2001-08-08
EP1121713A4 (en) 2003-07-16
WO2000013213A1 (en) 2000-03-09
KR20010074629A (ko) 2001-08-04
US5956603A (en) 1999-09-21
JP4295922B2 (ja) 2009-07-15
KR100582484B1 (ko) 2006-05-24
TW409293B (en) 2000-10-21

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