DE69808956D1 - Teilweise abschaltbare spannungsversorgung für integrierte schaltkreise - Google Patents
Teilweise abschaltbare spannungsversorgung für integrierte schaltkreiseInfo
- Publication number
- DE69808956D1 DE69808956D1 DE69808956T DE69808956T DE69808956D1 DE 69808956 D1 DE69808956 D1 DE 69808956D1 DE 69808956 T DE69808956 T DE 69808956T DE 69808956 T DE69808956 T DE 69808956T DE 69808956 D1 DE69808956 D1 DE 69808956D1
- Authority
- DE
- Germany
- Prior art keywords
- memory
- partial
- power supply
- integrated circuits
- disconnectable power
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
- G11C29/83—Masking faults in memories by using spares or by reconfiguring using programmable devices with reduced power consumption
- G11C29/832—Masking faults in memories by using spares or by reconfiguring using programmable devices with reduced power consumption with disconnection of faulty elements
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/44—Indication or identification of errors, e.g. for repair
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/88—Masking faults in memories by using spares or by reconfiguring with partially good memories
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dram (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Amplifiers (AREA)
- Transmitters (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/918,637 US5946257A (en) | 1996-07-24 | 1997-08-22 | Selective power distribution circuit for an integrated circuit |
PCT/US1998/017512 WO1999010891A1 (en) | 1997-08-22 | 1998-08-24 | Selective power distribution circuit for an integrated circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69808956D1 true DE69808956D1 (de) | 2002-11-28 |
DE69808956T2 DE69808956T2 (de) | 2003-09-11 |
Family
ID=25440710
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69808956T Expired - Lifetime DE69808956T2 (de) | 1997-08-22 | 1998-08-24 | Teilweise abschaltbare spannungsversorgung für integrierte schaltkreise |
Country Status (8)
Country | Link |
---|---|
US (3) | US5946257A (de) |
EP (1) | EP1019910B1 (de) |
JP (1) | JP2001514428A (de) |
KR (1) | KR100358670B1 (de) |
AT (1) | ATE226752T1 (de) |
AU (1) | AU9117298A (de) |
DE (1) | DE69808956T2 (de) |
WO (1) | WO1999010891A1 (de) |
Families Citing this family (51)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AU3962995A (en) * | 1994-10-19 | 1996-05-15 | Micron Technology, Inc. | An efficient method for obtaining usable parts from a partially good memory integrated circuit |
US5946257A (en) * | 1996-07-24 | 1999-08-31 | Micron Technology, Inc. | Selective power distribution circuit for an integrated circuit |
US6094395A (en) * | 1998-03-27 | 2000-07-25 | Infineon Technologies North America Corp. | Arrangement for controlling voltage generators in multi-voltage generator chips such as DRAMs |
US6421810B1 (en) * | 1999-05-05 | 2002-07-16 | National Semiconductor Corporation | Scalable parallel test bus and testing method |
DE19924153B4 (de) * | 1999-05-26 | 2006-02-09 | Infineon Technologies Ag | Schaltungsanordnung zur Reparatur eines Halbleiterspeichers |
US6496421B1 (en) | 2000-08-31 | 2002-12-17 | Micron Technology, Inc. | Distributed cell plate and/or digit equilibrate voltage generator |
US6563339B2 (en) * | 2001-01-31 | 2003-05-13 | Micron Technology, Inc. | Multiple voltage supply switch |
KR100426989B1 (ko) * | 2001-06-13 | 2004-04-13 | 삼성전자주식회사 | 패키지 전원핀을 이용한 제어신호 인가방법 및 그에 따른집적회로 패키지 구조 |
US7139397B2 (en) * | 2001-07-20 | 2006-11-21 | Stmicroelectronics S.R.L. | Hybrid architecture for realizing a random numbers generator |
US7057866B2 (en) * | 2001-08-14 | 2006-06-06 | International Business Machines Corp. | System and method for disconnecting a portion of an integrated circuit |
US6525982B1 (en) * | 2001-09-11 | 2003-02-25 | Micron Technology, Inc. | Methods of programming and circuitry for a programmable element |
US6704228B2 (en) * | 2001-12-28 | 2004-03-09 | Samsung Electronics Co., Ltd | Semiconductor memory device post-repair circuit and method |
DE10203129A1 (de) * | 2002-01-25 | 2003-08-07 | Infineon Technologies Ag | Schaltungsanordnung |
US6856569B2 (en) * | 2003-01-10 | 2005-02-15 | International Business Machines Corporation | Method and system for merging multiple fuse decompression serial bitstreams to support auxiliary fuseblow capability |
US7779285B2 (en) * | 2003-02-18 | 2010-08-17 | Oracle America, Inc. | Memory system including independent isolated power for each memory module |
US7437632B2 (en) * | 2003-06-24 | 2008-10-14 | Micron Technology, Inc. | Circuits and methods for repairing defects in memory devices |
DE60325576D1 (de) * | 2003-07-16 | 2009-02-12 | St Microelectronics Srl | Redundanzschema für einen integrierten Speicherbaustein |
US7549139B1 (en) | 2003-09-19 | 2009-06-16 | Xilinx, Inc. | Tuning programmable logic devices for low-power design implementation |
US7498836B1 (en) | 2003-09-19 | 2009-03-03 | Xilinx, Inc. | Programmable low power modes for embedded memory blocks |
US7098689B1 (en) * | 2003-09-19 | 2006-08-29 | Xilinx, Inc. | Disabling unused/inactive resources in programmable logic devices for static power reduction |
US7581124B1 (en) | 2003-09-19 | 2009-08-25 | Xilinx, Inc. | Method and mechanism for controlling power consumption of an integrated circuit |
US7504854B1 (en) * | 2003-09-19 | 2009-03-17 | Xilinx, Inc. | Regulating unused/inactive resources in programmable logic devices for static power reduction |
US7498839B1 (en) | 2004-10-22 | 2009-03-03 | Xilinx, Inc. | Low power zones for programmable logic devices |
KR100670700B1 (ko) * | 2004-10-30 | 2007-01-17 | 주식회사 하이닉스반도체 | 지연고정루프의 전원공급회로 |
DE102005015319B4 (de) * | 2005-04-01 | 2008-04-10 | Infineon Technologies Ag | Elektrisches System mit fehlerhaften Speicherbereichen und Verfahren zum Testen von Speicherbereichen |
US7624318B2 (en) * | 2005-09-27 | 2009-11-24 | International Business Machines Corporation | Method and apparatus for automatically identifying multiple combinations of operational and non-operational components on integrated circuit chips with a single part number |
US7498835B1 (en) | 2005-11-04 | 2009-03-03 | Xilinx, Inc. | Implementation of low power standby modes for integrated circuits |
KR100647473B1 (ko) * | 2005-11-16 | 2006-11-23 | 삼성전자주식회사 | 멀티 칩 패키지 반도체 장치 및 불량 검출방법 |
US7345944B1 (en) | 2006-01-11 | 2008-03-18 | Xilinx, Inc. | Programmable detection of power failure in an integrated circuit |
US7609561B2 (en) * | 2006-01-18 | 2009-10-27 | Apple Inc. | Disabling faulty flash memory dies |
CA2541046A1 (en) * | 2006-03-27 | 2007-09-27 | Mosaid Technologies Incorporated | Power supply testing architecture |
US7701797B2 (en) * | 2006-05-15 | 2010-04-20 | Apple Inc. | Two levels of voltage regulation supplied for logic and data programming voltage of a memory device |
US7639542B2 (en) * | 2006-05-15 | 2009-12-29 | Apple Inc. | Maintenance operations for multi-level data storage cells |
US8000134B2 (en) | 2006-05-15 | 2011-08-16 | Apple Inc. | Off-die charge pump that supplies multiple flash devices |
US7911834B2 (en) * | 2006-05-15 | 2011-03-22 | Apple Inc. | Analog interface for a flash memory die |
US7568135B2 (en) | 2006-05-15 | 2009-07-28 | Apple Inc. | Use of alternative value in cell detection |
US7802157B2 (en) * | 2006-06-22 | 2010-09-21 | Micron Technology, Inc. | Test mode for multi-chip integrated circuit packages |
KR100784869B1 (ko) * | 2006-06-26 | 2007-12-14 | 삼성전자주식회사 | 대기 전류를 줄일 수 있는 메모리 시스템 |
JP4967532B2 (ja) * | 2006-08-25 | 2012-07-04 | 富士通セミコンダクター株式会社 | 半導体集積回路および半導体集積回路のテスト方法 |
KR100802060B1 (ko) * | 2007-02-02 | 2008-02-11 | 삼성전자주식회사 | 과도한 특정 스트레스 항목의 인가를 방지하는 반도체메모리 장치 및 그것의 테스트 방법 |
CN101636837B (zh) * | 2007-03-23 | 2011-07-27 | 富士通株式会社 | 电子装置、安装有电子装置的电子设备、安装有电子装置的物品、电子装置的制造方法 |
US20080291760A1 (en) * | 2007-05-23 | 2008-11-27 | Micron Technology, Inc. | Sub-array architecture memory devices and related systems and methods |
KR100907000B1 (ko) * | 2007-06-11 | 2009-07-08 | 주식회사 하이닉스반도체 | 리던던시 회로 |
US20100128447A1 (en) * | 2008-11-21 | 2010-05-27 | Tyco Electronics Corporation | Memory module having voltage regulator module |
US8526252B2 (en) * | 2009-03-17 | 2013-09-03 | Seagate Technology Llc | Quiescent testing of non-volatile memory array |
US8705281B2 (en) * | 2010-04-06 | 2014-04-22 | Intel Corporation | Method and system to isolate memory modules in a solid state drive |
US8823405B1 (en) | 2010-09-10 | 2014-09-02 | Xilinx, Inc. | Integrated circuit with power gating |
US9256279B2 (en) | 2011-06-29 | 2016-02-09 | Rambus Inc. | Multi-element memory device with power control for individual elements |
WO2014059082A2 (en) | 2012-10-12 | 2014-04-17 | Everspin Technologies, Inc. | Memory device with reduced on-chip noise |
US10446532B2 (en) | 2016-01-13 | 2019-10-15 | Invensas Bonding Technologies, Inc. | Systems and methods for efficient transfer of semiconductor elements |
US20240071437A1 (en) * | 2022-08-30 | 2024-02-29 | Micron Technology, Inc. | Die Disablement |
Family Cites Families (33)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3762037A (en) * | 1971-03-30 | 1973-10-02 | Ibm | Method of testing for the operability of integrated semiconductor circuits having a plurality of separable circuits |
US3750116A (en) | 1972-06-30 | 1973-07-31 | Ibm | Half good chip with low power dissipation |
EP0480915B1 (de) | 1985-08-20 | 1995-11-22 | STMicroelectronics, Inc. | Schaltung zur Ausschaltung von Fehlerhaften Elementen mit durch Laser durchgebrannter Sicherung |
US4829481A (en) | 1985-08-20 | 1989-05-09 | Sgs-Thomson Microelectronics, Inc. | Defective element disabling circuit having a laser-blown fuse |
JPH0731908B2 (ja) * | 1985-10-09 | 1995-04-10 | 株式会社東芝 | 半導体記憶装置 |
JP3162689B2 (ja) | 1986-11-03 | 2001-05-08 | ヒューレット・パッカード・カンパニー | メモリ・システム |
US4939694A (en) | 1986-11-03 | 1990-07-03 | Hewlett-Packard Company | Defect tolerant self-testing self-repairing memory system |
JPS63164100A (ja) | 1986-12-26 | 1988-07-07 | Hiroshi Nakamura | 半導体集積回路メモリ |
JPS63217821A (ja) | 1987-03-06 | 1988-09-09 | Toshiba Corp | 半導体集積回路 |
US5134584A (en) * | 1988-07-22 | 1992-07-28 | Vtc Incorporated | Reconfigurable memory |
US5025344A (en) * | 1988-11-30 | 1991-06-18 | Carnegie Mellon University | Built-in current testing of integrated circuits |
US5235548A (en) * | 1989-04-13 | 1993-08-10 | Dallas Semiconductor Corp. | Memory with power supply intercept in redundancy logic |
US4992984A (en) * | 1989-12-28 | 1991-02-12 | International Business Machines Corporation | Memory module utilizing partially defective memory chips |
US5181205A (en) * | 1990-04-10 | 1993-01-19 | National Semiconductor Corporation | Short circuit detector circuit for memory arrays |
JP3001252B2 (ja) * | 1990-11-16 | 2000-01-24 | 株式会社日立製作所 | 半導体メモリ |
KR940008208B1 (ko) * | 1990-12-22 | 1994-09-08 | 삼성전자주식회사 | 반도체 메모리장치의 리던던트 장치 및 방법 |
US5235550A (en) * | 1991-05-16 | 1993-08-10 | Micron Technology, Inc. | Method for maintaining optimum biasing voltage and standby current levels in a DRAM array having repaired row-to-column shorts |
JP2812004B2 (ja) * | 1991-06-27 | 1998-10-15 | 日本電気株式会社 | スタティック型ランダムアクセスメモリ装置 |
KR940008286B1 (ko) * | 1991-08-19 | 1994-09-09 | 삼성전자 주식회사 | 내부전원발생회로 |
JPH06203595A (ja) * | 1991-08-30 | 1994-07-22 | Texas Instr Inc <Ti> | ユニバーサル・モジューラ・メモリ |
US5295101A (en) * | 1992-01-31 | 1994-03-15 | Texas Instruments Incorporated | Array block level redundancy with steering logic |
JPH0668700A (ja) * | 1992-08-21 | 1994-03-11 | Toshiba Corp | 半導体メモリ装置 |
JPH0676598A (ja) * | 1992-08-28 | 1994-03-18 | Mitsubishi Electric Corp | 半導体記憶装置 |
US5412601A (en) * | 1992-08-31 | 1995-05-02 | Nippon Steel Corporation | Non-volatile semiconductor memory device capable of storing multi-value data in each memory cell |
KR950004870B1 (ko) * | 1992-11-24 | 1995-05-15 | 삼성전자 주식회사 | 번인 모드에서 분리게이트의 신뢰성 개선회로 |
US5384727A (en) * | 1993-11-08 | 1995-01-24 | Advanced Micro Devices, Inc. | Fuse trimming in plastic package devices |
JPH07153296A (ja) * | 1993-11-26 | 1995-06-16 | Nec Corp | 半導体記憶装置 |
JP3510335B2 (ja) * | 1994-07-18 | 2004-03-29 | 株式会社ルネサステクノロジ | 半導体記憶装置、内部電源電圧発生回路、内部高電圧発生回路、中間電圧発生回路、定電流源、および基準電圧発生回路 |
AU3962995A (en) * | 1994-10-19 | 1996-05-15 | Micron Technology, Inc. | An efficient method for obtaining usable parts from a partially good memory integrated circuit |
US5615162A (en) * | 1995-01-04 | 1997-03-25 | Texas Instruments Incorporated | Selective power to memory |
US5901105A (en) * | 1995-04-05 | 1999-05-04 | Ong; Adrian E | Dynamic random access memory having decoding circuitry for partial memory blocks |
US5787044A (en) * | 1995-10-23 | 1998-07-28 | Micron Technology, Inc. | Memory-cell array and a method for repairing the same |
US5946257A (en) * | 1996-07-24 | 1999-08-31 | Micron Technology, Inc. | Selective power distribution circuit for an integrated circuit |
-
1997
- 1997-08-22 US US08/918,637 patent/US5946257A/en not_active Expired - Lifetime
-
1998
- 1998-08-24 DE DE69808956T patent/DE69808956T2/de not_active Expired - Lifetime
- 1998-08-24 AT AT98943351T patent/ATE226752T1/de not_active IP Right Cessation
- 1998-08-24 WO PCT/US1998/017512 patent/WO1999010891A1/en active IP Right Grant
- 1998-08-24 EP EP98943351A patent/EP1019910B1/de not_active Expired - Lifetime
- 1998-08-24 JP JP2000508115A patent/JP2001514428A/ja active Pending
- 1998-08-24 KR KR1020007001797A patent/KR100358670B1/ko not_active IP Right Cessation
- 1998-08-24 AU AU91172/98A patent/AU9117298A/en not_active Abandoned
-
1999
- 1999-05-03 US US09/304,299 patent/US6078540A/en not_active Expired - Lifetime
-
2000
- 2000-06-19 US US09/597,393 patent/US6356498B1/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
KR100358670B1 (ko) | 2002-10-31 |
AU9117298A (en) | 1999-03-16 |
ATE226752T1 (de) | 2002-11-15 |
JP2001514428A (ja) | 2001-09-11 |
US5946257A (en) | 1999-08-31 |
WO1999010891A1 (en) | 1999-03-04 |
EP1019910A1 (de) | 2000-07-19 |
US6078540A (en) | 2000-06-20 |
KR20010023171A (ko) | 2001-03-26 |
US6356498B1 (en) | 2002-03-12 |
EP1019910B1 (de) | 2002-10-23 |
DE69808956T2 (de) | 2003-09-11 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE69808956D1 (de) | Teilweise abschaltbare spannungsversorgung für integrierte schaltkreise | |
KR960030230A (ko) | 반도체 메모리장치의 전원 승압회로 | |
KR910003670A (ko) | 정적형 반도체 기억장치 | |
GB2338564B (en) | Semiconductor testing apparatus for testing semiconductor device including built in self test circuit | |
TW331644B (en) | Dynamic memory device. | |
TW374847B (en) | Testing device for IC devices | |
KR910019048A (ko) | 반도체 집적 회로 장치 | |
TW345738B (en) | Semiconductor memory and its production process, voltage stabilization circuit and voltage stabilizer | |
KR970003216A (ko) | 반도체 메모리 장치의 내부 전원전압 발생 회로 | |
DE69115741D1 (de) | Kurzschlussdetektor für Speichermatrix | |
TW374169B (en) | Semiconductor memory device | |
MY131035A (en) | Method and apparatus for calibration and validation of high performance dut power supplies | |
EP0613071A3 (de) | Integrierte Halbleiterschaltungsanordnung mit Spannungsüberwachungsschaltung mit geringem Energieverbrauch für eingebauten Abwärtsspannungsgenerator. | |
SG48339A1 (en) | Quiescent-current testable ram | |
TW357348B (en) | Voltage generating circuit | |
JPS6459831A (en) | Semiconductor integrated circuit | |
JPS6478493A (en) | Nonvolatile memory device | |
DE69626607D1 (de) | Halbleiterspeicheranordnung mit Spannungsgeneratorschaltung | |
DE69806904D1 (de) | Halbleiterpruefgeraet mit schaltkreis zur datenserialisierung | |
DE69526336D1 (de) | Leseschaltung für Speicherzellen mit niedriger Versorgungsspannung | |
TW367500B (en) | Internal power control circuit for a semiconductor device | |
DE60133945D1 (de) | Spannungsversorgung für prüflinge, mit hoher geschwindigkeit und hoher genauigkeit und mit aktiver boostschaltung | |
TW359824B (en) | Stress test apparatus and method for semiconductor memory device | |
KR970012786A (ko) | 다중 비트 테스트를 위한 패턴 발생기를 가지는 메모리 테스트 시스템 | |
DE69312263D1 (de) | Testverfahren und -anordnung für integrierte Leistungsschaltungen |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |