DE69633711D1 - Isolierungshalbleiteranordnung mit hoher Durchbruchspannung und Verfahren zu ihrer Herstellung - Google Patents

Isolierungshalbleiteranordnung mit hoher Durchbruchspannung und Verfahren zu ihrer Herstellung

Info

Publication number
DE69633711D1
DE69633711D1 DE69633711T DE69633711T DE69633711D1 DE 69633711 D1 DE69633711 D1 DE 69633711D1 DE 69633711 T DE69633711 T DE 69633711T DE 69633711 T DE69633711 T DE 69633711T DE 69633711 D1 DE69633711 D1 DE 69633711D1
Authority
DE
Germany
Prior art keywords
production
semiconductor device
breakdown voltage
high breakdown
insulation semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69633711T
Other languages
English (en)
Other versions
DE69633711T2 (de
Inventor
Tatsuhiko Nagatani
Tomohide Terashima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of DE69633711D1 publication Critical patent/DE69633711D1/de
Application granted granted Critical
Publication of DE69633711T2 publication Critical patent/DE69633711T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H01L27/0922—Combination of complementary transistors having a different structure, e.g. stacked CMOS, high-voltage and low-voltage CMOS
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/761—PN junctions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823462—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate insulating layers, e.g. different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
DE69633711T 1995-12-30 1996-09-18 Isolierungshalbleiteranordnung mit hoher Durchbruchspannung und Verfahren zu ihrer Herstellung Expired - Lifetime DE69633711T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP35359795 1995-12-30
JP35359795A JP3547884B2 (ja) 1995-12-30 1995-12-30 半導体装置及びその製造方法

Publications (2)

Publication Number Publication Date
DE69633711D1 true DE69633711D1 (de) 2004-12-02
DE69633711T2 DE69633711T2 (de) 2006-02-02

Family

ID=18431922

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69633711T Expired - Lifetime DE69633711T2 (de) 1995-12-30 1996-09-18 Isolierungshalbleiteranordnung mit hoher Durchbruchspannung und Verfahren zu ihrer Herstellung

Country Status (5)

Country Link
US (2) US6376891B1 (de)
EP (1) EP0782194B1 (de)
JP (1) JP3547884B2 (de)
KR (1) KR100273858B1 (de)
DE (1) DE69633711T2 (de)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3175923B2 (ja) * 1997-11-05 2001-06-11 松下電子工業株式会社 半導体装置
KR100492981B1 (ko) * 1998-07-31 2005-09-02 페어차일드코리아반도체 주식회사 래터럴 이중확산 모스 트랜지스터 및 그 제조방법
JP2001015741A (ja) * 1999-06-30 2001-01-19 Toshiba Corp 電界効果トランジスタ
KR100350648B1 (ko) * 2000-01-17 2002-08-28 페어차일드코리아반도체 주식회사 모스 트랜지스터 및 그 제조 방법
US6936908B2 (en) 2001-05-03 2005-08-30 Ixys Corporation Forward and reverse blocking devices
KR100535062B1 (ko) 2001-06-04 2005-12-07 마츠시타 덴끼 산교 가부시키가이샤 고내압 반도체장치
US6710424B2 (en) 2001-09-21 2004-03-23 Airip RF chipset architecture
JP3719189B2 (ja) * 2001-10-18 2005-11-24 セイコーエプソン株式会社 半導体装置の製造方法
JP4326835B2 (ja) * 2003-05-20 2009-09-09 三菱電機株式会社 半導体装置、半導体装置の製造方法及び半導体装置の製造プロセス評価方法
JP4667756B2 (ja) * 2004-03-03 2011-04-13 三菱電機株式会社 半導体装置
DE102004024885B4 (de) * 2004-05-19 2007-09-06 Infineon Technologies Ag Halbleiterbauelement und Verfahren zu dessen Herstellung
US7427795B2 (en) * 2004-06-30 2008-09-23 Texas Instruments Incorporated Drain-extended MOS transistors and methods for making the same
US7187033B2 (en) * 2004-07-14 2007-03-06 Texas Instruments Incorporated Drain-extended MOS transistors with diode clamp and methods for making the same
JP4620437B2 (ja) * 2004-12-02 2011-01-26 三菱電機株式会社 半導体装置
US7468537B2 (en) * 2004-12-15 2008-12-23 Texas Instruments Incorporated Drain extended PMOS transistors and methods for making the same
US7262471B2 (en) * 2005-01-31 2007-08-28 Texas Instruments Incorporated Drain extended PMOS transistor with increased breakdown voltage
US7888767B2 (en) * 2006-07-21 2011-02-15 Taiwan Semiconductor Manufacturing Company, Ltd. Structures of high-voltage MOS devices with improved electrical performance
KR101453957B1 (ko) * 2008-03-21 2014-10-24 삼성전자주식회사 신뢰성이 향상된 반도체 집적 회로 장치
JP2010010408A (ja) * 2008-06-27 2010-01-14 Sanyo Electric Co Ltd 半導体装置及びその製造方法
JP5684450B2 (ja) * 2008-08-20 2015-03-11 ラピスセミコンダクタ株式会社 半導体装置及びその製造方法
US9184097B2 (en) * 2009-03-12 2015-11-10 System General Corporation Semiconductor devices and formation methods thereof
US8637954B2 (en) * 2010-10-25 2014-01-28 Infineon Technologies Ag Integrated circuit technology with different device epitaxial layers
CN103456798B (zh) * 2012-06-05 2015-10-14 上海华虹宏力半导体制造有限公司 Tvs器件及制造方法
CN105185832A (zh) * 2015-09-22 2015-12-23 上海华虹宏力半导体制造有限公司 超高压隔离结构
CN105974295A (zh) * 2016-03-29 2016-09-28 电子科技大学 一种基于太赫兹肖特基二极管的电特性来推导物理特性的方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1131801A (en) 1978-01-18 1982-09-14 Johannes A. Appels Semiconductor device
NL187415C (nl) 1980-09-08 1991-09-16 Philips Nv Halfgeleiderinrichting met gereduceerde oppervlakteveldsterkte.
JPS57162359A (en) 1981-03-30 1982-10-06 Toshiba Corp Semiconductor device
JPS60167460A (ja) 1984-02-10 1985-08-30 Nec Corp 半導体集積回路装置およびその製造方法
JPS6158263A (ja) 1984-08-29 1986-03-25 Hitachi Micro Comput Eng Ltd 半導体装置の製造法
US5023193A (en) * 1986-07-16 1991-06-11 National Semiconductor Corp. Method for simultaneously fabricating bipolar and complementary field effect transistors using a minimal number of masks
US5156989A (en) 1988-11-08 1992-10-20 Siliconix, Incorporated Complementary, isolated DMOS IC technology
JPH02139961A (ja) 1988-11-21 1990-05-29 Olympus Optical Co Ltd バイポーラ・ｃｍｏｓ半導体装置における横型ｐｎｐトランジスタの製造方法
JP2835116B2 (ja) 1989-09-29 1998-12-14 株式会社東芝 電力用ｉｃおよびその製造方法
JP3285435B2 (ja) 1993-07-07 2002-05-27 三菱電機株式会社 半導体装置およびその製造方法
EP0645821B1 (de) * 1993-09-27 2001-09-26 STMicroelectronics S.r.l. Rauscharmer bipolarer Transistor

Also Published As

Publication number Publication date
US6596575B2 (en) 2003-07-22
KR970054364A (ko) 1997-07-31
JPH09186241A (ja) 1997-07-15
EP0782194A3 (de) 1998-06-10
US20020089028A1 (en) 2002-07-11
US6376891B1 (en) 2002-04-23
KR100273858B1 (ko) 2001-01-15
JP3547884B2 (ja) 2004-07-28
EP0782194A2 (de) 1997-07-02
EP0782194B1 (de) 2004-10-27
DE69633711T2 (de) 2006-02-02

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Legal Events

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8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)