DE69427959T2 - Integrierte Schaltung mit verbesserter Kontaktbarriere - Google Patents
Integrierte Schaltung mit verbesserter KontaktbarriereInfo
- Publication number
- DE69427959T2 DE69427959T2 DE69427959T DE69427959T DE69427959T2 DE 69427959 T2 DE69427959 T2 DE 69427959T2 DE 69427959 T DE69427959 T DE 69427959T DE 69427959 T DE69427959 T DE 69427959T DE 69427959 T2 DE69427959 T2 DE 69427959T2
- Authority
- DE
- Germany
- Prior art keywords
- integrated circuit
- improved contact
- contact barrier
- barrier
- improved
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 230000004888 barrier function Effects 0.000 title 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76846—Layer combinations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76855—After-treatment introducing at least one additional element into the layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76855—After-treatment introducing at least one additional element into the layer
- H01L21/76856—After-treatment introducing at least one additional element into the layer by treatment in plasmas or gaseous environments, e.g. nitriding a refractory metal liner
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76861—Post-treatment or after-treatment not introducing additional chemical elements into the layer
- H01L21/76864—Thermal treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
- H01L23/53223—Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
- Y10S257/924—Active solid-state devices, e.g. transistors, solid-state diodes with passive device, e.g. capacitor, or battery, as integral part of housing or housing element, e.g. cap
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Plasma & Fusion (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/235,099 US5514908A (en) | 1994-04-29 | 1994-04-29 | Integrated circuit with a titanium nitride contact barrier having oxygen stuffed grain boundaries |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69427959D1 DE69427959D1 (de) | 2001-09-20 |
DE69427959T2 true DE69427959T2 (de) | 2002-04-11 |
Family
ID=22884099
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69427959T Expired - Fee Related DE69427959T2 (de) | 1994-04-29 | 1994-12-22 | Integrierte Schaltung mit verbesserter Kontaktbarriere |
Country Status (4)
Country | Link |
---|---|
US (4) | US5514908A (de) |
EP (1) | EP0680077B1 (de) |
JP (1) | JPH07312354A (de) |
DE (1) | DE69427959T2 (de) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102019128268A1 (de) * | 2019-09-23 | 2021-03-25 | Taiwan Semiconductor Manufacturing Co. Ltd. | Verfahren zum reduzieren von durchschlagausfällen in einem mim-kondensator |
Families Citing this family (86)
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US5514908A (en) | 1994-04-29 | 1996-05-07 | Sgs-Thomson Microelectronics, Inc. | Integrated circuit with a titanium nitride contact barrier having oxygen stuffed grain boundaries |
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US5773363A (en) | 1994-11-08 | 1998-06-30 | Micron Technology, Inc. | Semiconductor processing method of making electrical contact to a node |
US5972178A (en) * | 1995-06-07 | 1999-10-26 | Applied Materials, Inc. | Continuous process for forming improved titanium nitride barrier layers |
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US5962923A (en) | 1995-08-07 | 1999-10-05 | Applied Materials, Inc. | Semiconductor device having a low thermal budget metal filling and planarization of contacts, vias and trenches |
KR100187669B1 (ko) * | 1996-01-30 | 1999-06-01 | 김주용 | 반도체 소자의 확산 방지막 형성 방법 |
US5895266A (en) | 1996-02-26 | 1999-04-20 | Applied Materials, Inc. | Titanium nitride barrier layers |
EP1028173A3 (de) * | 1996-02-26 | 2000-11-02 | Applied Materials, Inc. | Barriereschichten aus Titannitrid |
EP0846783A4 (de) * | 1996-03-27 | 2000-02-02 | Sumitomo Sitix Of Amagasaki In | Verfahren zur farbentwicklung bei metallischem titan und verfahren zur herstellung von schwarzem und farbigem titan |
US5661085A (en) * | 1996-06-17 | 1997-08-26 | Chartered Semiconductor Manufacturing Pte, Ltd. | Method for forming a low contact leakage and low contact resistance integrated circuit device electrode |
JPH10125627A (ja) * | 1996-10-24 | 1998-05-15 | Fujitsu Ltd | 半導体装置の製造方法および高融点金属ナイトライド膜の形成方法 |
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GB2319532B (en) * | 1996-11-22 | 2001-01-31 | Trikon Equip Ltd | Method and apparatus for treating a semiconductor wafer |
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US11430729B2 (en) | 2020-09-16 | 2022-08-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | MIM capacitor with a symmetrical capacitor insulator structure |
CN114088261A (zh) * | 2021-11-22 | 2022-02-25 | 中国电子科技集团公司第四十八研究所 | 一种氮氧化钛薄膜压力传感器及其制造方法 |
US20230261082A1 (en) * | 2022-02-14 | 2023-08-17 | Nanya Technology Corporation | Contact strcutre and method for preparing the same |
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US4676866A (en) * | 1985-05-01 | 1987-06-30 | Texas Instruments Incorporated | Process to increase tin thickness |
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-
1994
- 1994-04-29 US US08/235,099 patent/US5514908A/en not_active Expired - Lifetime
- 1994-12-22 DE DE69427959T patent/DE69427959T2/de not_active Expired - Fee Related
- 1994-12-22 EP EP94309707A patent/EP0680077B1/de not_active Expired - Lifetime
-
1995
- 1995-05-01 JP JP7107249A patent/JPH07312354A/ja active Pending
- 1995-12-08 US US08/569,392 patent/US5652464A/en not_active Expired - Lifetime
-
1997
- 1997-11-28 US US08/980,468 patent/US6191033B1/en not_active Expired - Lifetime
-
2000
- 2000-09-13 US US09/660,738 patent/US6291344B1/en not_active Expired - Lifetime
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102019128268A1 (de) * | 2019-09-23 | 2021-03-25 | Taiwan Semiconductor Manufacturing Co. Ltd. | Verfahren zum reduzieren von durchschlagausfällen in einem mim-kondensator |
DE102019128268B4 (de) | 2019-09-23 | 2023-03-30 | Taiwan Semiconductor Manufacturing Co. Ltd. | Verfahren zum reduzieren von durchschlagausfällen in einem mim-kondensator |
Also Published As
Publication number | Publication date |
---|---|
US5652464A (en) | 1997-07-29 |
US5514908A (en) | 1996-05-07 |
US6191033B1 (en) | 2001-02-20 |
DE69427959D1 (de) | 2001-09-20 |
EP0680077A1 (de) | 1995-11-02 |
JPH07312354A (ja) | 1995-11-28 |
US6291344B1 (en) | 2001-09-18 |
EP0680077B1 (de) | 2001-08-16 |
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