DE69330731T2 - Redundanzschaltung für Halbleiterspeichergeräte - Google Patents

Redundanzschaltung für Halbleiterspeichergeräte

Info

Publication number
DE69330731T2
DE69330731T2 DE69330731T DE69330731T DE69330731T2 DE 69330731 T2 DE69330731 T2 DE 69330731T2 DE 69330731 T DE69330731 T DE 69330731T DE 69330731 T DE69330731 T DE 69330731T DE 69330731 T2 DE69330731 T2 DE 69330731T2
Authority
DE
Germany
Prior art keywords
memory cell
cell array
redundancy circuit
redundant
semiconductor memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69330731T
Other languages
English (en)
Other versions
DE69330731D1 (de
Inventor
Kyu-Chan Lee
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of DE69330731D1 publication Critical patent/DE69330731D1/de
Application granted granted Critical
Publication of DE69330731T2 publication Critical patent/DE69330731T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/80—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout
    • G11C29/808—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout using a flexible replacement scheme
DE69330731T 1992-07-13 1993-06-01 Redundanzschaltung für Halbleiterspeichergeräte Expired - Lifetime DE69330731T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920012436A KR950001837B1 (ko) 1992-07-13 1992-07-13 퓨우즈 박스를 공유하는 로우 리던던시 회로

Publications (2)

Publication Number Publication Date
DE69330731D1 DE69330731D1 (de) 2001-10-18
DE69330731T2 true DE69330731T2 (de) 2002-09-05

Family

ID=19336230

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69330731T Expired - Lifetime DE69330731T2 (de) 1992-07-13 1993-06-01 Redundanzschaltung für Halbleiterspeichergeräte

Country Status (6)

Country Link
US (1) US5349556A (de)
EP (1) EP0579366B1 (de)
JP (1) JP3820556B2 (de)
KR (1) KR950001837B1 (de)
DE (1) DE69330731T2 (de)
TW (1) TW325568B (de)

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JPH0793172A (ja) * 1993-09-24 1995-04-07 Nec Corp 冗長ブロック切り替え回路
JP3553138B2 (ja) * 1994-07-14 2004-08-11 株式会社ルネサステクノロジ 半導体記憶装置
US5528539A (en) * 1994-09-29 1996-06-18 Micron Semiconductor, Inc. High speed global row redundancy system
JPH08180698A (ja) * 1994-12-22 1996-07-12 Toshiba Corp 半導体記憶装置
JP2760326B2 (ja) * 1995-09-30 1998-05-28 日本電気株式会社 半導体記憶装置
GB2312974A (en) * 1996-05-10 1997-11-12 Memory Corp Plc Memory replacement
US5828599A (en) * 1996-08-06 1998-10-27 Simtek Corporation Memory with electrically erasable and programmable redundancy
KR100231137B1 (ko) * 1996-12-28 1999-11-15 문정환 반도체 메모리의 워드 라인 구동 회로
US5841710A (en) * 1997-02-14 1998-11-24 Micron Electronics, Inc. Dynamic address remapping decoder
JPH10275493A (ja) * 1997-03-31 1998-10-13 Nec Corp 半導体記憶装置
JPH10334690A (ja) * 1997-05-27 1998-12-18 Nec Corp 半導体記憶装置
DE69826075D1 (de) * 1997-06-30 2004-10-14 Siemens Ag Technik zur Reduzierung der Anzahl der Schmelzsicherungen bei einer DRAM mit Redundanz
KR100480567B1 (ko) * 1997-10-27 2005-09-30 삼성전자주식회사 반도체메모리장치
KR100486216B1 (ko) * 1997-11-06 2005-08-01 삼성전자주식회사 반도체메모리장치의리던던시메모리셀제어회로
US6332183B1 (en) 1998-03-05 2001-12-18 Micron Technology, Inc. Method for recovery of useful areas of partially defective synchronous memory components
US6314527B1 (en) 1998-03-05 2001-11-06 Micron Technology, Inc. Recovery of useful areas of partially defective synchronous memory components
US6381707B1 (en) 1998-04-28 2002-04-30 Micron Technology, Inc. System for decoding addresses for a defective memory array
US6381708B1 (en) 1998-04-28 2002-04-30 Micron Technology, Inc. Method for decoding addresses for a defective memory array
JPH11317092A (ja) * 1998-05-08 1999-11-16 Oki Electric Ind Co Ltd 半導体記憶装置
KR100281284B1 (ko) * 1998-06-29 2001-02-01 김영환 컬럼 리던던시 회로
US6496876B1 (en) 1998-12-21 2002-12-17 Micron Technology, Inc. System and method for storing a tag to identify a functional storage location in a memory device
KR20010004536A (ko) * 1999-06-29 2001-01-15 김영환 자동 리던던시 회로
US6144593A (en) 1999-09-01 2000-11-07 Micron Technology, Inc. Circuit and method for a multiplexed redundancy scheme in a memory device
KR100498610B1 (ko) * 1999-12-22 2005-07-01 주식회사 하이닉스반도체 뱅크 구분없이 휴즈 박스를 사용하는 로우 리던던시 회로
US6578157B1 (en) 2000-03-06 2003-06-10 Micron Technology, Inc. Method and apparatus for recovery of useful areas of partially defective direct rambus rimm components
US7269765B1 (en) * 2000-04-13 2007-09-11 Micron Technology, Inc. Method and apparatus for storing failing part locations in a module
KR100364817B1 (ko) * 2001-02-02 2002-12-16 주식회사 하이닉스반도체 로우 리던던시 회로
JP4050690B2 (ja) * 2003-11-21 2008-02-20 株式会社東芝 半導体集積回路装置
KR100558056B1 (ko) * 2004-11-03 2006-03-07 주식회사 하이닉스반도체 리던던시 퓨즈 제어 회로 및 이를 포함한 반도체 메모리소자 및 이를 이용한 리던던시 수행 방법
KR100739983B1 (ko) * 2005-02-23 2007-07-16 주식회사 하이닉스반도체 반도체 메모리 장치의 리던던시 회로
KR101038983B1 (ko) * 2005-06-28 2011-06-03 주식회사 하이닉스반도체 리던던시부를 갖춘 메모리 장치
KR100809683B1 (ko) * 2005-07-14 2008-03-07 삼성전자주식회사 멀티 로우 어드레스 테스트 시간을 감소시킬 수 있는반도체 메모리 장치 및 멀티 로우 어드레스 테스트 방법.
US8072834B2 (en) 2005-08-25 2011-12-06 Cypress Semiconductor Corporation Line driver circuit and method with standby mode of operation
KR100784087B1 (ko) * 2006-05-04 2007-12-10 주식회사 하이닉스반도체 반도체 메모리 장치의 리페어 회로
US7499352B2 (en) * 2006-05-19 2009-03-03 Innovative Silicon Isi Sa Integrated circuit having memory array including row redundancy, and method of programming, controlling and/or operating same
KR101373183B1 (ko) * 2008-01-15 2014-03-14 삼성전자주식회사 3차원 어레이 구조를 갖는 메모리 장치 및 그것의 리페어방법
KR102116920B1 (ko) * 2014-03-26 2020-06-01 에스케이하이닉스 주식회사 반도체 메모리 장치 및 이를 포함하는 반도체 메모리 시스템

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US4389715A (en) * 1980-10-06 1983-06-21 Inmos Corporation Redundancy scheme for a dynamic RAM
JPS58199496A (ja) * 1982-05-14 1983-11-19 Hitachi Ltd 欠陥救済回路を有する半導体メモリ
JPH0670880B2 (ja) * 1983-01-21 1994-09-07 株式会社日立マイコンシステム 半導体記憶装置
JPH0666394B2 (ja) * 1983-12-16 1994-08-24 富士通株式会社 半導体記憶装置
US5022006A (en) * 1988-04-01 1991-06-04 International Business Machines Corporation Semiconductor memory having bit lines with isolation circuits connected between redundant and normal memory cells
KR920005150A (ko) * 1990-08-31 1992-03-28 김광호 씨모오스디램의 센스 앰프 구성방법
KR940008208B1 (ko) * 1990-12-22 1994-09-08 삼성전자주식회사 반도체 메모리장치의 리던던트 장치 및 방법
JPH04255998A (ja) * 1991-02-08 1992-09-10 Nec Ic Microcomput Syst Ltd 半導体記憶装置

Also Published As

Publication number Publication date
DE69330731D1 (de) 2001-10-18
JPH06195998A (ja) 1994-07-15
US5349556A (en) 1994-09-20
KR940002863A (ko) 1994-02-19
TW325568B (en) 1998-01-21
EP0579366A2 (de) 1994-01-19
KR950001837B1 (ko) 1995-03-03
EP0579366B1 (de) 2001-09-12
EP0579366A3 (en) 1996-06-26
JP3820556B2 (ja) 2006-09-13

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