DE69122481T2 - Halbleiterspeicher mit Multiplex-Redundanz - Google Patents

Halbleiterspeicher mit Multiplex-Redundanz

Info

Publication number
DE69122481T2
DE69122481T2 DE69122481T DE69122481T DE69122481T2 DE 69122481 T2 DE69122481 T2 DE 69122481T2 DE 69122481 T DE69122481 T DE 69122481T DE 69122481 T DE69122481 T DE 69122481T DE 69122481 T2 DE69122481 T2 DE 69122481T2
Authority
DE
Germany
Prior art keywords
pass gates
input
fuses
output
array
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69122481T
Other languages
English (en)
Other versions
DE69122481D1 (de
Inventor
Thomas Allyn Coker
David Charles Mcclure
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics lnc USA
Original Assignee
SGS Thomson Microelectronics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics Inc filed Critical SGS Thomson Microelectronics Inc
Application granted granted Critical
Publication of DE69122481D1 publication Critical patent/DE69122481D1/de
Publication of DE69122481T2 publication Critical patent/DE69122481T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/80—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout
    • G11C29/808—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout using a flexible replacement scheme
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/84—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability
    • G11C29/846—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability by choosing redundant lines at an output stage
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/781—Masking faults in memories by using spares or by reconfiguring using programmable devices combined in a redundant decoder

Landscapes

  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
  • Dram (AREA)
DE69122481T 1990-12-14 1991-12-12 Halbleiterspeicher mit Multiplex-Redundanz Expired - Fee Related DE69122481T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US62782390A 1990-12-14 1990-12-14

Publications (2)

Publication Number Publication Date
DE69122481D1 DE69122481D1 (de) 1996-11-07
DE69122481T2 true DE69122481T2 (de) 1997-02-20

Family

ID=24516287

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69122481T Expired - Fee Related DE69122481T2 (de) 1990-12-14 1991-12-12 Halbleiterspeicher mit Multiplex-Redundanz

Country Status (5)

Country Link
US (1) US5355340A (de)
EP (1) EP0490680B1 (de)
JP (1) JPH04301299A (de)
KR (1) KR920013475A (de)
DE (1) DE69122481T2 (de)

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US5361227A (en) * 1991-12-19 1994-11-01 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device and memory system using the same
US6781895B1 (en) * 1991-12-19 2004-08-24 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device and memory system using the same
US5768206A (en) * 1995-06-07 1998-06-16 Sgs-Thomson Microelectronics, Inc. Circuit and method for biasing bit lines
US5608678A (en) * 1995-07-31 1997-03-04 Sgs-Thomson Microelectronics, Inc. Column redundancy of a multiple block memory architecture
US5657284A (en) 1995-09-19 1997-08-12 Micron Technology, Inc. Apparatus and method for testing for defects between memory cells in packaged semiconductor memory devices
US5965902A (en) * 1995-09-19 1999-10-12 Micron Technology Method and apparatus for testing of dielectric defects in a packaged semiconductor memory device
US5796746A (en) * 1995-12-22 1998-08-18 Micron Technology, Inc. Device and method for testing integrated circuit dice in an integrated circuit module
US6240535B1 (en) * 1995-12-22 2001-05-29 Micron Technology, Inc. Device and method for testing integrated circuit dice in an integrated circuit module
US5825697A (en) * 1995-12-22 1998-10-20 Micron Technology, Inc. Circuit and method for enabling a function in a multiple memory device module
US5771195A (en) * 1995-12-29 1998-06-23 Sgs-Thomson Microelectronics, Inc. Circuit and method for replacing a defective memory cell with a redundant memory cell
US5612918A (en) * 1995-12-29 1997-03-18 Sgs-Thomson Microelectronics, Inc. Redundancy architecture
US5790462A (en) * 1995-12-29 1998-08-04 Sgs-Thomson Microelectronics, Inc. Redundancy control
US5841709A (en) * 1995-12-29 1998-11-24 Stmicroelectronics, Inc. Memory having and method for testing redundant memory cells
US6037799A (en) * 1995-12-29 2000-03-14 Stmicroelectronics, Inc. Circuit and method for selecting a signal
US5781486A (en) * 1996-04-16 1998-07-14 Micron Technology Corporation Apparatus for testing redundant elements in a packaged semiconductor memory device
US5706292A (en) 1996-04-25 1998-01-06 Micron Technology, Inc. Layout for a semiconductor memory device having redundant elements
US5673227A (en) * 1996-05-14 1997-09-30 Motorola, Inc. Integrated circuit memory with multiplexed redundant column data path
US5953745A (en) * 1996-11-27 1999-09-14 International Business Machines Corporation Redundant memory array
US5909049A (en) 1997-02-11 1999-06-01 Actel Corporation Antifuse programmed PROM cell
US6172935B1 (en) 1997-04-25 2001-01-09 Micron Technology, Inc. Synchronous dynamic random access memory device
US5883844A (en) * 1997-05-23 1999-03-16 Stmicroelectronics, Inc. Method of stress testing integrated circuit having memory and integrated circuit having stress tester for memory thereof
FR2764095B1 (fr) * 1997-05-30 2001-10-12 Sgs Thomson Microelectronics Circuit de memoire avec redondance dynamique
US6018488A (en) * 1997-06-26 2000-01-25 Kabushiki Kaisha Toshiba Semiconductor memory device and method relieving defect of semiconductor memory device
US6005813A (en) 1997-11-12 1999-12-21 Micron Technology, Inc. Device and method for repairing a semiconductor memory
JP3204198B2 (ja) * 1998-02-10 2001-09-04 日本電気株式会社 半導体メモリ装置
JP4693197B2 (ja) * 1998-04-23 2011-06-01 株式会社東芝 半導体記憶装置
US6452845B1 (en) 1999-01-07 2002-09-17 Micron Technology, Inc. Apparatus for testing redundant elements in a packaged semiconductor memory device
US6367025B1 (en) * 1999-02-01 2002-04-02 Compaq Computer Corporation Pass-gate inputs that temporarily hold state on a high input impedance, strobed CMOS differential sense amplifier
KR100385225B1 (ko) * 2001-03-23 2003-05-27 삼성전자주식회사 탐침 패드 및 범프 패드를 갖는 플립 칩형 반도체소자 및 그 제조방법
DE10297097B4 (de) * 2001-07-31 2007-10-11 Infineon Technologies Ag Schmelzprogrammierbare E/A-Organisation
JP5119563B2 (ja) * 2001-08-03 2013-01-16 日本電気株式会社 不良メモリセル救済回路を有する半導体記憶装置
US20030058698A1 (en) * 2001-09-26 2003-03-27 Gerhard Mueller Memory with high performance unit architecture
US6915467B2 (en) * 2001-12-11 2005-07-05 International Business Machines Corporation System and method for testing a column redundancy of an integrated circuit memory
US6879530B2 (en) * 2002-07-18 2005-04-12 Micron Technology, Inc. Apparatus for dynamically repairing a semiconductor memory
US6928377B2 (en) * 2003-09-09 2005-08-09 International Business Machines Corporation Self-test architecture to implement data column redundancy in a RAM
US7215586B2 (en) * 2005-06-29 2007-05-08 Micron Technology, Inc. Apparatus and method for repairing a semiconductor memory
ITUB20152089A1 (it) * 2015-07-10 2017-01-10 St Microelectronics Srl Cella di memoria e dispositivo corrispondente
US11670379B2 (en) * 2020-12-04 2023-06-06 Micron Technology, Inc. Sense line structures in capacitive sense NAND memory

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4228528B2 (en) * 1979-02-09 1992-10-06 Memory with redundant rows and columns
JPS58130495A (ja) * 1982-01-29 1983-08-03 Toshiba Corp 半導体記憶装置
US4471472A (en) * 1982-02-05 1984-09-11 Advanced Micro Devices, Inc. Semiconductor memory utilizing an improved redundant circuitry configuration
US4573146A (en) * 1982-04-20 1986-02-25 Mostek Corporation Testing and evaluation of a semiconductor memory containing redundant memory elements
US4485459A (en) * 1982-09-20 1984-11-27 Fairchild Camera & Instrument Corp. Redundant columns for byte wide memories
JPH0670880B2 (ja) * 1983-01-21 1994-09-07 株式会社日立マイコンシステム 半導体記憶装置
US4601019B1 (en) * 1983-08-31 1997-09-30 Texas Instruments Inc Memory with redundancy
US4599709A (en) * 1984-02-17 1986-07-08 At&T Bell Laboratories Byte organized static memory
JPS6199999A (ja) * 1984-10-19 1986-05-19 Hitachi Ltd 半導体記憶装置
US4691300A (en) * 1985-12-20 1987-09-01 Motorola, Inc. Redundant column substitution architecture with improved column access time
JPS6337899A (ja) * 1986-07-30 1988-02-18 Mitsubishi Electric Corp 半導体記憶装置
JPS6433800A (en) * 1987-07-29 1989-02-03 Toshiba Corp Semiconductor memory
JPH01224999A (ja) * 1988-03-04 1989-09-07 Mitsubishi Electric Corp 半導体記憶装置
JPH01245497A (ja) * 1988-03-28 1989-09-29 Nec Corp 半導体メモリ
JPH0289299A (ja) * 1988-09-27 1990-03-29 Nec Corp 半導体記憶装置

Also Published As

Publication number Publication date
EP0490680B1 (de) 1996-10-02
JPH04301299A (ja) 1992-10-23
EP0490680A2 (de) 1992-06-17
DE69122481D1 (de) 1996-11-07
EP0490680A3 (en) 1992-12-30
KR920013475A (ko) 1992-07-29
US5355340A (en) 1994-10-11

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee