DE69113187T2 - Verfahren zur Herstellung einer elektronische Dünnschichtanordnung. - Google Patents

Verfahren zur Herstellung einer elektronische Dünnschichtanordnung.

Info

Publication number
DE69113187T2
DE69113187T2 DE69113187T DE69113187T DE69113187T2 DE 69113187 T2 DE69113187 T2 DE 69113187T2 DE 69113187 T DE69113187 T DE 69113187T DE 69113187 T DE69113187 T DE 69113187T DE 69113187 T2 DE69113187 T2 DE 69113187T2
Authority
DE
Germany
Prior art keywords
manufacturing
thin film
film device
electronic thin
electronic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69113187T
Other languages
English (en)
Other versions
DE69113187D1 (de
Inventor
Joseph G Ameen
Joseph Funari
John A Goldfuss
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE69113187D1 publication Critical patent/DE69113187D1/de
Application granted granted Critical
Publication of DE69113187T2 publication Critical patent/DE69113187T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • H05K1/112Pads for surface mounting, e.g. lay-out directly combined with via connections
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5387Flexible insulating substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • H05K3/3436Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/189Printed circuits structurally associated with non-printed electric components characterised by the use of a flexible or folded printed circuit
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0388Other aspects of conductors
    • H05K2201/0394Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/09472Recessed pad for surface mounting; Recessed electrode of component
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10681Tape Carrier Package [TCP]; Flexible sheet connector
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/08Treatments involving gases
    • H05K2203/087Using a reactive gas
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/325Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor
    • H05K3/326Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor the printed circuit having integral resilient or deformable parts, e.g. tabs or parts of flexible circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3494Heating methods for reflowing of solder
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product
DE69113187T 1990-09-07 1991-07-26 Verfahren zur Herstellung einer elektronische Dünnschichtanordnung. Expired - Fee Related DE69113187T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/578,711 US5057969A (en) 1990-09-07 1990-09-07 Thin film electronic device

Publications (2)

Publication Number Publication Date
DE69113187D1 DE69113187D1 (de) 1995-10-26
DE69113187T2 true DE69113187T2 (de) 1996-05-02

Family

ID=24313978

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69113187T Expired - Fee Related DE69113187T2 (de) 1990-09-07 1991-07-26 Verfahren zur Herstellung einer elektronische Dünnschichtanordnung.

Country Status (4)

Country Link
US (1) US5057969A (de)
EP (1) EP0473929B1 (de)
JP (1) JPH0810716B2 (de)
DE (1) DE69113187T2 (de)

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JP2673993B2 (ja) * 1990-07-02 1997-11-05 日本無線株式会社 表面弾性波装置
JPH04170811A (ja) * 1990-11-05 1992-06-18 Fujitsu Ltd 弾性表面波デバイス
JPH04354363A (ja) * 1991-05-31 1992-12-08 Fujitsu Ltd 半導体装置ユニット
US5786985A (en) * 1991-05-31 1998-07-28 Fujitsu Limited Semiconductor device and semiconductor device unit
US5133495A (en) * 1991-08-12 1992-07-28 International Business Machines Corporation Method of bonding flexible circuit to circuitized substrate to provide electrical connection therebetween
DE4129514A1 (de) * 1991-09-05 1993-03-11 Telefunken Electronic Gmbh Gedruckte schaltung mit oberflaechenmontierter steckerleiste
US5600103A (en) * 1993-04-16 1997-02-04 Kabushiki Kaisha Toshiba Circuit devices and fabrication method of the same
US5371326A (en) * 1993-08-31 1994-12-06 Clearwaters-Dreager; Cindy Non-toxic fabric conductors and method for making same
US5367435A (en) * 1993-11-16 1994-11-22 International Business Machines Corporation Electronic package structure and method of making same
JPH07245133A (ja) * 1994-03-06 1995-09-19 Yokogawa Hewlett Packard Ltd 電気接続構造
US5583378A (en) * 1994-05-16 1996-12-10 Amkor Electronics, Inc. Ball grid array integrated circuit package with thermal conductor
US5802699A (en) * 1994-06-07 1998-09-08 Tessera, Inc. Methods of assembling microelectronic assembly with socket for engaging bump leads
US5632631A (en) * 1994-06-07 1997-05-27 Tessera, Inc. Microelectronic contacts with asperities and methods of making same
US5615824A (en) * 1994-06-07 1997-04-01 Tessera, Inc. Soldering with resilient contacts
US5983492A (en) * 1996-11-27 1999-11-16 Tessera, Inc. Low profile socket for microelectronic components and method for making the same
US5593083A (en) * 1995-02-14 1997-01-14 International Business Machines Corporation Castellated nozzle and method of use therof
US5565119A (en) * 1995-04-28 1996-10-15 International Business Machines Corporation Method and apparatus for soldering with a multiple tip and associated optical fiber heating device
US5872051A (en) * 1995-08-02 1999-02-16 International Business Machines Corporation Process for transferring material to semiconductor chip conductive pads using a transfer substrate
US6051982A (en) * 1996-08-02 2000-04-18 International Business Machines Corporation Electronic component test apparatus with rotational probe and conductive spaced apart means
US5804984A (en) * 1996-08-02 1998-09-08 International Business Machines Corporation Electronic component test apparatus with rotational probe
US5818697A (en) 1997-03-21 1998-10-06 International Business Machines Corporation Flexible thin film ball grid array containing solder mask
US6281437B1 (en) 1999-11-10 2001-08-28 International Business Machines Corporation Method of forming an electrical connection between a conductive member having a dual thickness substrate and a conductor and electronic package including said connection
US6202293B1 (en) 2000-01-28 2001-03-20 Visteon Global Technologies, Inc. Work holder assembly
JP3590319B2 (ja) * 2000-03-10 2004-11-17 株式会社ジャパンユニックス ガス噴射式はんだ付け方法及び装置
DE10314172B4 (de) * 2003-03-28 2006-11-30 Infineon Technologies Ag Verfahren zum Betreiben einer Anordnung aus einem elektrischen Bauelement auf einem Substrat und Verfahren zum Herstellen der Anordnung
US7109732B2 (en) * 2003-07-31 2006-09-19 Endicott Interconnect Technologies, Inc. Electronic component test apparatus
KR100971220B1 (ko) * 2009-08-17 2010-07-20 주식회사 에프티랩 Lc공진주파수 변이를 이용한 정전용량방식 터치스크린패널의 검사방법
WO2021011286A1 (en) * 2019-07-12 2021-01-21 Neuralink Corp. Sandwich assembly scheme for thin film electrode array and integrated circuits

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US3722072A (en) * 1971-11-15 1973-03-27 Signetics Corp Alignment and bonding method for semiconductor components
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Also Published As

Publication number Publication date
US5057969A (en) 1991-10-15
DE69113187D1 (de) 1995-10-26
JPH077038A (ja) 1995-01-10
EP0473929A1 (de) 1992-03-11
EP0473929B1 (de) 1995-09-20
JPH0810716B2 (ja) 1996-01-31

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee