DE3886684T2 - Verfahren zur Herstellung eines selbstausrichtenden Dünnschichttransistors. - Google Patents
Verfahren zur Herstellung eines selbstausrichtenden Dünnschichttransistors.Info
- Publication number
- DE3886684T2 DE3886684T2 DE3886684T DE3886684T DE3886684T2 DE 3886684 T2 DE3886684 T2 DE 3886684T2 DE 3886684 T DE3886684 T DE 3886684T DE 3886684 T DE3886684 T DE 3886684T DE 3886684 T2 DE3886684 T2 DE 3886684T2
- Authority
- DE
- Germany
- Prior art keywords
- self
- manufacturing
- thin film
- film transistor
- aligning thin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000010409 thin film Substances 0.000 title 1
Classifications
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/004—Photosensitive materials
- G03F7/09—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers
- G03F7/095—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers having more than one photosensitive layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66765—Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/137—Resists
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/928—Front and rear surface processing
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Architecture (AREA)
- Structural Engineering (AREA)
- Thin Film Transistor (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/115,470 US4767723A (en) | 1987-10-30 | 1987-10-30 | Process for making self-aligning thin film transistors |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3886684D1 DE3886684D1 (de) | 1994-02-10 |
DE3886684T2 true DE3886684T2 (de) | 1994-06-23 |
Family
ID=22361617
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE3886684T Expired - Fee Related DE3886684T2 (de) | 1987-10-30 | 1988-10-13 | Verfahren zur Herstellung eines selbstausrichtenden Dünnschichttransistors. |
Country Status (5)
Country | Link |
---|---|
US (1) | US4767723A (de) |
EP (1) | EP0314344B1 (de) |
JP (1) | JPH0691107B2 (de) |
CA (1) | CA1278883C (de) |
DE (1) | DE3886684T2 (de) |
Families Citing this family (31)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4960719A (en) * | 1988-02-04 | 1990-10-02 | Seikosha Co., Ltd. | Method for producing amorphous silicon thin film transistor array substrate |
GB8812235D0 (en) * | 1988-05-24 | 1988-06-29 | Jones B L | Manufacturing electronic devices |
US5001083A (en) * | 1988-07-12 | 1991-03-19 | Microwave Modules & Devices Inc. | Method of priming semiconductor substrate for subsequent photoresist masking and etching |
US4997746A (en) * | 1988-11-22 | 1991-03-05 | Greco Nancy A | Method of forming conductive lines and studs |
US5157470A (en) * | 1989-02-27 | 1992-10-20 | Hitachi, Ltd. | Thin film transistor, manufacturing method thereof and matrix circuit board and image display device each using the same |
JP2814155B2 (ja) * | 1990-08-13 | 1998-10-22 | キヤノン株式会社 | Ito膜パターンの形成方法および液晶表示素子用基板の製造方法 |
WO1992006497A1 (en) * | 1990-10-05 | 1992-04-16 | General Electric Company | Positive control of the source/drain-gate overlap in self-aligned tfts via a top hat gate electrode configuration |
US5132745A (en) * | 1990-10-05 | 1992-07-21 | General Electric Company | Thin film transistor having an improved gate structure and gate coverage by the gate dielectric |
US5156986A (en) * | 1990-10-05 | 1992-10-20 | General Electric Company | Positive control of the source/drain-gate overlap in self-aligned TFTS via a top hat gate electrode configuration |
KR940008227B1 (ko) * | 1991-08-27 | 1994-09-08 | 주식회사 금성사 | 박막 트랜지스터 제조방법 |
JP2582996B2 (ja) * | 1992-06-12 | 1997-02-19 | インターナショナル・ビジネス・マシーンズ・コーポレイション | フォトマスクの製造方法 |
US5432047A (en) * | 1992-06-12 | 1995-07-11 | International Business Machines Corporation | Patterning process for bipolar optical storage medium |
US5578403A (en) * | 1993-07-26 | 1996-11-26 | Shinto Paint Co., Ltd. | Method for manufacture of a substrate having window-shaped and frame-shaped coating films on the surface thereof |
JPH0784119A (ja) * | 1993-09-17 | 1995-03-31 | Sumitomo Chem Co Ltd | 機能性塗膜等の形成方法 |
US5494839A (en) * | 1994-05-03 | 1996-02-27 | United Microelectronics Corporation | Dual photo-resist process for fabricating high density DRAM |
JP3208268B2 (ja) * | 1994-12-28 | 2001-09-10 | シャープ株式会社 | 反射型液晶表示装置 |
US5612235A (en) * | 1995-11-01 | 1997-03-18 | Industrial Technology Research Institute | Method of making thin film transistor with light-absorbing layer |
US5597747A (en) * | 1995-12-15 | 1997-01-28 | Industrial Technology Research Institute | Method of making inverted thin film transistor using backsick exposure and negative photoresist |
US6038006A (en) * | 1996-09-02 | 2000-03-14 | Casio Computer Co., Ltd. | Liquid crystal display device with light shield and color filter overlapping two edges of pixel electrode |
US5882977A (en) * | 1997-10-03 | 1999-03-16 | International Business Machines Corporation | Method of forming a self-aligned, sub-minimum isolation ring |
DE19744098B4 (de) * | 1997-10-06 | 2004-12-09 | Robert Bosch Gmbh | Verfahren zur Herstellung einer Matrix aus Dünnschichttransistoren für Flüssigkristallbildschirme |
US6007968A (en) * | 1997-10-29 | 1999-12-28 | International Business Machines Corporation | Method for forming features using frequency doubling hybrid resist and device formed thereby |
US6096618A (en) * | 1998-01-20 | 2000-08-01 | International Business Machines Corporation | Method of making a Schottky diode with sub-minimum guard ring |
US5994198A (en) * | 1998-02-23 | 1999-11-30 | International Business Machines Corporation | Fabrication method for fully landing subminimum features on minimum width lines |
GB9919913D0 (en) | 1999-08-24 | 1999-10-27 | Koninkl Philips Electronics Nv | Thin-film transistors and method for producing the same |
KR20030002413A (ko) * | 2001-06-29 | 2003-01-09 | 한민구 | 액정 디스플레이 패널을 형성하기 위한 다결정 박막트랜지스터 제조방법 |
KR100731750B1 (ko) | 2005-06-23 | 2007-06-22 | 삼성에스디아이 주식회사 | 박막트랜지스터 및 이를 이용한 유기전계발광표시장치의제조방법 |
WO2011133680A2 (en) * | 2010-04-22 | 2011-10-27 | Board Of Regents The University Of Texas System | Novel dual-tone resist formulations and methods |
KR101769612B1 (ko) * | 2010-12-10 | 2017-08-21 | 삼성디스플레이 주식회사 | 기판 평탄화 방법 |
WO2013049367A2 (en) * | 2011-09-30 | 2013-04-04 | Rolith, Inc. | Plasmonic lithography using phase mask |
KR20210018966A (ko) * | 2018-07-09 | 2021-02-18 | 어플라이드 머티어리얼스, 인코포레이티드 | 라인 배가를 위한 포토레지스트 조성물 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3279239D1 (en) * | 1981-07-27 | 1988-12-29 | Toshiba Kk | Thin-film transistor and method of manufacture therefor |
JPS58170067A (ja) * | 1982-03-31 | 1983-10-06 | Fujitsu Ltd | 薄膜トランジスタの製造方法 |
DE3337315A1 (de) * | 1982-10-13 | 1984-04-19 | Tokyo Ohka Kogyo Co., Ltd., Kawasaki, Kanagawa | Zweifach-lichtempfindliche zusammensetzungen und verfahren zur erzeugung bildmustergemaesser photoresistschichten |
JPS60100173A (ja) * | 1983-11-07 | 1985-06-04 | セイコーインスツルメンツ株式会社 | 液晶表示装置の製造方法 |
-
1987
- 1987-10-30 US US07/115,470 patent/US4767723A/en not_active Expired - Lifetime
-
1988
- 1988-08-18 JP JP63203978A patent/JPH0691107B2/ja not_active Expired - Lifetime
- 1988-09-30 CA CA000579011A patent/CA1278883C/en not_active Expired - Fee Related
- 1988-10-13 DE DE3886684T patent/DE3886684T2/de not_active Expired - Fee Related
- 1988-10-13 EP EP88309576A patent/EP0314344B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH0290629A (ja) | 1990-03-30 |
JPH0691107B2 (ja) | 1994-11-14 |
CA1278883C (en) | 1991-01-08 |
EP0314344A1 (de) | 1989-05-03 |
US4767723A (en) | 1988-08-30 |
EP0314344B1 (de) | 1993-12-29 |
DE3886684D1 (de) | 1994-02-10 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |