DE69112693D1 - Verfahren zur Einkapselung einer Halbleitervorrichtung. - Google Patents

Verfahren zur Einkapselung einer Halbleitervorrichtung.

Info

Publication number
DE69112693D1
DE69112693D1 DE69112693T DE69112693T DE69112693D1 DE 69112693 D1 DE69112693 D1 DE 69112693D1 DE 69112693 T DE69112693 T DE 69112693T DE 69112693 T DE69112693 T DE 69112693T DE 69112693 D1 DE69112693 D1 DE 69112693D1
Authority
DE
Germany
Prior art keywords
semiconductor device
encapsulation method
device encapsulation
semiconductor
encapsulation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69112693T
Other languages
English (en)
Other versions
DE69112693T2 (de
Inventor
Yukio Asami
Hiroyuki Fukazawa
Akira Kojima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of DE69112693D1 publication Critical patent/DE69112693D1/de
Application granted granted Critical
Publication of DE69112693T2 publication Critical patent/DE69112693T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C45/00—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
    • B29C45/14—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles
    • B29C45/14639—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles for obtaining an insulating effect, e.g. for electrical components
    • B29C45/14655—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles for obtaining an insulating effect, e.g. for electrical components connected to or mounted on a carrier, e.g. lead frame
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565—Moulds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Mechanical Engineering (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
DE69112693T 1990-04-25 1991-04-24 Verfahren zur Einkapselung einer Halbleitervorrichtung. Expired - Fee Related DE69112693T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2109934A JP2890662B2 (ja) 1990-04-25 1990-04-25 樹脂封止型半導体装置の製造方法とそれに用いるリードフレーム

Publications (2)

Publication Number Publication Date
DE69112693D1 true DE69112693D1 (de) 1995-10-12
DE69112693T2 DE69112693T2 (de) 1996-02-01

Family

ID=14522816

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69112693T Expired - Fee Related DE69112693T2 (de) 1990-04-25 1991-04-24 Verfahren zur Einkapselung einer Halbleitervorrichtung.

Country Status (5)

Country Link
US (1) US5289033A (de)
EP (1) EP0454440B1 (de)
JP (1) JP2890662B2 (de)
KR (1) KR100222349B1 (de)
DE (1) DE69112693T2 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4956423A (en) * 1985-10-29 1990-09-11 Occidental Chemical Corporation Hot-melt adhesives
FI90850C (fi) * 1992-05-29 1994-04-11 Idesco Oy Menetelmä muovista ruiskuvalettavan kuljetus- tai säilytysrakenteen varustamiseksi etäluettavalla saattomuistilla ja etäluettavalla saattomuistilla varustettu muovista ruiskuvalettu kuljetus- tai säilytysrakenne
DE4231705C2 (de) * 1992-09-22 1998-04-30 Siemens Ag Halbleitervorrichtung mit einem Systemträger und einem damit verbundenen Halbleiterchip sowie Verfahren zu deren Herstellung
JPH07273669A (ja) * 1992-12-21 1995-10-20 Sony Corp エラー訂正方法
US5474958A (en) * 1993-05-04 1995-12-12 Motorola, Inc. Method for making semiconductor device having no die supporting surface
US6148673A (en) * 1994-10-07 2000-11-21 Motorola, Inc. Differential pressure sensor and method thereof
US5660461A (en) * 1994-12-08 1997-08-26 Quantum Devices, Inc. Arrays of optoelectronic devices and method of making same
JP3290869B2 (ja) * 1995-11-16 2002-06-10 株式会社東芝 半導体装置
JPH1117557A (ja) * 1997-05-01 1999-01-22 Mitsubishi Electric Corp 誤り訂正方法及び誤り訂正装置
JPH11274196A (ja) * 1998-03-26 1999-10-08 Seiko Epson Corp 半導体装置の製造方法およびモールドシステム並びに半導体装置
DE10227936C1 (de) * 2002-06-21 2003-05-15 Heraeus Gmbh W C Verfahren zur Herstellung von Systemträgern aus metallischem Trägerband sowie Metallstreifen mit Trägerbereich für elektrische Bauelemente
DE10243515A1 (de) * 2002-09-19 2004-04-01 Robert Bosch Gmbh Sensor
US20040113240A1 (en) 2002-10-11 2004-06-17 Wolfgang Hauser An electronic component with a leadframe
DE10247610A1 (de) * 2002-10-11 2004-04-29 Micronas Gmbh Elektronisches Bauelement mit einem Systemträger
US8080444B2 (en) * 2010-01-14 2011-12-20 Freescale Semiconductor, Inc. Method for forming a packaged semiconductor device having a ground plane
JP6104545B2 (ja) * 2012-09-19 2017-03-29 シャープ株式会社 半導体装置の製造方法、および成形部材
JP2019121722A (ja) * 2018-01-10 2019-07-22 株式会社ディスコ パッケージ基板の製造方法

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3802069A (en) * 1972-05-04 1974-04-09 Gte Sylvania Inc Fabricating packages for use in integrated circuits
US4012766A (en) * 1973-08-28 1977-03-15 Western Digital Corporation Semiconductor package and method of manufacture thereof
US4069924A (en) * 1976-11-18 1978-01-24 Western Electric Co., Inc. Methods and apparatus for positioning an article laterally on a support
US4255851A (en) * 1978-12-06 1981-03-17 Western Electric Company, Inc. Method and apparatus for indelibly marking articles during a manufacturing process
US4330790A (en) * 1980-03-24 1982-05-18 National Semiconductor Corporation Tape operated semiconductor device packaging
US4331740A (en) * 1980-04-14 1982-05-25 National Semiconductor Corporation Gang bonding interconnect tape process and structure for semiconductor device automatic assembly
JPS6037754A (ja) * 1983-08-10 1985-02-27 Seiko Epson Corp フラツトパツケ−ジ
US4812421A (en) * 1987-10-26 1989-03-14 Motorola, Inc. Tab-type semiconductor process
GB2178894B (en) * 1985-08-06 1988-07-27 Gen Electric Co Plc Preparation of fragile devices
US4756080A (en) * 1986-01-27 1988-07-12 American Microsystems, Inc. Metal foil semiconductor interconnection method
JPS6331149A (ja) * 1986-07-25 1988-02-09 Fujitsu Ltd 半導体装置
US4884124A (en) * 1986-08-19 1989-11-28 Mitsubishi Denki Kabushiki Kaisha Resin-encapsulated semiconductor device
US4855807A (en) * 1986-12-26 1989-08-08 Kabushiki Kaisha Toshiba Semiconductor device
US4806409A (en) * 1987-05-20 1989-02-21 Olin Corporation Process for providing an improved electroplated tape automated bonding tape and the product produced thereby
JPH01262115A (ja) * 1988-04-14 1989-10-19 Seiko Epson Corp Ｉｃ封止用射出成形金型
US4994895A (en) * 1988-07-11 1991-02-19 Fujitsu Limited Hybrid integrated circuit package structure
US5018003A (en) * 1988-10-20 1991-05-21 Mitsubishi Denki Kabushiki Kaisha Lead frame and semiconductor device
US4924291A (en) * 1988-10-24 1990-05-08 Motorola Inc. Flagless semiconductor package
JPH02134852A (ja) * 1988-11-15 1990-05-23 Nec Corp 樹脂封止型半導体装置

Also Published As

Publication number Publication date
EP0454440B1 (de) 1995-09-06
JP2890662B2 (ja) 1999-05-17
KR910019187A (ko) 1991-11-30
US5289033A (en) 1994-02-22
EP0454440A1 (de) 1991-10-30
KR100222349B1 (ko) 1999-10-01
JPH047848A (ja) 1992-01-13
DE69112693T2 (de) 1996-02-01

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee