DE69026503D1 - Verfahren zur Herstellung von Bauelementen mit übereinander angeordneten selbstjustierten Feldeffekttransistoren aus Polisilizium und sich daraus ergebende Struktur - Google Patents

Verfahren zur Herstellung von Bauelementen mit übereinander angeordneten selbstjustierten Feldeffekttransistoren aus Polisilizium und sich daraus ergebende Struktur

Info

Publication number
DE69026503D1
DE69026503D1 DE69026503T DE69026503T DE69026503D1 DE 69026503 D1 DE69026503 D1 DE 69026503D1 DE 69026503 T DE69026503 T DE 69026503T DE 69026503 T DE69026503 T DE 69026503T DE 69026503 D1 DE69026503 D1 DE 69026503D1
Authority
DE
Germany
Prior art keywords
polisilicon
self
production
components
effect transistors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69026503T
Other languages
English (en)
Other versions
DE69026503T2 (de
Inventor
Carl Cederbaum
Roland Chanclou
Myriam Combes
Patrick Mone
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE69026503D1 publication Critical patent/DE69026503D1/de
Application granted granted Critical
Publication of DE69026503T2 publication Critical patent/DE69026503T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B10/00Static random access memory [SRAM] devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8221Three dimensional integrated circuits stacked in different levels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B10/00Static random access memory [SRAM] devices
    • H10B10/12Static random access memory [SRAM] devices comprising a MOSFET load element
    • H10B10/125Static random access memory [SRAM] devices comprising a MOSFET load element the MOSFET being a thin film transistor [TFT]

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Thin Film Transistor (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
DE69026503T 1990-07-31 1990-07-31 Verfahren zur Herstellung von Bauelementen mit übereinander angeordneten selbstjustierten Feldeffekttransistoren aus Polisilizium und sich daraus ergebende Struktur Expired - Fee Related DE69026503T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP90480112A EP0469217B1 (de) 1990-07-31 1990-07-31 Verfahren zur Herstellung von Bauelementen mit übereinander angeordneten selbstjustierten Feldeffekttransistoren aus Polisilizium und sich daraus ergebende Struktur

Publications (2)

Publication Number Publication Date
DE69026503D1 true DE69026503D1 (de) 1996-05-15
DE69026503T2 DE69026503T2 (de) 1996-11-14

Family

ID=8205838

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69026503T Expired - Fee Related DE69026503T2 (de) 1990-07-31 1990-07-31 Verfahren zur Herstellung von Bauelementen mit übereinander angeordneten selbstjustierten Feldeffekttransistoren aus Polisilizium und sich daraus ergebende Struktur

Country Status (4)

Country Link
US (1) US5100817A (de)
EP (1) EP0469217B1 (de)
JP (1) JPH0613575A (de)
DE (1) DE69026503T2 (de)

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US5235189A (en) * 1991-11-19 1993-08-10 Motorola, Inc. Thin film transistor having a self-aligned gate underlying a channel region
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US5264385A (en) * 1991-12-09 1993-11-23 Texas Instruments Incorporated SRAM design with no moat-to-moat spacing
US6013565A (en) * 1991-12-16 2000-01-11 Penn State Research Foundation High conductivity thin film material for semiconductor device
US5156987A (en) * 1991-12-18 1992-10-20 Micron Technology, Inc. High performance thin film transistor (TFT) by solid phase epitaxial regrowth
US5252849A (en) * 1992-03-02 1993-10-12 Motorola, Inc. Transistor useful for further vertical integration and method of formation
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JP2665644B2 (ja) * 1992-08-11 1997-10-22 三菱電機株式会社 半導体記憶装置
US5403762A (en) * 1993-06-30 1995-04-04 Semiconductor Energy Laboratory Co., Ltd. Method of fabricating a TFT
JPH08130254A (ja) * 1994-10-31 1996-05-21 Mitsubishi Electric Corp 半導体記憶装置
US6242772B1 (en) * 1994-12-12 2001-06-05 Altera Corporation Multi-sided capacitor in an integrated circuit
US5610100A (en) * 1995-04-13 1997-03-11 Texas Instruments Inc. Method for concurrently forming holes for interconnection between different conductive layers and a substrate element or circuit element close to the substrate surface
US5670812A (en) * 1995-09-29 1997-09-23 International Business Machines Corporation Field effect transistor having contact layer of transistor gate electrode material
US5675185A (en) * 1995-09-29 1997-10-07 International Business Machines Corporation Semiconductor structure incorporating thin film transistors with undoped cap oxide layers
US5808319A (en) * 1996-10-10 1998-09-15 Advanced Micro Devices, Inc. Localized semiconductor substrate for multilevel transistors
US6013584A (en) * 1997-02-19 2000-01-11 Applied Materials, Inc. Methods and apparatus for forming HDP-CVD PSG film used for advanced pre-metal dielectric layer applications
US6143640A (en) * 1997-09-23 2000-11-07 International Business Machines Corporation Method of fabricating a stacked via in copper/polyimide beol
US6073576A (en) 1997-11-25 2000-06-13 Cvc Products, Inc. Substrate edge seal and clamp for low-pressure processing equipment
US6350673B1 (en) * 1998-08-13 2002-02-26 Texas Instruments Incorporated Method for decreasing CHC degradation
US6239630B1 (en) 1999-07-23 2001-05-29 Analog Devices Inc CMOS-compatible power-on reset circuit
TW552669B (en) * 2000-06-19 2003-09-11 Infineon Technologies Corp Process for etching polysilicon gate stacks with raised shallow trench isolation structures
JP2002033387A (ja) * 2000-07-17 2002-01-31 Mitsubishi Electric Corp 半導体装置およびその製造方法
KR100574715B1 (ko) 2001-01-30 2006-04-28 가부시키가이샤 히타치세이사쿠쇼 반도체 집적 회로 장치
JP2004022809A (ja) * 2002-06-17 2004-01-22 Renesas Technology Corp 半導体記憶装置
JP2004253730A (ja) * 2003-02-21 2004-09-09 Renesas Technology Corp 半導体集積回路装置およびその製造方法
KR100663360B1 (ko) * 2005-04-20 2007-01-02 삼성전자주식회사 박막 트랜지스터를 갖는 반도체 소자들 및 그 제조방법들
US8049253B2 (en) 2007-07-11 2011-11-01 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
US9048142B2 (en) 2010-12-28 2015-06-02 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US8981367B2 (en) 2011-12-01 2015-03-17 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US10002968B2 (en) 2011-12-14 2018-06-19 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and display device including the same
US8907392B2 (en) 2011-12-22 2014-12-09 Semiconductor Energy Laboratory Co., Ltd. Semiconductor memory device including stacked sub memory cells
US8704221B2 (en) 2011-12-23 2014-04-22 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
WO2015155656A1 (en) * 2014-04-11 2015-10-15 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and electronic device
EP3139405B1 (de) * 2015-09-01 2021-08-11 IMEC vzw Eingebettete verbindung für halbleiterschaltungen
US10700207B2 (en) * 2017-11-30 2020-06-30 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor device integrating backside power grid and related integrated circuit and fabrication method
US10748901B2 (en) * 2018-10-22 2020-08-18 International Business Machines Corporation Interlayer via contacts for monolithic three-dimensional semiconductor integrated circuit devices

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JPS5835969A (ja) * 1981-08-28 1983-03-02 Matsushita Electric Ind Co Ltd 半導体装置
EP0073487B1 (de) * 1981-08-31 1988-07-20 Kabushiki Kaisha Toshiba Verfahren zur Herstellung einer dreidimensionalen Halbleitervorrichtung
JPS5856456A (ja) * 1981-09-30 1983-04-04 Toshiba Corp 半導体装置の製造方法
JPS58124261A (ja) * 1982-01-21 1983-07-23 Toshiba Corp 半導体装置
JPS6089953A (ja) * 1983-10-22 1985-05-20 Agency Of Ind Science & Technol 積層型半導体装置の製造方法
JPS61125150A (ja) * 1984-11-22 1986-06-12 Agency Of Ind Science & Technol 3次元半導体装置の製造方法
US4944836A (en) * 1985-10-28 1990-07-31 International Business Machines Corporation Chem-mech polishing method for producing coplanar metal/insulator films on a substrate
JPH0612799B2 (ja) * 1986-03-03 1994-02-16 三菱電機株式会社 積層型半導体装置およびその製造方法
EP0281711B1 (de) * 1987-01-28 1992-04-22 Advanced Micro Devices, Inc. Statische RAM-Zellen mit vier Transistoren
US4795722A (en) * 1987-02-05 1989-01-03 Texas Instruments Incorporated Method for planarization of a semiconductor device prior to metallization
JPS63299251A (ja) * 1987-05-29 1988-12-06 Toshiba Corp 半導体装置の製造方法
GB2212979A (en) * 1987-12-02 1989-08-02 Philips Nv Fabricating electrical connections,particularly in integrated circuit manufacture
JPH01175260A (ja) * 1987-12-29 1989-07-11 Nec Corp 絶縁ゲート電界効果トランジスタの製造方法
JPH0268151A (ja) * 1988-09-01 1990-03-07 Matsushita Electric Ind Co Ltd 媒体攪拌型粉砕機
JPH0253228A (ja) * 1988-08-16 1990-02-22 Nikon Corp 光学的情報記録再生装置
JPH0273666A (ja) * 1988-09-08 1990-03-13 Sony Corp 半導体メモリ装置
JP2769331B2 (ja) * 1988-09-12 1998-06-25 株式会社日立製作所 半導体集積回路の製造方法
US4987099A (en) * 1989-12-29 1991-01-22 North American Philips Corp. Method for selectively filling contacts or vias or various depths with CVD tungsten

Also Published As

Publication number Publication date
EP0469217A1 (de) 1992-02-05
JPH0613575A (ja) 1994-01-21
EP0469217B1 (de) 1996-04-10
US5100817A (en) 1992-03-31
DE69026503T2 (de) 1996-11-14

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8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee