DE602004004002D1 - Verfahren und Speichersystem basierend auf dualem data strobe mode and einfachem data strobe mode mit Dateninversion - Google Patents

Verfahren und Speichersystem basierend auf dualem data strobe mode and einfachem data strobe mode mit Dateninversion

Info

Publication number
DE602004004002D1
DE602004004002D1 DE602004004002T DE602004004002T DE602004004002D1 DE 602004004002 D1 DE602004004002 D1 DE 602004004002D1 DE 602004004002 T DE602004004002 T DE 602004004002T DE 602004004002 T DE602004004002 T DE 602004004002T DE 602004004002 D1 DE602004004002 D1 DE 602004004002D1
Authority
DE
Germany
Prior art keywords
strobe mode
data strobe
data
storage system
system based
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602004004002T
Other languages
English (en)
Other versions
DE602004004002T2 (de
Inventor
Seong-Jin Jang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of DE602004004002D1 publication Critical patent/DE602004004002D1/de
Application granted granted Critical
Publication of DE602004004002T2 publication Critical patent/DE602004004002T2/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1045—Read-write mode select circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1075—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for multiport memories each having random access ports and serial ports, e.g. video RAM

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Dram (AREA)
DE602004004002T 2003-07-04 2004-06-17 Verfahren und Speichersystem basierend auf dualem data strobe mode and einfachem data strobe mode mit Dateninversion Active DE602004004002T2 (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR2003045413 2003-07-04
KR1020030045413A KR100546339B1 (ko) 2003-07-04 2003-07-04 차동 데이터 스트로빙 모드와 데이터 반전 스킴을 가지는단일 데이터 스트로빙 모드를 선택적으로 구현할 수 있는반도체 장치
US733413 2003-12-12
US10/733,413 US7269699B2 (en) 2003-07-04 2003-12-12 Method and memory system having mode selection between dual data strobe mode and single data strobe mode with inversion

Publications (2)

Publication Number Publication Date
DE602004004002D1 true DE602004004002D1 (de) 2007-02-15
DE602004004002T2 DE602004004002T2 (de) 2007-11-15

Family

ID=33550294

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004004002T Active DE602004004002T2 (de) 2003-07-04 2004-06-17 Verfahren und Speichersystem basierend auf dualem data strobe mode and einfachem data strobe mode mit Dateninversion

Country Status (6)

Country Link
US (1) US7269699B2 (de)
EP (1) EP1494242B1 (de)
JP (1) JP4989022B2 (de)
KR (1) KR100546339B1 (de)
CN (1) CN100530415C (de)
DE (1) DE602004004002T2 (de)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100546335B1 (ko) * 2003-07-03 2006-01-26 삼성전자주식회사 데이터 반전 스킴을 가지는 반도체 장치
KR100560773B1 (ko) * 2003-10-09 2006-03-13 삼성전자주식회사 동작 모드의 재설정없이 버스트 길이를 제어할 수 있는반도체 메모리 장치 및 그것을 포함하는 메모리 시스템
KR100656448B1 (ko) 2005-11-29 2006-12-11 주식회사 하이닉스반도체 반도체 메모리의 ｄｂｉ 신호 생성장치 및 방법
KR100870536B1 (ko) 2005-12-19 2008-11-26 삼성전자주식회사 고속 인터페이스 방식의 반도체 장치, 반도체 시스템, 및 그 방법
JP4662474B2 (ja) * 2006-02-10 2011-03-30 ルネサスエレクトロニクス株式会社 データ処理デバイス
US20110264851A1 (en) * 2006-12-07 2011-10-27 Tae-Keun Jeon Memory system and data transmitting method thereof
KR100912091B1 (ko) 2007-04-30 2009-08-13 삼성전자주식회사 전력 소모를 줄일 수 있는 데이터 인터페이스 방법 및 장치
US8898400B2 (en) * 2007-07-23 2014-11-25 Infineon Technologies Ag Integrated circuit including multiple memory devices
KR20090059838A (ko) * 2007-12-07 2009-06-11 삼성전자주식회사 반도체 장치에서 데이터를 전송하는 방법, 장치 및 시스템
KR101039862B1 (ko) * 2008-11-11 2011-06-13 주식회사 하이닉스반도체 클럭킹 모드를 구비하는 반도체 메모리장치 및 이의 동작방법
KR101113188B1 (ko) 2010-09-30 2012-02-16 주식회사 하이닉스반도체 동작 속도가 가변되는 비휘발성 메모리 장치 및 이를 위한 상보신호 제어 방법
KR101157031B1 (ko) * 2010-11-17 2012-07-11 에스케이하이닉스 주식회사 반도체 메모리 장치 및 이를 포함하는 반도체 시스템
US8638622B2 (en) 2011-07-06 2014-01-28 Arm Limited Apparatus and method for receiving a differential data strobe signal
JP5972549B2 (ja) * 2011-09-29 2016-08-17 ピーエスフォー ルクスコ エスエイアールエルＰＳ４ Ｌｕｘｃｏ Ｓ．ａ．ｒ．ｌ． 半導体装置
KR20130098681A (ko) * 2012-02-28 2013-09-05 삼성전자주식회사 반도체 메모리 장치
US9489323B2 (en) 2013-02-20 2016-11-08 Rambus Inc. Folded memory modules
KR102017809B1 (ko) 2013-02-27 2019-09-03 에스케이하이닉스 주식회사 칩 다이 및 이를 포함하는 반도체 메모리 장치
US9740610B2 (en) * 2014-12-24 2017-08-22 Intel Corporation Polarity based data transfer function for volatile memory
KR20170111572A (ko) * 2016-03-29 2017-10-12 삼성전자주식회사 반도체 메모리 장치 및 이의 동작 방법
US10186309B2 (en) 2016-06-29 2019-01-22 Samsung Electronics Co., Ltd. Methods of operating semiconductor memory devices and semiconductor memory devices
US10692555B2 (en) 2016-06-29 2020-06-23 Samsung Electronics Co., Ltd. Semiconductor memory devices enabling read strobe mode and related methods of operating semiconductor memory devices
KR102641515B1 (ko) 2016-09-19 2024-02-28 삼성전자주식회사 메모리 장치 및 그것의 클록 분배 방법
WO2020176448A1 (en) 2019-02-27 2020-09-03 Rambus Inc. Low power memory with on-demand bandwidth boost
CN111031296B (zh) * 2019-12-17 2021-05-14 南京巨鲨显示科技有限公司 一种光端机单、双纤传输模式自适应系统
US11309013B2 (en) 2020-04-29 2022-04-19 Samsung Electronics Co., Ltd. Memory device for reducing resources used for training
US11756592B2 (en) 2020-09-29 2023-09-12 Samsung Electronics Co., Ltd. Memory device supporting DBI interface and operating method of memory device
CN115440265B (zh) * 2021-06-01 2024-05-17 长鑫存储技术有限公司 存储器
CN115565563A (zh) * 2021-07-02 2023-01-03 脸萌有限公司 存储电路、芯片、数据处理方法和电子设备
TWI763556B (zh) * 2021-07-12 2022-05-01 瑞昱半導體股份有限公司 記憶體系統及其記憶體存取介面裝置

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5155839A (en) * 1989-09-29 1992-10-13 Allen-Bradley Company, Inc. Apparatus using in undifferentiated strobe output to interface either of two incompatible memory access signal types to a memory
JPH05303882A (ja) * 1992-04-24 1993-11-16 Mitsubishi Electric Corp 半導体記憶装置
JPH06267283A (ja) 1993-03-16 1994-09-22 Mitsubishi Electric Corp データ書き込み可能な読み出し専用メモリ及びそのデータ書き込み／読み出し方法
JPH06290582A (ja) * 1993-04-02 1994-10-18 Nec Corp 半導体記憶装置
JPH07282580A (ja) 1994-04-13 1995-10-27 Nec Commun Syst Ltd Ｄｒａｍにおける消費電力低減方式
JPH0845275A (ja) * 1994-07-29 1996-02-16 Toshiba Corp メモリリード／ライト制御方法およびその方法を使用したメモリ装置
US5598376A (en) * 1994-12-23 1997-01-28 Micron Technology, Inc. Distributed write data drivers for burst access memories
JPH09251797A (ja) * 1996-03-18 1997-09-22 Fujitsu Ltd 半導体記憶装置、その救済方法及びその試験方法
KR19980019814A (ko) 1996-09-03 1998-06-25 김광호 가변 버스트 길이를 갖는 버스트형 메모리
WO1998013828A1 (fr) * 1996-09-26 1998-04-02 Mitsubishi Denki Kabushiki Kaisha Memoire a semi-conducteur du type synchrone
KR100278653B1 (ko) * 1998-01-23 2001-02-01 윤종용 이중 데이터율 모드 반도체 메모리 장치
US6016066A (en) * 1998-03-19 2000-01-18 Intel Corporation Method and apparatus for glitch protection for input buffers in a source-synchronous environment
JP2000049307A (ja) * 1998-07-29 2000-02-18 Mitsubishi Electric Corp 半導体記憶装置
KR100272171B1 (ko) * 1998-08-19 2000-12-01 윤종용 저전류 동작 출력 회로 및 입출력 시스템과이를 이용한 데이터입출력 방법
DE19839105B4 (de) * 1998-08-27 2006-04-06 Infineon Technologies Ag Integrierter Halbleiterspeicher mit Steuerungseinrichtung zum taktsynchronen Schreiben und Lesen
JP3259696B2 (ja) * 1998-10-27 2002-02-25 日本電気株式会社 同期型半導体記憶装置
JP4226710B2 (ja) * 1999-01-25 2009-02-18 富士通マイクロエレクトロニクス株式会社 入力バッファ回路、及び半導体装置の動作試験方法
KR100304709B1 (ko) * 1999-07-23 2001-11-01 윤종용 외부에서 데이터 입출력 모드를 제어할 수 있는 반도체 메모리장치
TW438198U (en) * 1999-10-14 2001-05-28 Via Tech Inc Wiring structure of a printed circuit board
JP4011833B2 (ja) * 2000-06-30 2007-11-21 株式会社東芝 半導体メモリ
US6633951B2 (en) * 2001-03-15 2003-10-14 Intel Corporation Method for reducing power consumption through dynamic memory storage inversion
JP2002329393A (ja) * 2001-04-27 2002-11-15 Mitsubishi Electric Corp 同期型半導体記憶装置
KR20030039179A (ko) 2001-11-12 2003-05-17 삼성전자주식회사 싱글 엔디드 스트로브 모드와 디퍼렌셜 스트로브 모드상호간의 모드 변환이 가능한 동기식 반도체 메모리 장치
US6898648B2 (en) * 2002-02-21 2005-05-24 Micron Technology, Inc. Memory bus polarity indicator system and method for reducing the affects of simultaneous switching outputs (SSO) on memory bus timing
KR100493054B1 (ko) * 2003-03-04 2005-06-02 삼성전자주식회사 지연동기 루프를 구비하는 반도체 장치 및 지연동기 루프제어방법
KR100560773B1 (ko) 2003-10-09 2006-03-13 삼성전자주식회사 동작 모드의 재설정없이 버스트 길이를 제어할 수 있는반도체 메모리 장치 및 그것을 포함하는 메모리 시스템

Also Published As

Publication number Publication date
US20050005053A1 (en) 2005-01-06
EP1494242A1 (de) 2005-01-05
KR20050003894A (ko) 2005-01-12
DE602004004002T2 (de) 2007-11-15
JP4989022B2 (ja) 2012-08-01
EP1494242B1 (de) 2007-01-03
CN100530415C (zh) 2009-08-19
KR100546339B1 (ko) 2006-01-26
CN1577609A (zh) 2005-02-09
JP2005032417A (ja) 2005-02-03
US7269699B2 (en) 2007-09-11

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