DE3880735D1 - Integrierter cmos-kreis mit substratvorspannungsregler. - Google Patents
Integrierter cmos-kreis mit substratvorspannungsregler.Info
- Publication number
- DE3880735D1 DE3880735D1 DE8888201025T DE3880735T DE3880735D1 DE 3880735 D1 DE3880735 D1 DE 3880735D1 DE 8888201025 T DE8888201025 T DE 8888201025T DE 3880735 T DE3880735 T DE 3880735T DE 3880735 D1 DE3880735 D1 DE 3880735D1
- Authority
- DE
- Germany
- Prior art keywords
- substrate
- cmos circuit
- integrated cmos
- preload control
- preload
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 230000036316 preload Effects 0.000 title 1
- 239000000758 substrate Substances 0.000 title 1
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/03—Astable circuits
- H03K3/0315—Ring oscillators
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/205—Substrate bias-voltage generators
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NL8701278A NL8701278A (nl) | 1987-05-29 | 1987-05-29 | Geintegreerde cmos-schakeling met een substraatvoorspanningsgenerator. |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3880735D1 true DE3880735D1 (de) | 1993-06-09 |
DE3880735T2 DE3880735T2 (de) | 1993-11-11 |
Family
ID=19850082
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE88201025T Expired - Fee Related DE3880735T2 (de) | 1987-05-29 | 1988-05-20 | Integrierter CMOS-Kreis mit Substratvorspannungsregler. |
Country Status (6)
Country | Link |
---|---|
US (1) | US4820936A (de) |
EP (1) | EP0293045B1 (de) |
JP (1) | JPS63307771A (de) |
KR (1) | KR960013760B1 (de) |
DE (1) | DE3880735T2 (de) |
NL (1) | NL8701278A (de) |
Families Citing this family (29)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5140177A (en) * | 1988-12-02 | 1992-08-18 | Mitsubishi Denki Kabushiki Kaisha | Complementary circuit device returnable to normal operation from latch-up phenomenon |
JPH0783254B2 (ja) * | 1989-03-22 | 1995-09-06 | 株式会社東芝 | 半導体集積回路 |
JPH04129264A (ja) * | 1990-09-20 | 1992-04-30 | Fujitsu Ltd | 半導体集積回路 |
US5081371A (en) * | 1990-11-07 | 1992-01-14 | U.S. Philips Corp. | Integrated charge pump circuit with back bias voltage reduction |
US5117125A (en) * | 1990-11-19 | 1992-05-26 | National Semiconductor Corp. | Logic level control for impact ionization sensitive processes |
US5162668A (en) * | 1990-12-14 | 1992-11-10 | International Business Machines Corporation | Small dropout on-chip voltage regulators with boosted power supply |
JP2902804B2 (ja) * | 1991-04-08 | 1999-06-07 | 株式会社東芝 | 基板バイアス電圧発生回路 |
US5146110A (en) * | 1991-05-22 | 1992-09-08 | Samsung Electronics Co., Ltd. | Semiconductor memory with substrate voltage generating circuit for removing unwanted substrate current during precharge cycle memory mode of operation |
WO1993009592A1 (en) * | 1991-10-30 | 1993-05-13 | Xilinx, Inc. | Regulator for pumped voltage generator |
JP2937591B2 (ja) * | 1991-12-09 | 1999-08-23 | 沖電気工業株式会社 | 基板バイアス発生回路 |
KR950002015B1 (ko) * | 1991-12-23 | 1995-03-08 | 삼성전자주식회사 | 하나의 오실레이터에 의해 동작되는 정전원 발생회로 |
US5347172A (en) * | 1992-10-22 | 1994-09-13 | United Memories, Inc. | Oscillatorless substrate bias generator |
KR0124046B1 (ko) * | 1993-11-18 | 1997-11-25 | 김광호 | 반도체메모리장치의 승압레벨 감지회로 |
JPH07322606A (ja) * | 1994-05-27 | 1995-12-08 | Sony Corp | 昇圧回路及びこれを用いた固体撮像装置 |
US5731736A (en) * | 1995-06-30 | 1998-03-24 | Dallas Semiconductor | Charge pump for digital potentiometers |
JPH09162713A (ja) * | 1995-12-11 | 1997-06-20 | Mitsubishi Electric Corp | 半導体集積回路 |
CH691010A5 (fr) * | 1997-01-09 | 2001-03-30 | Asulab Sa | Appareil électrique fonctionnant à l'aide d'une source photovoltaïque, notamment pièce d'horlogerie. |
EP0853265B1 (de) * | 1997-01-09 | 2002-04-24 | Asulab S.A. | Mit photovoltaischer Zelle funktionierendes elektronisches Gerät, insbesondere Zeitmesswerk |
US6014053A (en) * | 1997-05-12 | 2000-01-11 | Philips Electronics North America Corporation | Amplifier MOS biasing circuit for a avoiding latch-up |
KR100505597B1 (ko) * | 1998-03-17 | 2005-10-12 | 삼성전자주식회사 | 래치업을억제하는벌크바이어스전압발생회로및그발생방법 |
US6141200A (en) * | 1998-04-20 | 2000-10-31 | International Business Machines Corporation | Stacked PFET off-chip driver with a latch bias generator for overvoltage protection |
US6140630A (en) * | 1998-10-14 | 2000-10-31 | Micron Technology, Inc. | Vcc pump for CMOS imagers |
US6825878B1 (en) | 1998-12-08 | 2004-11-30 | Micron Technology, Inc. | Twin P-well CMOS imager |
US7709777B2 (en) * | 2003-06-16 | 2010-05-04 | Micron Technology, Inc. | Pumps for CMOS imagers |
US7061296B2 (en) * | 2003-12-19 | 2006-06-13 | Infineon Technologies Ag | Circuit arrangement for generating a digital clock signal |
FR2896057A1 (fr) * | 2006-01-12 | 2007-07-13 | St Microelectronics Sa | Procede et dispositif de generation d'un nombre aleatoire dans un peripherique usb |
US8638135B2 (en) * | 2011-10-13 | 2014-01-28 | Freescale Semiconductor, Inc. | Integrated circuit having latch-up recovery circuit |
US10516385B2 (en) | 2017-03-31 | 2019-12-24 | Taiwan Semiconductor Manufacturing Co., Ltd. | Ring oscillator, controlling circuit and methods for realignment |
US10461723B2 (en) * | 2017-11-30 | 2019-10-29 | Taiwan Semiconductor Manufacturing Co., Ltd. | Full range realignment ring oscillator |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4142114A (en) * | 1977-07-18 | 1979-02-27 | Mostek Corporation | Integrated circuit with threshold regulation |
JPS5559756A (en) * | 1978-10-30 | 1980-05-06 | Fujitsu Ltd | Semiconductor device |
JPS55107255A (en) * | 1979-02-12 | 1980-08-16 | Mitsubishi Electric Corp | Substrate potential generating circuit device |
DE2966592D1 (en) * | 1979-03-05 | 1984-03-01 | Motorola Inc | Substrate bias regulator |
JPS5632758A (en) * | 1979-08-27 | 1981-04-02 | Fujitsu Ltd | Substrate bias generating circuit |
JPS6033314B2 (ja) * | 1979-11-22 | 1985-08-02 | 富士通株式会社 | 基板バイアス電圧発生回路 |
JPS5785253A (en) * | 1980-11-17 | 1982-05-27 | Toshiba Corp | Semiconductor device |
JPS57186351A (en) * | 1981-05-12 | 1982-11-16 | Fujitsu Ltd | Semiconductor device |
JPS57193054A (en) * | 1981-05-22 | 1982-11-27 | Fujitsu Ltd | Substrate bias generating circuit |
US4439692A (en) * | 1981-12-07 | 1984-03-27 | Signetics Corporation | Feedback-controlled substrate bias generator |
JPS5965467A (ja) * | 1982-10-06 | 1984-04-13 | Matsushita Electronics Corp | 基板電位発生回路 |
JPS59193056A (ja) * | 1983-04-15 | 1984-11-01 | Hitachi Ltd | 基板バイアス電圧発生回路 |
-
1987
- 1987-05-29 NL NL8701278A patent/NL8701278A/nl not_active Application Discontinuation
- 1987-09-08 US US07/094,363 patent/US4820936A/en not_active Expired - Fee Related
-
1988
- 1988-05-20 EP EP88201025A patent/EP0293045B1/de not_active Expired - Lifetime
- 1988-05-20 DE DE88201025T patent/DE3880735T2/de not_active Expired - Fee Related
- 1988-05-26 JP JP63127214A patent/JPS63307771A/ja active Pending
- 1988-05-26 KR KR1019880006148A patent/KR960013760B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
DE3880735T2 (de) | 1993-11-11 |
JPS63307771A (ja) | 1988-12-15 |
EP0293045A1 (de) | 1988-11-30 |
KR880014438A (ko) | 1988-12-23 |
US4820936A (en) | 1989-04-11 |
KR960013760B1 (ko) | 1996-10-10 |
EP0293045B1 (de) | 1993-05-05 |
NL8701278A (nl) | 1988-12-16 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: PHILIPS ELECTRONICS N.V., EINDHOVEN, NL |
|
8339 | Ceased/non-payment of the annual fee |