DE3851392D1 - Halbleiteranordnung mit einer Leiterschicht. - Google Patents

Halbleiteranordnung mit einer Leiterschicht.

Info

Publication number
DE3851392D1
DE3851392D1 DE3851392T DE3851392T DE3851392D1 DE 3851392 D1 DE3851392 D1 DE 3851392D1 DE 3851392 T DE3851392 T DE 3851392T DE 3851392 T DE3851392 T DE 3851392T DE 3851392 D1 DE3851392 D1 DE 3851392D1
Authority
DE
Germany
Prior art keywords
conductor layer
semiconductor arrangement
semiconductor
arrangement
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3851392T
Other languages
English (en)
Other versions
DE3851392T2 (de
Inventor
Tohru Watanabe
Katsuya Okumura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE3851392D1 publication Critical patent/DE3851392D1/de
Publication of DE3851392T2 publication Critical patent/DE3851392T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/312—Organic layers, e.g. photoresist
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
    • H01L21/76828—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/5328—Conductive materials containing conductive organic materials or pastes, e.g. conductive adhesives, inks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02266—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12044—OLED
DE3851392T 1987-07-31 1988-07-29 Halbleiteranordnung mit einer Leiterschicht. Expired - Fee Related DE3851392T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62192068A JP2557898B2 (ja) 1987-07-31 1987-07-31 半導体装置

Publications (2)

Publication Number Publication Date
DE3851392D1 true DE3851392D1 (de) 1994-10-13
DE3851392T2 DE3851392T2 (de) 1995-02-23

Family

ID=16285092

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3851392T Expired - Fee Related DE3851392T2 (de) 1987-07-31 1988-07-29 Halbleiteranordnung mit einer Leiterschicht.

Country Status (5)

Country Link
US (2) US5101259A (de)
EP (1) EP0301565B1 (de)
JP (1) JP2557898B2 (de)
KR (1) KR920010127B1 (de)
DE (1) DE3851392T2 (de)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2859288B2 (ja) 1989-03-20 1999-02-17 株式会社日立製作所 半導体集積回路装置及びその製造方法
EP0562625B1 (de) * 1992-03-27 1997-06-04 Matsushita Electric Industrial Co., Ltd. Halbleitervorrichtung samt Herstellungsverfahren
GB2285337B (en) * 1993-12-28 1997-12-17 Fujitsu Ltd Manufacture of semiconductor device with aluminium wiring
US5504042A (en) * 1994-06-23 1996-04-02 Texas Instruments Incorporated Porous dielectric material with improved pore surface properties for electronics applications
US6380105B1 (en) 1996-11-14 2002-04-30 Texas Instruments Incorporated Low volatility solvent-based method for forming thin film nanoporous aerogels on semiconductor substrates
US5807607A (en) * 1995-11-16 1998-09-15 Texas Instruments Incorporated Polyol-based method for forming thin film aerogels on semiconductor substrates
US6319852B1 (en) 1995-11-16 2001-11-20 Texas Instruments Incorporated Nanoporous dielectric thin film formation using a post-deposition catalyst
US6130152A (en) 1995-11-16 2000-10-10 Texas Instruments Incorporated Aerogel thin film formation from multi-solvent systems
US6034420A (en) * 1997-12-18 2000-03-07 Advanced Micro Devices, Inc. Electromigration resistant patterned metal layer gap filled with HSQ
US6136665A (en) * 1998-06-03 2000-10-24 United Microelectronics Corp. Method for forming a recess-free buffer layer
US6063547A (en) * 1998-06-11 2000-05-16 Chartered Semiconductor Manufacturing, Ltd. Physical vapor deposition poly-p-phenylene sulfide film as a bottom anti-reflective coating on polysilicon
WO2000040637A1 (en) 1999-01-08 2000-07-13 The Dow Chemical Company Low dielectric constant polymers having good adhesion and toughness and articles made with such polymers
CN100451830C (zh) * 2000-02-22 2009-01-14 布鲁尔科技公司 由化学气相沉积法沉积的有机聚合物抗反射涂层
US6936405B2 (en) 2000-02-22 2005-08-30 Brewer Science Inc. Organic polymeric antireflective coatings deposited by chemical vapor deposition
US7132219B2 (en) * 2001-02-02 2006-11-07 Brewer Science Inc. Polymeric antireflective coatings deposited by plasma enhanced chemical vapor deposition
US6852474B2 (en) * 2002-04-30 2005-02-08 Brewer Science Inc. Polymeric antireflective coatings deposited by plasma enhanced chemical vapor deposition
US20050255410A1 (en) 2004-04-29 2005-11-17 Guerrero Douglas J Anti-reflective coatings using vinyl ether crosslinkers
US20070207406A1 (en) * 2004-04-29 2007-09-06 Guerrero Douglas J Anti-reflective coatings using vinyl ether crosslinkers
JP2007142138A (ja) * 2005-11-18 2007-06-07 Mitsubishi Electric Corp 半導体装置
US7914974B2 (en) 2006-08-18 2011-03-29 Brewer Science Inc. Anti-reflective imaging layer for multiple patterning process
US8133659B2 (en) * 2008-01-29 2012-03-13 Brewer Science Inc. On-track process for patterning hardmask by multiple dark field exposures
US9640396B2 (en) * 2009-01-07 2017-05-02 Brewer Science Inc. Spin-on spacer materials for double- and triple-patterning lithography
WO2014065513A1 (ko) 2012-10-25 2014-05-01 서강대학교 산학협력단 약물을 함유한 나노입자가 결합된 초음파 조영제 및 이의 제조방법

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54131872A (en) * 1978-04-04 1979-10-13 Toshiba Corp Forming method for dielectric layer of semiconductor device
JPS55156342A (en) * 1979-05-25 1980-12-05 Hitachi Ltd Resin sealed electronic parts
JPS568825A (en) * 1979-07-05 1981-01-29 Fujitsu Ltd Semiconductor device
JPS6028392B2 (ja) * 1980-07-16 1985-07-04 信越化学工業株式会社 電子部品封止用樹脂組成物
US4499149A (en) * 1980-12-15 1985-02-12 M&T Chemicals Inc. Siloxane-containing polymers
JPS57153456A (en) * 1981-03-18 1982-09-22 Shin Etsu Chem Co Ltd Sealing for electronic component parts
US4505029A (en) * 1981-03-23 1985-03-19 General Electric Company Semiconductor device with built-up low resistance contact
JPS57159032A (en) * 1981-03-27 1982-10-01 Hitachi Ltd Forming method for package of electronic timepiece
US4499145A (en) * 1982-04-19 1985-02-12 Sumitomo Bakelite Company Limited Metal-clad laminate and process for producing the same
US4528346A (en) * 1982-09-17 1985-07-09 Dainippun Ink and Chemicals, Inc. Resin composition
JPS5955037A (ja) * 1982-09-24 1984-03-29 Hitachi Ltd 半導体装置
JPS5982746A (ja) * 1982-11-04 1984-05-12 Toshiba Corp 半導体装置の電極配線方法
US4507333A (en) * 1982-11-22 1985-03-26 International Business Machines Corporation Biphenylene end-capped quinoxaline polymers and their use as insulating coatings for semiconductor devices
JPS6030153A (ja) * 1983-07-28 1985-02-15 Toshiba Corp 半導体装置
JPS60245254A (ja) * 1984-05-21 1985-12-05 Hitachi Ltd 層間絶縁膜の形成方法
DE3571723D1 (en) * 1984-08-23 1989-08-24 Fairchild Semiconductor A process for forming vias on integrated circuits
JPS6233445A (ja) * 1985-08-07 1987-02-13 Nec Corp 多層配線とその製造方法
DE3675321D1 (de) * 1985-08-16 1990-12-06 Dai Ichi Seiko Co Ltd Halbleiteranordnung mit packung vom steckerstifttyp.
US4707244A (en) * 1986-01-21 1987-11-17 Beckman Industrial Corporation Solid state sensor element
US4782028A (en) * 1987-08-27 1988-11-01 Santa Barbara Research Center Process methodology for two-sided fabrication of devices on thinned silicon

Also Published As

Publication number Publication date
KR890002989A (ko) 1989-04-12
JP2557898B2 (ja) 1996-11-27
JPS6436031A (en) 1989-02-07
US5101259A (en) 1992-03-31
DE3851392T2 (de) 1995-02-23
KR920010127B1 (ko) 1992-11-16
US5302548A (en) 1994-04-12
EP0301565A3 (en) 1990-07-18
EP0301565B1 (de) 1994-09-07
EP0301565A2 (de) 1989-02-01

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)
8339 Ceased/non-payment of the annual fee