DE3782071T2 - Verfahren zur herstellung von halbleiterbauelemente mit gehaeusestruktur. - Google Patents

Verfahren zur herstellung von halbleiterbauelemente mit gehaeusestruktur.

Info

Publication number
DE3782071T2
DE3782071T2 DE8787400612T DE3782071T DE3782071T2 DE 3782071 T2 DE3782071 T2 DE 3782071T2 DE 8787400612 T DE8787400612 T DE 8787400612T DE 3782071 T DE3782071 T DE 3782071T DE 3782071 T2 DE3782071 T2 DE 3782071T2
Authority
DE
Germany
Prior art keywords
pellet
semiconductor chip
cap
filling
frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8787400612T
Other languages
German (de)
English (en)
Other versions
DE3782071D1 (de
Inventor
Toshio Hamano
Shigeo Natsume
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3782071D1 publication Critical patent/DE3782071D1/de
Publication of DE3782071T2 publication Critical patent/DE3782071T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49146—Assembling to base an electrical component, e.g., capacitor, etc. with encapsulating, e.g., potting, etc.

Landscapes

  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
DE8787400612T 1986-03-19 1987-03-19 Verfahren zur herstellung von halbleiterbauelemente mit gehaeusestruktur. Expired - Fee Related DE3782071T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61059481A JPS62217645A (ja) 1986-03-19 1986-03-19 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
DE3782071D1 DE3782071D1 (de) 1992-11-12
DE3782071T2 true DE3782071T2 (de) 1993-02-11

Family

ID=13114541

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8787400612T Expired - Fee Related DE3782071T2 (de) 1986-03-19 1987-03-19 Verfahren zur herstellung von halbleiterbauelemente mit gehaeusestruktur.

Country Status (5)

Country Link
US (1) US4999319A (Direct)
EP (1) EP0238418B1 (Direct)
JP (1) JPS62217645A (Direct)
KR (1) KR900003829B1 (Direct)
DE (1) DE3782071T2 (Direct)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5264393A (en) * 1988-11-25 1993-11-23 Fuji Photo Film Co., Ltd. Solid state image pickup device and method of manufacturing the same
US5098864A (en) * 1989-11-29 1992-03-24 Olin Corporation Process for manufacturing a metal pin grid array package
US5086018A (en) * 1991-05-02 1992-02-04 International Business Machines Corporation Method of making a planarized thin film covered wire bonded semiconductor package
US5273940A (en) * 1992-06-15 1993-12-28 Motorola, Inc. Multiple chip package with thinned semiconductor chips
JP2888040B2 (ja) * 1992-07-10 1999-05-10 日本電気株式会社 半導体装置およびその製造方法
US5663106A (en) * 1994-05-19 1997-09-02 Tessera, Inc. Method of encapsulating die and chip carrier
US5776796A (en) * 1994-05-19 1998-07-07 Tessera, Inc. Method of encapsulating a semiconductor package
US5834339A (en) 1996-03-07 1998-11-10 Tessera, Inc. Methods for providing void-free layers for semiconductor assemblies
JP3199963B2 (ja) * 1994-10-06 2001-08-20 株式会社東芝 半導体装置の製造方法
US5929517A (en) 1994-12-29 1999-07-27 Tessera, Inc. Compliant integrated circuit package and method of fabricating the same
US5723787A (en) * 1996-03-04 1998-03-03 Alliedsignal, Inc. Accelerometer mounting system
US6083768A (en) 1996-09-06 2000-07-04 Micron Technology, Inc. Gravitationally-assisted control of spread of viscous material applied to semiconductor assembly components
US6214640B1 (en) 1999-02-10 2001-04-10 Tessera, Inc. Method of manufacturing a plurality of semiconductor packages
US7335995B2 (en) * 2001-10-09 2008-02-26 Tessera, Inc. Microelectronic assembly having array including passive elements and interconnects
US6897565B2 (en) * 2001-10-09 2005-05-24 Tessera, Inc. Stacked packages
US6977440B2 (en) * 2001-10-09 2005-12-20 Tessera, Inc. Stacked packages
USD540978S1 (en) 2004-06-08 2007-04-17 The Coleman Company, Inc. Flashlight lens
CN102779910A (zh) * 2011-05-10 2012-11-14 弘凯光电股份有限公司 发光二极管封装方法

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3706840A (en) * 1971-05-10 1972-12-19 Intersil Inc Semiconductor device packaging
JPS50144758A (Direct) * 1974-05-09 1975-11-20
US4218701A (en) * 1978-07-24 1980-08-19 Citizen Watch Co., Ltd. Package for an integrated circuit having a container with support bars
JPS5632736A (en) * 1979-08-24 1981-04-02 Nec Corp Sealing method of hybrid integrated circuit device
DE3040867C2 (de) * 1980-10-30 1985-01-17 Telefunken electronic GmbH, 7100 Heilbronn Verfahren zur Herstellung einer Halbleiteranordnung
JPS5814545A (ja) * 1981-07-17 1983-01-27 Citizen Watch Co Ltd Ｉｃの実装方法
JPS5880845A (ja) * 1981-11-09 1983-05-16 Hitachi Ltd 固体撮像装置の製造方法
US4477828A (en) * 1982-10-12 1984-10-16 Scherer Jeremy D Microcircuit package and sealing method
JPS59145534A (ja) * 1983-02-09 1984-08-21 Matsushita Electric Ind Co Ltd 半導体デバイスの封止方法
JPS59159547A (ja) * 1983-03-03 1984-09-10 Matsushita Electric Ind Co Ltd 半導体素子の保護方法
JPS6017936A (ja) * 1983-07-12 1985-01-29 Sumitomo Bakelite Co Ltd 半導体封止用樹脂組成物
US4818812A (en) * 1983-08-22 1989-04-04 International Business Machines Corporation Sealant for integrated circuit modules, polyester suitable therefor and preparation of polyester
JPS6080258A (ja) * 1983-10-07 1985-05-08 Fuji Xerox Co Ltd 樹脂封止型半導体装置の製造方法
JPS60111431A (ja) * 1983-11-21 1985-06-17 Toshiba Corp 電子部品の製造方法
JPS60154543A (ja) * 1984-01-24 1985-08-14 Nec Corp 合成樹脂基板を用いた半導体装置
JPS60222450A (ja) * 1984-04-20 1985-11-07 Mitsui Toatsu Chem Inc リジンエステルトリイソシアナ−トの製造方法
JPS6153321A (ja) * 1984-08-23 1986-03-17 Toshiba Corp 半導体封止用エポキシ樹脂組成物及びそれを用いた樹脂封止型半導体装置

Also Published As

Publication number Publication date
KR870009466A (ko) 1987-10-26
EP0238418A2 (en) 1987-09-23
US4999319A (en) 1991-03-12
DE3782071D1 (de) 1992-11-12
EP0238418B1 (en) 1992-10-07
EP0238418A3 (en) 1990-05-16
KR900003829B1 (ko) 1990-06-02
JPH0528906B2 (Direct) 1993-04-27
JPS62217645A (ja) 1987-09-25

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee