DE3775639D1 - Halbleiteranordnung mit einer schmelzsicherungsschaltung und einer erkennungsschaltung, um schmelzsicherungszustaende in der schmelzsicherungsschaltung zu erkennen. - Google Patents

Halbleiteranordnung mit einer schmelzsicherungsschaltung und einer erkennungsschaltung, um schmelzsicherungszustaende in der schmelzsicherungsschaltung zu erkennen.

Info

Publication number
DE3775639D1
DE3775639D1 DE8787108403T DE3775639T DE3775639D1 DE 3775639 D1 DE3775639 D1 DE 3775639D1 DE 8787108403 T DE8787108403 T DE 8787108403T DE 3775639 T DE3775639 T DE 3775639T DE 3775639 D1 DE3775639 D1 DE 3775639D1
Authority
DE
Germany
Prior art keywords
meltfuse
circuit
states
fuses
detect
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8787108403T
Other languages
English (en)
Inventor
Takao Akaogi
Hiromi Kawashima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3775639D1 publication Critical patent/DE3775639D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/78Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/785Masking faults in memories by using spares or by reconfiguring using programmable devices with redundancy programming schemes
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C17/00Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/16Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C17/00Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/18Auxiliary circuits, e.g. for writing into memory
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/78Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/835Masking faults in memories by using spares or by reconfiguring using programmable devices with roll call arrangements for redundant substitutions
DE8787108403T 1986-06-11 1987-06-10 Halbleiteranordnung mit einer schmelzsicherungsschaltung und einer erkennungsschaltung, um schmelzsicherungszustaende in der schmelzsicherungsschaltung zu erkennen. Expired - Fee Related DE3775639D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61133782A JPS62291799A (ja) 1986-06-11 1986-06-11 半導体記憶装置

Publications (1)

Publication Number Publication Date
DE3775639D1 true DE3775639D1 (de) 1992-02-13

Family

ID=15112867

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8787108403T Expired - Fee Related DE3775639D1 (de) 1986-06-11 1987-06-10 Halbleiteranordnung mit einer schmelzsicherungsschaltung und einer erkennungsschaltung, um schmelzsicherungszustaende in der schmelzsicherungsschaltung zu erkennen.

Country Status (5)

Country Link
US (1) US4773046A (de)
EP (1) EP0252325B1 (de)
JP (1) JPS62291799A (de)
KR (1) KR910001533B1 (de)
DE (1) DE3775639D1 (de)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2633420B1 (fr) * 1988-06-28 1992-02-21 Schlumberger Ind Sa Support d'informations et systeme de gestion de tels supports
JPH0793037B2 (ja) * 1988-11-21 1995-10-09 三菱電機株式会社 半導体記憶装置
JPH081755B2 (ja) * 1989-06-26 1996-01-10 日本電気株式会社 置換アドレス判定回路
US5032708A (en) * 1989-08-10 1991-07-16 International Business Machines Corp. Write-once-read-once batteryless authentication token
FR2660795B1 (fr) * 1990-04-10 1994-01-07 Sgs Thomson Microelectronics Sa Circuit de detection de fusible.
JP2960752B2 (ja) * 1990-06-07 1999-10-12 シャープ株式会社 半導体記憶装置
KR940008213B1 (ko) * 1991-12-31 1994-09-08 현대전자산업 주식회사 컬럼 리페어의 입출력 선택회로
US5539402A (en) * 1992-08-03 1996-07-23 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration System for memorizing maximum values
US5422850A (en) * 1993-07-12 1995-06-06 Texas Instruments Incorporated Semiconductor memory device and defective memory cell repair circuit
JPH0793172A (ja) * 1993-09-24 1995-04-07 Nec Corp 冗長ブロック切り替え回路
US5404049A (en) * 1993-11-02 1995-04-04 International Business Machines Corporation Fuse blow circuit
US6188239B1 (en) * 1996-08-12 2001-02-13 Micron Technology, Inc. Semiconductor programmable test arrangement such as an antifuse to ID circuit having common access switches and/or common programming switches
DE19755384C2 (de) * 1997-12-12 2000-05-04 Siemens Ag System zum Trimmen elektronischer Bauelemente oder Sensoren
KR100287541B1 (ko) 1998-05-29 2001-04-16 윤종용 반도체 메모리 장치의 리던던시 디코더 인에이블회로
JP2002109900A (ja) 2000-09-28 2002-04-12 Mitsubishi Electric Corp 半導体装置、および半導体記憶装置のテスト方法
US6373771B1 (en) 2001-01-17 2002-04-16 International Business Machines Corporation Integrated fuse latch and shift register for efficient programming and fuse readout
US6903986B2 (en) * 2002-05-08 2005-06-07 Semtech Corporation Method and apparatus for improving the reliability of the reading of integrated circuit fuses
DE10319273B4 (de) * 2003-04-29 2008-11-06 Infineon Technologies Ag Verfahren und Vorrichtung zum Bewerten und Nachprogrammieren von einmal programmierbaren Zellen
WO2005015567A1 (de) * 2003-07-29 2005-02-17 Infineon Technologies Ag Nichtflüchtiges speicherelement mit erhöhter datensicherheit
US7289382B2 (en) * 2003-12-23 2007-10-30 Intel Corporation Rewritable fuse memory
JP2007172720A (ja) * 2005-12-21 2007-07-05 Nec Electronics Corp 半導体装置、半導体記憶装置、制御信号生成方法、及び救済方法
US7514982B2 (en) 2006-08-31 2009-04-07 Micron Technology, Inc. Methods, devices and systems for sensing the state of fuse devices
KR100921831B1 (ko) 2007-12-27 2009-10-16 주식회사 하이닉스반도체 반도체 메모리 장치의 퓨즈 모니터링 회로
KR100921830B1 (ko) * 2007-12-27 2009-10-16 주식회사 하이닉스반도체 반도체 메모리 장치의 퓨즈 모니터링 회로

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59117798A (ja) * 1982-12-24 1984-07-07 Mitsubishi Electric Corp 半導体メモリ装置
JPS60103594A (ja) * 1983-11-10 1985-06-07 Fujitsu Ltd 情報記憶回路
JPS60195800A (ja) * 1984-03-16 1985-10-04 Hitachi Ltd 半導体集積回路装置
JPS6134799A (ja) * 1984-07-26 1986-02-19 Fujitsu Ltd 半導体集積回路装置
JPS61123100A (ja) * 1984-11-20 1986-06-10 Fujitsu Ltd 半導体記憶装置
US4734885A (en) * 1985-10-17 1988-03-29 Harris Corporation Programming arrangement for programmable devices

Also Published As

Publication number Publication date
EP0252325A3 (en) 1990-01-31
JPS62291799A (ja) 1987-12-18
EP0252325A2 (de) 1988-01-13
JPH054760B2 (de) 1993-01-20
US4773046A (en) 1988-09-20
KR910001533B1 (ko) 1991-03-15
EP0252325B1 (de) 1992-01-02
KR880000974A (ko) 1988-03-30

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee