DE3381604D1 - Verfahren zum herstellen einer halbleiteranordnung mit einem basisgebiet, das einen tiefen bereich aufweist. - Google Patents

Verfahren zum herstellen einer halbleiteranordnung mit einem basisgebiet, das einen tiefen bereich aufweist.

Info

Publication number
DE3381604D1
DE3381604D1 DE8383105802T DE3381604T DE3381604D1 DE 3381604 D1 DE3381604 D1 DE 3381604D1 DE 8383105802 T DE8383105802 T DE 8383105802T DE 3381604 T DE3381604 T DE 3381604T DE 3381604 D1 DE3381604 D1 DE 3381604D1
Authority
DE
Germany
Prior art keywords
area
producing
semiconductor arrangement
deep
base area
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8383105802T
Other languages
English (en)
Inventor
Bantval Jayant Baliga
Michael Stuart Adler
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
General Electric Co
Original Assignee
General Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=23552352&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=DE3381604(D1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by General Electric Co filed Critical General Electric Co
Application granted granted Critical
Publication of DE3381604D1 publication Critical patent/DE3381604D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395—Vertical transistors, e.g. vertical IGBT
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/914—Polysilicon containing oxygen, nitrogen, or carbon, e.g. sipos

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Bipolar Transistors (AREA)
  • Electrodes Of Semiconductors (AREA)
DE8383105802T 1982-06-28 1983-06-14 Verfahren zum herstellen einer halbleiteranordnung mit einem basisgebiet, das einen tiefen bereich aufweist. Expired - Fee Related DE3381604D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/392,870 US4443931A (en) 1982-06-28 1982-06-28 Method of fabricating a semiconductor device with a base region having a deep portion

Publications (1)

Publication Number Publication Date
DE3381604D1 true DE3381604D1 (de) 1990-06-28

Family

ID=23552352

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8383105802T Expired - Fee Related DE3381604D1 (de) 1982-06-28 1983-06-14 Verfahren zum herstellen einer halbleiteranordnung mit einem basisgebiet, das einen tiefen bereich aufweist.

Country Status (6)

Country Link
US (1) US4443931A (de)
EP (1) EP0097866B1 (de)
JP (1) JPS5917283A (de)
DE (1) DE3381604D1 (de)
IE (1) IE56041B1 (de)
MX (1) MX153211A (de)

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US4983535A (en) * 1981-10-15 1991-01-08 Siliconix Incorporated Vertical DMOS transistor fabrication process
US4598461A (en) * 1982-01-04 1986-07-08 General Electric Company Methods of making self-aligned power MOSFET with integral source-base short
US4809047A (en) * 1983-09-06 1989-02-28 General Electric Company Insulated-gate semiconductor device with improved base-to-source electrode short and method of fabricating said short
JPS6076144A (ja) * 1983-10-03 1985-04-30 Matsushita Electronics Corp 半導体装置の製造方法
DE3402867A1 (de) * 1984-01-27 1985-08-01 Siemens AG, 1000 Berlin und 8000 München Halbleiterbauelement mit kontaktloch
JPS62501111A (ja) * 1984-05-02 1987-04-30 インタ−ナショナル・スタンダ−ド・エレクトリック・コ−ポレイション 半導体装置および配置
IT1214805B (it) * 1984-08-21 1990-01-18 Ates Componenti Elettron Spositivi a semiconduttore con giunprocesso per la fabbricazione di dizioni planari a concentrazione di carica variabile e ad altissima tensione di breakdown
US4639754A (en) * 1985-02-25 1987-01-27 Rca Corporation Vertical MOSFET with diminished bipolar effects
GB2173037A (en) * 1985-03-29 1986-10-01 Philips Electronic Associated Semiconductor devices employing conductivity modulation
EP0202477A3 (de) * 1985-04-24 1988-04-20 General Electric Company Verfahren zum Herstellen elektrischer Kurzschlüsse zwischen benachbarten Gebieten in einer Halbleiteranordnung mit isoliertem Gate
JPS6252966A (ja) * 1985-09-02 1987-03-07 Toshiba Corp 半導体装置の製造方法
US4809045A (en) * 1985-09-30 1989-02-28 General Electric Company Insulated gate device
DE3689680T2 (de) * 1985-09-30 1994-06-23 Toshiba Kawasaki Kk Mittels Steuerelektrode abschaltbarer Thyristor mit unabhängigen Zünd-/Lösch-Kontrolltransistoren.
US4963951A (en) * 1985-11-29 1990-10-16 General Electric Company Lateral insulated gate bipolar transistors with improved latch-up immunity
EP0229362B1 (de) * 1986-01-10 1993-03-17 General Electric Company Halbleitervorrichtung und Methode zur Herstellung
IT1204243B (it) * 1986-03-06 1989-03-01 Sgs Microelettronica Spa Procedimento autoallineato per la fabbricazione di celle dmos di piccole dimensioni e dispositivi mos ottenuti mediante detto procedimento
US4798810A (en) * 1986-03-10 1989-01-17 Siliconix Incorporated Method for manufacturing a power MOS transistor
US4816882A (en) * 1986-03-10 1989-03-28 Siliconix Incorporated Power MOS transistor with equipotential ring
US5262336A (en) * 1986-03-21 1993-11-16 Advanced Power Technology, Inc. IGBT process to produce platinum lifetime control
US4716126A (en) * 1986-06-05 1987-12-29 Siliconix Incorporated Fabrication of double diffused metal oxide semiconductor transistor
FR2605800B1 (fr) * 1986-10-24 1989-01-13 Thomson Semiconducteurs Procede de fabrication d'un composant mos
JP2552880B2 (ja) * 1986-11-12 1996-11-13 シリコニックス・インコーポレイテッド 垂直ｄｍｏｓセル構造
US4883767A (en) * 1986-12-05 1989-11-28 General Electric Company Method of fabricating self aligned semiconductor devices
DE3790800C2 (de) * 1986-12-05 1999-08-12 Gen Electric Verfahren zum Herstellen selbstausgerichteter Halbleiterelemente
US4794432A (en) * 1987-01-27 1988-12-27 General Electric Company Mosfet structure with substrate coupled source
JPH01225164A (ja) * 1988-03-03 1989-09-08 Fuji Electric Co Ltd 絶縁ゲートｍｏｓｆｅｔの製造方法
US4857983A (en) * 1987-05-19 1989-08-15 General Electric Company Monolithically integrated semiconductor device having bidirectional conducting capability and method of fabrication
US4888627A (en) * 1987-05-19 1989-12-19 General Electric Company Monolithically integrated lateral insulated gate semiconductor device
US4847671A (en) * 1987-05-19 1989-07-11 General Electric Company Monolithically integrated insulated gate semiconductor device
US4795716A (en) * 1987-06-19 1989-01-03 General Electric Company Method of making a power IC structure with enhancement and/or CMOS logic
EP0330122B1 (de) * 1988-02-24 1995-10-25 Siemens Aktiengesellschaft Verfahren zur Herstellung eines durch Feldeffekt steuerbaren Bipolartransistors
EP0340445B1 (de) * 1988-04-22 1993-08-25 Asea Brown Boveri Ag Abschaltbares Leistungshalbleiterbauelement
US4969027A (en) * 1988-07-18 1990-11-06 General Electric Company Power bipolar transistor device with integral antisaturation diode
US4853345A (en) * 1988-08-22 1989-08-01 Delco Electronics Corporation Process for manufacture of a vertical DMOS transistor
US5034346A (en) * 1988-08-25 1991-07-23 Micrel Inc. Method for forming shorting contact for semiconductor which allows for relaxed alignment tolerance
JP2752385B2 (ja) * 1988-08-29 1998-05-18 ニスコ株式会社 ドリル型リベット
US5072266A (en) 1988-12-27 1991-12-10 Siliconix Incorporated Trench DMOS power transistor with field-shaping body profile and three-dimensional geometry
US5119162A (en) * 1989-02-10 1992-06-02 Texas Instruments Incorporated Integrated power DMOS circuit with protection diode
US4931408A (en) * 1989-10-13 1990-06-05 Siliconix Incorporated Method of fabricating a short-channel low voltage DMOS transistor
IT1236994B (it) * 1989-12-29 1993-05-12 Sgs Thomson Microelectronics Processo per la fabbricazione di dispositivi semiconduttori mos di potenza e dispositivi con esso ottenuti
US5171705A (en) * 1991-11-22 1992-12-15 Supertex, Inc. Self-aligned structure and process for DMOS transistor
US5248627A (en) * 1992-03-20 1993-09-28 Siliconix Incorporated Threshold adjustment in fabricating vertical dmos devices
JP3417013B2 (ja) * 1993-10-18 2003-06-16 株式会社デンソー 絶縁ゲート型バイポーラトランジスタ
US5378641A (en) * 1993-02-22 1995-01-03 Micron Semiconductor, Inc. Electrically conductive substrate interconnect continuity region and method of forming same with an angled implant
US5858845A (en) * 1994-09-27 1999-01-12 Micron Technology, Inc. Electrically conductive substrate interconnect continuity region and method of forming same with an angled implant
US5395776A (en) * 1993-05-12 1995-03-07 At&T Corp. Method of making a rugged DMOS device
US5471075A (en) * 1994-05-26 1995-11-28 North Carolina State University Dual-channel emitter switched thyristor with trench gate
US5488236A (en) * 1994-05-26 1996-01-30 North Carolina State University Latch-up resistant bipolar transistor with trench IGFET and buried collector
JP3279151B2 (ja) * 1995-10-23 2002-04-30 トヨタ自動車株式会社 半導体装置及びその製造方法
JP3464382B2 (ja) * 1998-05-18 2003-11-10 ローム株式会社 縦型二重拡散ｍｏｓｆｅｔの製造方法
EP0993033A1 (de) * 1998-10-06 2000-04-12 STMicroelectronics S.r.l. Gate-Isolierungsstruktur für Leistungs-MOS-Transistor und Herstellungsverfahren dafür
DE19958234C2 (de) * 1999-12-03 2001-12-20 Infineon Technologies Ag Anordnung eines Gebietes zur elektrischen Isolation erster aktiver Zellen von zweiten aktiven Zellen
EP1531497A1 (de) * 2003-11-17 2005-05-18 ABB Technology AG IGBT Kathodendesign mit verbessertem Sicherheitsbetriebsbereich
CN111999632B (zh) * 2019-05-27 2023-02-03 合肥晶合集成电路股份有限公司 Pn结样品的获取方法
CN110176401B (zh) * 2019-06-13 2022-08-30 深圳市锐骏半导体股份有限公司 一种降低vdmos生产成本的方法

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US4181542A (en) * 1976-10-25 1980-01-01 Nippon Gakki Seizo Kabushiki Kaisha Method of manufacturing junction field effect transistors
JPS5432982A (en) * 1977-08-18 1979-03-10 Mitsubishi Electric Corp Manufacture of gate turn off thyristor
JPS54161894A (en) * 1978-06-13 1979-12-21 Toshiba Corp Manufacture of semiconductor device
US4199380A (en) * 1978-11-13 1980-04-22 Motorola, Inc. Integrated circuit method
FR2460542A1 (fr) * 1979-06-29 1981-01-23 Thomson Csf Transistor a effet de champ vertical de puissance pour hautes frequences et procede de realisation d'un tel transistor
US4344081A (en) * 1980-04-14 1982-08-10 Supertex, Inc. Combined DMOS and a vertical bipolar transistor device and fabrication method therefor
US4345265A (en) * 1980-04-14 1982-08-17 Supertex, Inc. MOS Power transistor with improved high-voltage capability
JPS5726467A (en) * 1980-07-24 1982-02-12 Fujitsu Ltd Manufacture of semiconductor device
US4593302B1 (en) * 1980-08-18 1998-02-03 Int Rectifier Corp Process for manufacture of high power mosfet laterally distributed high carrier density beneath the gate oxide

Also Published As

Publication number Publication date
MX153211A (es) 1986-08-22
EP0097866B1 (de) 1990-05-23
US4443931A (en) 1984-04-24
IE831223L (en) 1983-12-28
EP0097866A2 (de) 1984-01-11
IE56041B1 (en) 1991-03-27
EP0097866A3 (en) 1986-10-08
JPS5917283A (ja) 1984-01-28

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8128 New person/name/address of the agent

Representative=s name: SIEB, R., DIPL.-CHEM. DR.RER.NAT., PAT.-ANW., 6947

8339 Ceased/non-payment of the annual fee