DE3202608C2 - - Google Patents
Info
- Publication number
- DE3202608C2 DE3202608C2 DE3202608A DE3202608A DE3202608C2 DE 3202608 C2 DE3202608 C2 DE 3202608C2 DE 3202608 A DE3202608 A DE 3202608A DE 3202608 A DE3202608 A DE 3202608A DE 3202608 C2 DE3202608 C2 DE 3202608C2
- Authority
- DE
- Germany
- Prior art keywords
- layer
- opening
- insulating layer
- doped
- semiconductor substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H10P76/4085—
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
- H01L21/2251—Diffusion into or out of group IV semiconductors
- H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
- H01L21/2257—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer being silicon or silicide or SIPOS, e.g. polysilicon, porous silicon
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D8/00—Diodes
- H10D8/60—Schottky-barrier diodes
-
- H10P32/1414—
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- H10P32/171—
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56012769A JPS57128078A (en) | 1981-01-30 | 1981-01-30 | Manufacture of schottky barrier diode |
| JP56012768A JPS57128077A (en) | 1981-01-30 | 1981-01-30 | Semiconductor device and manufacture thereof |
| JP56012742A JPS57128076A (en) | 1981-01-30 | 1981-01-30 | Manufacture of schottky barrier diode |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE3202608A1 DE3202608A1 (de) | 1982-08-12 |
| DE3202608C2 true DE3202608C2 (OSRAM) | 1988-12-29 |
Family
ID=27279971
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE19823202608 Granted DE3202608A1 (de) | 1981-01-30 | 1982-01-27 | Verfahren zur herstellung einer schottky-sperrschichtdiode und danach hergestellte sperrschichtdiode |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US4414737A (OSRAM) |
| DE (1) | DE3202608A1 (OSRAM) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19616605A1 (de) * | 1996-04-25 | 1997-10-30 | Siemens Ag | Schottkydiodenanordnung und Verfahren zur Herstellung |
Families Citing this family (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4691435A (en) * | 1981-05-13 | 1987-09-08 | International Business Machines Corporation | Method for making Schottky diode having limited area self-aligned guard ring |
| JPS5950567A (ja) * | 1982-09-16 | 1984-03-23 | Hitachi Ltd | 電界効果トランジスタの製造方法 |
| US4589196A (en) * | 1984-10-11 | 1986-05-20 | Texas Instruments Incorporated | Contacts for VLSI devices using direct-reacted silicide |
| US4632713A (en) * | 1985-07-31 | 1986-12-30 | Texas Instruments Incorporated | Process of making Schottky barrier devices formed by diffusion before contacting |
| JPS6362272A (ja) * | 1986-09-02 | 1988-03-18 | Seiko Instr & Electronics Ltd | 半導体装置の製造方法 |
| US4939154A (en) * | 1987-03-25 | 1990-07-03 | Seiko Instruments Inc. | Method of fabricating an insulated gate semiconductor device having a self-aligned gate |
| JPH01151268A (ja) * | 1987-12-08 | 1989-06-14 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
| JPH0244413A (ja) * | 1988-08-05 | 1990-02-14 | Nec Corp | 定電流供給回路 |
| US5208471A (en) * | 1989-06-12 | 1993-05-04 | Hitachi, Ltd. | Semiconductor device and manufacturing method therefor |
| EP0438700A1 (de) * | 1990-01-25 | 1991-07-31 | Asea Brown Boveri Ag | Abschaltbares, MOS-gesteuertes Leistungshalbleiter-Bauelement sowie Verfahren zu dessen Herstellung |
| US5196357A (en) * | 1991-11-18 | 1993-03-23 | Vlsi Technology, Inc. | Method of making extended polysilicon self-aligned gate overlapped lightly doped drain structure for submicron transistor |
| US5270256A (en) * | 1991-11-27 | 1993-12-14 | Intel Corporation | Method of forming a guard wall to reduce delamination effects |
| US5696025A (en) * | 1996-02-02 | 1997-12-09 | Micron Technology, Inc. | Method of forming guard ringed schottky diode |
| US6750091B1 (en) * | 1996-03-01 | 2004-06-15 | Micron Technology | Diode formation method |
| US5859450A (en) * | 1997-09-30 | 1999-01-12 | Intel Corporation | Dark current reducing guard ring |
| EP1145298A3 (de) * | 1998-05-26 | 2002-11-20 | Infineon Technologies AG | Verfahren zur herstellung von schottky-dioden |
| WO1999062124A1 (de) * | 1998-05-26 | 1999-12-02 | Siemens Aktiengesellschaft | Verfahren zur herstellung von schottky-dioden |
| DE59914804D1 (de) * | 1998-05-26 | 2008-08-21 | Infineon Technologies Ag | Verfahren zur herstellung von schottky-dioden |
| DE10330838B4 (de) * | 2003-07-08 | 2005-08-25 | Infineon Technologies Ag | Elektronisches Bauelement mit Schutzring |
| US8901699B2 (en) | 2005-05-11 | 2014-12-02 | Cree, Inc. | Silicon carbide junction barrier Schottky diodes with suppressed minority carrier injection |
| US8435873B2 (en) | 2006-06-08 | 2013-05-07 | Texas Instruments Incorporated | Unguarded Schottky barrier diodes with dielectric underetch at silicide interface |
| US8008575B2 (en) * | 2006-07-24 | 2011-08-30 | Sunpower Corporation | Solar cell with reduced base diffusion area |
| US8519478B2 (en) | 2011-02-02 | 2013-08-27 | International Business Machines Corporation | Schottky barrier diode, a method of forming the diode and a design structure for the diode |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4932028B1 (OSRAM) * | 1969-06-24 | 1974-08-27 | ||
| US3764413A (en) * | 1970-11-25 | 1973-10-09 | Nippon Electric Co | Method of producing insulated gate field effect transistors |
| US3676230A (en) * | 1971-02-16 | 1972-07-11 | Trw Inc | Method for fabricating semiconductor junctions |
| US3907617A (en) * | 1971-10-22 | 1975-09-23 | Motorola Inc | Manufacture of a high voltage Schottky barrier device |
| JPS4859781A (OSRAM) * | 1971-11-25 | 1973-08-22 | ||
| US3820235A (en) * | 1973-05-21 | 1974-06-28 | Philco Ford Corp | Guard ring structure for microwave schottky diode |
| FR2360993A1 (fr) * | 1976-08-03 | 1978-03-03 | Lignes Telegraph Telephon | Perfectionnement aux procedes de fabrication de diodes schottky a barriere or-silicium |
| US4209350A (en) * | 1978-11-03 | 1980-06-24 | International Business Machines Corporation | Method for forming diffusions having narrow dimensions utilizing reactive ion etching |
| US4261095A (en) * | 1978-12-11 | 1981-04-14 | International Business Machines Corporation | Self aligned schottky guard ring |
| US4358891A (en) * | 1979-06-22 | 1982-11-16 | Burroughs Corporation | Method of forming a metal semiconductor field effect transistor |
| US4356040A (en) * | 1980-05-02 | 1982-10-26 | Texas Instruments Incorporated | Semiconductor device having improved interlevel conductor insulation |
-
1982
- 1982-01-21 US US06/341,588 patent/US4414737A/en not_active Expired - Lifetime
- 1982-01-27 DE DE19823202608 patent/DE3202608A1/de active Granted
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19616605A1 (de) * | 1996-04-25 | 1997-10-30 | Siemens Ag | Schottkydiodenanordnung und Verfahren zur Herstellung |
| DE19616605C2 (de) * | 1996-04-25 | 1998-03-26 | Siemens Ag | Schottkydiodenanordnung und Verfahren zur Herstellung |
| US5907179A (en) * | 1996-04-25 | 1999-05-25 | Siemens Aktiengesellschaft | Schottky diode assembly and production method |
Also Published As
| Publication number | Publication date |
|---|---|
| US4414737A (en) | 1983-11-15 |
| DE3202608A1 (de) | 1982-08-12 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| OP8 | Request for examination as to paragraph 44 patent law | ||
| 8128 | New person/name/address of the agent |
Representative=s name: HENKEL, G., DR.PHIL. FEILER, L., DR.RER.NAT. HAENZ |
|
| 8127 | New person/name/address of the applicant |
Owner name: KABUSHIKI KAISHA TOSHIBA, KAWASAKI, KANAGAWA, JP |
|
| D2 | Grant after examination | ||
| 8364 | No opposition during term of opposition | ||
| 8339 | Ceased/non-payment of the annual fee |