DE2617293C3 - Verfahren zur Herstellung eines Halbleiterbauelements - Google Patents

Verfahren zur Herstellung eines Halbleiterbauelements

Info

Publication number
DE2617293C3
DE2617293C3 DE2617293A DE2617293A DE2617293C3 DE 2617293 C3 DE2617293 C3 DE 2617293C3 DE 2617293 A DE2617293 A DE 2617293A DE 2617293 A DE2617293 A DE 2617293A DE 2617293 C3 DE2617293 C3 DE 2617293C3
Authority
DE
Germany
Prior art keywords
layer
base
opening
emitter
doping layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2617293A
Other languages
German (de)
English (en)
Other versions
DE2617293A1 (de
DE2617293B2 (de
Inventor
Pravin Chandra Winchester Mass. Parekh (V.St.A.)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Northrop Grumman Space and Mission Systems Corp
Original Assignee
TRW Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TRW Inc filed Critical TRW Inc
Publication of DE2617293A1 publication Critical patent/DE2617293A1/de
Publication of DE2617293B2 publication Critical patent/DE2617293B2/de
Application granted granted Critical
Publication of DE2617293C3 publication Critical patent/DE2617293C3/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/40—Encapsulations, e.g. protective coatings characterised by their materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/66—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
    • H10P14/662—Laminate layers, e.g. stacks of alternating high-k metal oxides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/68—Organic materials, e.g. photoresists
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/69215—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/6922—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/694—Inorganic materials composed of nitrides
    • H10P14/6943—Inorganic materials composed of nitrides containing silicon
    • H10P14/69433—Inorganic materials composed of nitrides containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/14—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/17—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material
    • H10P32/171—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material being group IV material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass

Landscapes

  • Bipolar Transistors (AREA)
DE2617293A 1975-04-21 1976-04-21 Verfahren zur Herstellung eines Halbleiterbauelements Expired DE2617293C3 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/570,036 US4006046A (en) 1975-04-21 1975-04-21 Method for compensating for emitter-push effect in the fabrication of transistors

Publications (3)

Publication Number Publication Date
DE2617293A1 DE2617293A1 (de) 1976-11-04
DE2617293B2 DE2617293B2 (de) 1978-07-13
DE2617293C3 true DE2617293C3 (de) 1979-03-15

Family

ID=24277930

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2617293A Expired DE2617293C3 (de) 1975-04-21 1976-04-21 Verfahren zur Herstellung eines Halbleiterbauelements

Country Status (5)

Country Link
US (1) US4006046A (Direct)
DE (1) DE2617293C3 (Direct)
FR (1) FR2309038A1 (Direct)
GB (1) GB1549453A (Direct)
NL (1) NL7603939A (Direct)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4102715A (en) * 1975-12-19 1978-07-25 Matsushita Electric Industrial Co., Ltd. Method for diffusing an impurity into a semiconductor body
JPS53132275A (en) * 1977-04-25 1978-11-17 Nippon Telegr & Teleph Corp <Ntt> Semiconductor device and its production
JPS543479A (en) * 1977-06-09 1979-01-11 Toshiba Corp Semiconductor device and its manufacture
US4225874A (en) * 1978-03-09 1980-09-30 Rca Corporation Semiconductor device having integrated diode
US4157269A (en) * 1978-06-06 1979-06-05 International Business Machines Corporation Utilizing polysilicon diffusion sources and special masking techniques
US4868624A (en) * 1980-05-09 1989-09-19 Regents Of The University Of Minnesota Channel collector transistor
US4263066A (en) * 1980-06-09 1981-04-21 Varian Associates, Inc. Process for concurrent formation of base diffusion and p+ profile from single source predeposition
JPS57194572A (en) * 1981-05-27 1982-11-30 Clarion Co Ltd Semiconductor device and manufacture thereof
JPH01123417A (ja) * 1987-11-07 1989-05-16 Mitsubishi Electric Corp 半導体装置の製造方法
US4978636A (en) * 1989-12-26 1990-12-18 Motorola Inc. Method of making a semiconductor diode
US5126281A (en) * 1990-09-11 1992-06-30 Hewlett-Packard Company Diffusion using a solid state source
US5374566A (en) * 1993-01-27 1994-12-20 National Semiconductor Corporation Method of fabricating a BiCMOS structure
US5541121A (en) * 1995-01-30 1996-07-30 Texas Instruments Incorporated Reduced resistance base contact method for single polysilicon bipolar transistors using extrinsic base diffusion from a diffusion source dielectric layer
JP2002511195A (ja) * 1998-02-09 2002-04-09 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ バイポーラトランジスタを具える半導体デバイス及び該デバイスの製造方法
TWI501292B (zh) 2012-09-26 2015-09-21 財團法人工業技術研究院 形成圖案化摻雜區的方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3575742A (en) * 1964-11-09 1971-04-20 Solitron Devices Method of making a semiconductor device
CH482795A (de) * 1966-09-06 1969-12-15 Ciba Geigy Verfahren zur Herstellung neuer Monoazofarbstoffpigmente
US3615938A (en) * 1969-01-28 1971-10-26 Westinghouse Electric Corp Method for diffusion of acceptor impurities into semiconductors
JPS495668B1 (Direct) * 1970-04-03 1974-02-08
JPS4926747B1 (Direct) * 1970-10-09 1974-07-11
US3719535A (en) * 1970-12-21 1973-03-06 Motorola Inc Hyperfine geometry devices and method for their fabrication
US3808060A (en) * 1972-07-05 1974-04-30 Motorola Inc Method of doping semiconductor substrates
US3839104A (en) * 1972-08-31 1974-10-01 Texas Instruments Inc Fabrication technique for high performance semiconductor devices
US3915767A (en) * 1973-02-05 1975-10-28 Honeywell Inc Rapidly responsive transistor with narrowed base

Also Published As

Publication number Publication date
DE2617293A1 (de) 1976-11-04
GB1549453A (en) 1979-08-08
DE2617293B2 (de) 1978-07-13
FR2309038B1 (Direct) 1982-04-23
NL7603939A (nl) 1976-10-25
FR2309038A1 (fr) 1976-11-19
US4006046A (en) 1977-02-01

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Legal Events

Date Code Title Description
C3 Grant after two publication steps (3rd publication)
EI Miscellaneous see part 3
8339 Ceased/non-payment of the annual fee