DE19651566B4 - Chip-Modul sowie Verfahren zu dessen Herstellung und eine Chip-Karte - Google Patents

Chip-Modul sowie Verfahren zu dessen Herstellung und eine Chip-Karte Download PDF

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Publication number
DE19651566B4
DE19651566B4 DE19651566A DE19651566A DE19651566B4 DE 19651566 B4 DE19651566 B4 DE 19651566B4 DE 19651566 A DE19651566 A DE 19651566A DE 19651566 A DE19651566 A DE 19651566A DE 19651566 B4 DE19651566 B4 DE 19651566B4
Authority
DE
Germany
Prior art keywords
chip
substrate
chips
contact
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE19651566A
Other languages
German (de)
English (en)
Other versions
DE19651566A1 (de
Inventor
David Finn
Manfred Rietzler
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Smartrac IP BV
Original Assignee
Assa Abloy Identification Tech
Assa Abloy Identification Technology Group AB
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to DE19651566A priority Critical patent/DE19651566B4/de
Application filed by Assa Abloy Identification Tech, Assa Abloy Identification Technology Group AB filed Critical Assa Abloy Identification Tech
Priority to EP97951116A priority patent/EP0944922B1/de
Priority to JP52609198A priority patent/JP4340720B2/ja
Priority to AT97951116T priority patent/ATE274238T1/de
Priority to US09/319,393 priority patent/US6288443B1/en
Priority to CNB971805954A priority patent/CN1155086C/zh
Priority to PCT/DE1997/002885 priority patent/WO1998026453A1/de
Priority to DE59711861T priority patent/DE59711861D1/de
Priority to CA002274785A priority patent/CA2274785C/en
Priority to KR1019997005201A priority patent/KR100340473B1/ko
Priority to AU54775/98A priority patent/AU739164B2/en
Publication of DE19651566A1 publication Critical patent/DE19651566A1/de
Application granted granted Critical
Publication of DE19651566B4 publication Critical patent/DE19651566B4/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/0711—Apparatus therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07221—Aligning
    • H10W72/07227—Aligning involving guiding structures, e.g. spacers or supporting members
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07236—Soldering or alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07331—Connecting techniques
    • H10W72/07337—Connecting techniques using a polymer adhesive, e.g. an adhesive based on silicone or epoxy
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/351—Materials of die-attach connectors
    • H10W72/353—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics
    • H10W72/354—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics comprising polymers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Credit Cards Or The Like (AREA)
  • Wire Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Die Bonding (AREA)
DE19651566A 1996-12-11 1996-12-11 Chip-Modul sowie Verfahren zu dessen Herstellung und eine Chip-Karte Expired - Lifetime DE19651566B4 (de)

Priority Applications (11)

Application Number Priority Date Filing Date Title
DE19651566A DE19651566B4 (de) 1996-12-11 1996-12-11 Chip-Modul sowie Verfahren zu dessen Herstellung und eine Chip-Karte
CA002274785A CA2274785C (en) 1996-12-11 1997-12-11 A chip module and process for the production thereof
AT97951116T ATE274238T1 (de) 1996-12-11 1997-12-11 Verfahren zur herstellung eines chip-moduls
US09/319,393 US6288443B1 (en) 1996-12-11 1997-12-11 Chip module and manufacture of same
CNB971805954A CN1155086C (zh) 1996-12-11 1997-12-11 芯片组件及其生产方法
PCT/DE1997/002885 WO1998026453A1 (de) 1996-12-11 1997-12-11 Chip-modul sowie verfahren zu dessen herstellung
EP97951116A EP0944922B1 (de) 1996-12-11 1997-12-11 Verfahren zur Herstellung eines Chip-Moduls
JP52609198A JP4340720B2 (ja) 1996-12-11 1997-12-11 チップモジュール及びその生産方法
KR1019997005201A KR100340473B1 (ko) 1996-12-11 1997-12-11 칩 모듈 및 그 제조방법
AU54775/98A AU739164B2 (en) 1996-12-11 1997-12-11 A chip module and process for the production thereof
DE59711861T DE59711861D1 (de) 1996-12-11 1997-12-11 Verfahren zur Herstellung eines Chip-Moduls

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19651566A DE19651566B4 (de) 1996-12-11 1996-12-11 Chip-Modul sowie Verfahren zu dessen Herstellung und eine Chip-Karte

Publications (2)

Publication Number Publication Date
DE19651566A1 DE19651566A1 (de) 1998-06-18
DE19651566B4 true DE19651566B4 (de) 2006-09-07

Family

ID=7814405

Family Applications (2)

Application Number Title Priority Date Filing Date
DE19651566A Expired - Lifetime DE19651566B4 (de) 1996-12-11 1996-12-11 Chip-Modul sowie Verfahren zu dessen Herstellung und eine Chip-Karte
DE59711861T Expired - Lifetime DE59711861D1 (de) 1996-12-11 1997-12-11 Verfahren zur Herstellung eines Chip-Moduls

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE59711861T Expired - Lifetime DE59711861D1 (de) 1996-12-11 1997-12-11 Verfahren zur Herstellung eines Chip-Moduls

Country Status (10)

Country Link
US (1) US6288443B1 (https=)
EP (1) EP0944922B1 (https=)
JP (1) JP4340720B2 (https=)
KR (1) KR100340473B1 (https=)
CN (1) CN1155086C (https=)
AT (1) ATE274238T1 (https=)
AU (1) AU739164B2 (https=)
CA (1) CA2274785C (https=)
DE (2) DE19651566B4 (https=)
WO (1) WO1998026453A1 (https=)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008071697A2 (de) 2006-12-15 2008-06-19 Bundesdruckerei Gmbh Personaldokument und verfahren zu seiner herstellung
US7971339B2 (en) 2006-09-26 2011-07-05 Hid Global Gmbh Method and apparatus for making a radio frequency inlay
US8286332B2 (en) 2006-09-26 2012-10-16 Hid Global Gmbh Method and apparatus for making a radio frequency inlay
US8413316B2 (en) 2007-09-18 2013-04-09 Hid Global Ireland Teoranta Method for bonding a wire conductor laid on a substrate
US8608080B2 (en) 2006-09-26 2013-12-17 Feinics Amatech Teoranta Inlays for security documents

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19920593B4 (de) * 1999-05-05 2006-07-13 Assa Abloy Identification Technology Group Ab Chipträger für ein Chipmodul und Verfahren zur Herstellung des Chipmoduls
DE19948555A1 (de) * 1999-12-03 2001-05-03 Andreas Plettner Verfahren zur Herstellung kontaktloser Chipkarten sowie zur Herstellung von elektrischen Einheiten, bestehend aus Chips mit Kontaktelementen
DE19958328A1 (de) 1999-10-08 2001-07-12 Flexchip Ag Verfahren zum Herstellen einer elektrischen Verbindung zwischen Chip-Kontaktelemente-Einheiten und externen Kontaktanschlüssen
JP4299414B2 (ja) * 1999-10-12 2009-07-22 富士通マイクロエレクトロニクス株式会社 コンビネーションカード、ｉｃカード用モジュール及びコンビネーションカードの製造方法
US6582281B2 (en) 2000-03-23 2003-06-24 Micron Technology, Inc. Semiconductor processing methods of removing conductive material
DE10014620A1 (de) * 2000-03-24 2001-09-27 Andreas Plettner Verfahren zur Herstellung eines Trägerbandes mit einer Vielzahl von elektrischen Einheiten, jeweils aufweisend einen Chip und Kontaktelemente
DE10119232C1 (de) * 2001-04-19 2002-12-05 Siemens Production & Logistics Einrichtung zum Kennzeichnen von mit einer Mehrzahl zu bestückender elektrischer Bauelemente versehenen Bauelemententrägern und Verfahren zur Verwendung der Einrichtung
JP2007503634A (ja) * 2003-08-26 2007-02-22 ミュールバウアー アーゲー スマートラベル用のモジュールブリッジ
TWI259564B (en) 2003-10-15 2006-08-01 Infineon Technologies Ag Wafer level packages for chips with sawn edge protection
AU2005304141B2 (en) * 2004-11-02 2010-08-26 Hid Global Gmbh Laying device, contacting device, advancing system, laying and contacting unit, production system, method for the production and a transponder unit
DE102004053292A1 (de) * 2004-11-04 2006-05-11 Giesecke & Devrient Gmbh Kartenförmiger Datenträger
US8322624B2 (en) 2007-04-10 2012-12-04 Feinics Amatech Teoranta Smart card with switchable matching antenna
US7546671B2 (en) 2006-09-26 2009-06-16 Micromechanic And Automation Technology Ltd. Method of forming an inlay substrate having an antenna wire
US20080179404A1 (en) * 2006-09-26 2008-07-31 Advanced Microelectronic And Automation Technology Ltd. Methods and apparatuses to produce inlays with transponders
US7581308B2 (en) 2007-01-01 2009-09-01 Advanced Microelectronic And Automation Technology Ltd. Methods of connecting an antenna to a transponder chip
US7979975B2 (en) 2007-04-10 2011-07-19 Feinics Amatech Teavanta Methods of connecting an antenna to a transponder chip
US8240022B2 (en) * 2006-09-26 2012-08-14 Feinics Amatech Teorowita Methods of connecting an antenna to a transponder chip
US7980477B2 (en) 2007-05-17 2011-07-19 Féinics Amatech Teoranta Dual interface inlays
EP2001077A1 (fr) * 2007-05-21 2008-12-10 Gemplus Procédé de réalisation d'un dispositif comportant une antenne de transpondeur connectée à des plages de contact et dispositif obtenu
DE102010041917B4 (de) * 2010-10-04 2014-01-23 Smartrac Ip B.V. Schaltungsanordnung und Verfahren zu deren Herstellung
KR101131782B1 (ko) 2011-07-19 2012-03-30 디지털옵틱스 코포레이션 이스트 집적 모듈용 기판
DE102012103430B4 (de) 2012-04-19 2015-10-22 Ev Group E. Thallner Gmbh Verfahren zum Heften von Chips auf ein Substrat
WO2014121300A2 (en) * 2013-02-04 2014-08-07 American Semiconductor, Inc. Photonic data transfer assembly
DE102015215232B4 (de) 2015-08-10 2023-01-19 Thyssenkrupp Ag Rundumüberwachungssystem, Schiff ausgestattet mit einem Rundumüberwachungssystem und Verfahren zur Überwachung auf einem Schiff
DE102018121139B3 (de) 2018-08-29 2019-09-26 Vsm Vereinigte Schmirgel- Und Maschinen-Fabriken Ag Endlos-Schleifband für eine Schleifmaschine
DE102019216124A1 (de) * 2019-10-21 2021-04-22 Thyssenkrupp Ag Förderbandanlage mit im Förderband integrierter Datenübertragung
EP4048612B1 (de) 2019-10-21 2023-05-17 FLSmidth A/S Verfahren zur herstellung von 1,6-anhydro-zuckern

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0207853A1 (fr) * 1985-06-26 1987-01-07 Bull S.A. Procédé de montage d'un circuit intégré sur un support, dispositif en résultant et son application à une carte à microcircuits électroniques
JPS63147352A (ja) * 1986-12-11 1988-06-20 Nec Corp 超薄型モジユ−ル
DE3917707A1 (de) * 1989-05-31 1990-12-06 Siemens Ag Elektronisches modul und verfahren zu seiner herstellung
US5155068A (en) * 1989-08-31 1992-10-13 Sharp Kabushiki Kaisha Method for manufacturing an IC module for an IC card whereby an IC device and surrounding encapsulant are thinned by material removal
DE4238137A1 (de) * 1992-11-12 1994-05-19 Ant Nachrichtentech Verfahren zur Herstellung von Vorrichtungen mit Bauelementen

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR0179834B1 (ko) * 1995-07-28 1999-03-20 문정환 컬럼형 패키지

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0207853A1 (fr) * 1985-06-26 1987-01-07 Bull S.A. Procédé de montage d'un circuit intégré sur un support, dispositif en résultant et son application à une carte à microcircuits électroniques
JPS63147352A (ja) * 1986-12-11 1988-06-20 Nec Corp 超薄型モジユ−ル
DE3917707A1 (de) * 1989-05-31 1990-12-06 Siemens Ag Elektronisches modul und verfahren zu seiner herstellung
US5155068A (en) * 1989-08-31 1992-10-13 Sharp Kabushiki Kaisha Method for manufacturing an IC module for an IC card whereby an IC device and surrounding encapsulant are thinned by material removal
DE4238137A1 (de) * 1992-11-12 1994-05-19 Ant Nachrichtentech Verfahren zur Herstellung von Vorrichtungen mit Bauelementen

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7971339B2 (en) 2006-09-26 2011-07-05 Hid Global Gmbh Method and apparatus for making a radio frequency inlay
US8286332B2 (en) 2006-09-26 2012-10-16 Hid Global Gmbh Method and apparatus for making a radio frequency inlay
US8608080B2 (en) 2006-09-26 2013-12-17 Feinics Amatech Teoranta Inlays for security documents
WO2008071697A2 (de) 2006-12-15 2008-06-19 Bundesdruckerei Gmbh Personaldokument und verfahren zu seiner herstellung
US8413316B2 (en) 2007-09-18 2013-04-09 Hid Global Ireland Teoranta Method for bonding a wire conductor laid on a substrate

Also Published As

Publication number Publication date
US6288443B1 (en) 2001-09-11
CA2274785C (en) 2004-05-11
CN1240535A (zh) 2000-01-05
EP0944922B1 (de) 2004-08-18
EP0944922A1 (de) 1999-09-29
KR100340473B1 (ko) 2002-06-12
CN1155086C (zh) 2004-06-23
AU739164B2 (en) 2001-10-04
CA2274785A1 (en) 1998-06-18
KR20000057511A (ko) 2000-09-15
JP4340720B2 (ja) 2009-10-07
AU5477598A (en) 1998-07-03
JP2001517362A (ja) 2001-10-02
ATE274238T1 (de) 2004-09-15
DE19651566A1 (de) 1998-06-18
DE59711861D1 (de) 2004-09-23
WO1998026453A1 (de) 1998-06-18

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8127 New person/name/address of the applicant

Owner name: RIETZLER, MANFRED, 87616 MARKTOBERDORF, DE

Owner name: ASSA ABLOY IDENTIFICATION TECHNOLOGY GROUP AB, STO

8128 New person/name/address of the agent

Representative=s name: GRUENECKER, KINKELDEY, STOCKMAIR & SCHWANHAEUSSER

8181 Inventor (new situation)

Inventor name: FINN, DAVID, 87459 PFRONTEN, DE

Inventor name: RIETZLER, MANFRED, 87616 MARKTOBERDORF, DE

8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: SMARTRAC IP B.V., AMSTERDAM, NL

8328 Change in the person/name/address of the agent

Representative=s name: PATENT- UND RECHTSANWAELTE BOECK - TAPPE - V.D. ST

R071 Expiry of right