DE1639355C3 - Verfahren zur Herstellung einer monolithisch integrierten Halbleiteranordnung - Google Patents
Verfahren zur Herstellung einer monolithisch integrierten HalbleiteranordnungInfo
- Publication number
- DE1639355C3 DE1639355C3 DE1639355A DEN0032077A DE1639355C3 DE 1639355 C3 DE1639355 C3 DE 1639355C3 DE 1639355 A DE1639355 A DE 1639355A DE N0032077 A DEN0032077 A DE N0032077A DE 1639355 C3 DE1639355 C3 DE 1639355C3
- Authority
- DE
- Germany
- Prior art keywords
- transistor
- zone
- diffused
- emitter
- collector
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 title claims description 27
- 238000004519 manufacturing process Methods 0.000 title claims description 8
- 238000009792 diffusion process Methods 0.000 claims description 24
- 238000000034 method Methods 0.000 claims description 19
- 239000002019 doping agent Substances 0.000 claims description 14
- 239000000758 substrate Substances 0.000 claims description 10
- 230000000295 complement effect Effects 0.000 claims description 4
- 238000011282 treatment Methods 0.000 description 10
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 5
- 229910052796 boron Inorganic materials 0.000 description 5
- 238000002955 isolation Methods 0.000 description 5
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 229910052698 phosphorus Inorganic materials 0.000 description 3
- 239000011574 phosphorus Substances 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 230000000873 masking effect Effects 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000007935 neutral effect Effects 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/761—PN junctions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
- H10D84/0114—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including vertical BJTs and lateral BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/63—Combinations of vertical and lateral BJTs
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Bipolar Transistors (AREA)
- Bipolar Integrated Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR93983A FR1520514A (fr) | 1967-02-07 | 1967-02-07 | Procédé de fabrication de circuits intégrés comportant des transistors de types opposés |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| DE1639355A1 DE1639355A1 (de) | 1971-04-01 |
| DE1639355B2 DE1639355B2 (de) | 1978-05-03 |
| DE1639355C3 true DE1639355C3 (de) | 1979-01-04 |
Family
ID=8624921
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE1639355A Expired DE1639355C3 (de) | 1967-02-07 | 1968-02-06 | Verfahren zur Herstellung einer monolithisch integrierten Halbleiteranordnung |
Country Status (9)
| Country | Link |
|---|---|
| US (1) | US3576682A (en:Method) |
| AT (1) | AT307501B (en:Method) |
| BE (1) | BE710353A (en:Method) |
| CH (1) | CH483126A (en:Method) |
| DE (1) | DE1639355C3 (en:Method) |
| FR (1) | FR1520514A (en:Method) |
| GB (1) | GB1210981A (en:Method) |
| NL (1) | NL161618C (en:Method) |
| SE (1) | SE325962B (en:Method) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| NL162511C (nl) * | 1969-01-11 | 1980-05-16 | Philips Nv | Geintegreerde halfgeleiderschakeling met een laterale transistor en werkwijze voor het vervaardigen van de geintegreerde halfgeleiderschakeling. |
| JPS509635B1 (en:Method) * | 1970-09-07 | 1975-04-14 |
-
1967
- 1967-02-07 FR FR93983A patent/FR1520514A/fr not_active Expired
-
1968
- 1968-02-03 NL NL6801583.A patent/NL161618C/xx not_active IP Right Cessation
- 1968-02-05 US US703024A patent/US3576682A/en not_active Expired - Lifetime
- 1968-02-05 GB GB5652/68A patent/GB1210981A/en not_active Expired
- 1968-02-05 CH CH165768A patent/CH483126A/de not_active IP Right Cessation
- 1968-02-05 BE BE710353D patent/BE710353A/xx unknown
- 1968-02-05 SE SE01482/68A patent/SE325962B/xx unknown
- 1968-02-06 AT AT111768A patent/AT307501B/de not_active IP Right Cessation
- 1968-02-06 DE DE1639355A patent/DE1639355C3/de not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| NL6801583A (en:Method) | 1968-08-08 |
| AT307501B (de) | 1973-05-25 |
| DE1639355B2 (de) | 1978-05-03 |
| NL161618C (nl) | 1980-02-15 |
| FR1520514A (fr) | 1968-04-12 |
| GB1210981A (en) | 1970-11-04 |
| BE710353A (en:Method) | 1968-08-05 |
| SE325962B (en:Method) | 1970-07-13 |
| CH483126A (de) | 1969-12-15 |
| US3576682A (en) | 1971-04-27 |
| DE1639355A1 (de) | 1971-04-01 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C3 | Grant after two publication steps (3rd publication) | ||
| 8339 | Ceased/non-payment of the annual fee |