DE11791014T1 - Verfahren zur behandlung eines substrats und substrat - Google Patents

Verfahren zur behandlung eines substrats und substrat Download PDF

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DE11791014T1
DE11791014T1 DE11791014.1T DE11791014T DE11791014T1 DE 11791014 T1 DE11791014 T1 DE 11791014T1 DE 11791014 T DE11791014 T DE 11791014T DE 11791014 T1 DE11791014 T1 DE 11791014T1
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substrate
iii
base material
purified
sno
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Jouko Lang
Marko Punkkinen
Marjukka Tuominen
Veikko Tuominen
Johnny Dahl
Juhani Väyrynen
Pekka Laukkanen
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Comptek Solutions Oy
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    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
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    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
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    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
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    • H01L21/31654—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself
    • H01L21/31658—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself by thermal oxidation, e.g. of SiGe
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    • H01L29/1025—Channel region of field-effect devices
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    • H01L29/1054—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a variation of the composition, e.g. channel with strained layer for increasing the mobility
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    • H01L29/205—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys in different semiconductor regions, e.g. heterojunctions
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    • H01L21/02107—Forming insulating materials on a substrate
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    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02178—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing aluminium, e.g. Al2O3

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  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
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  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)
  • Junction Field-Effect Transistors (AREA)
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Abstract

Verfahren zur Herstellung einer kristallinen Oxidschicht auf einem Inhaltigen III-As-, III-Sb- oder III-P-Verbindungshalbleitersubstrat, dadurch gekennzeichnet, dass unter Vakuumbedingungen – eine Oberfläche eines In-haltigen III-As-, III-Sb- oder III-P-Substrats von amorphen nativen Oxiden gereinigt wird, – das gereinigte In-haltige III-As- oder III-Sb-Substrat auf eine Temperatur von etwa 250 bis 550°C erwärmt wird oder das gereinigte In-haltige III-P-Substrat auf eine Temperatur von etwa 450 bis 550°C erwärmt wird und – das Substrat 15 bis 45 Minuten lang oxidiert wird, indem Sauerstoffgas auf die Oberfläche des Substrats geleitet wird, wobei der Sauerstoffgasdruck zwischen 5·10–7 und 5·10–5 mbar beträgt.

Claims (15)

  1. Verfahren zur Herstellung einer kristallinen Oxidschicht auf einem Inhaltigen III-As-, III-Sb- oder III-P-Verbindungshalbleitersubstrat, dadurch gekennzeichnet, dass unter Vakuumbedingungen – eine Oberfläche eines In-haltigen III-As-, III-Sb- oder III-P-Substrats von amorphen nativen Oxiden gereinigt wird, – das gereinigte In-haltige III-As- oder III-Sb-Substrat auf eine Temperatur von etwa 250 bis 550°C erwärmt wird oder das gereinigte In-haltige III-P-Substrat auf eine Temperatur von etwa 450 bis 550°C erwärmt wird und – das Substrat 15 bis 45 Minuten lang oxidiert wird, indem Sauerstoffgas auf die Oberfläche des Substrats geleitet wird, wobei der Sauerstoffgasdruck zwischen 5·10–7 und 5·10–5 mbar beträgt.
  2. Verfahren nach Anspruch 1, dadurch gekennzeichnet, dass das In-haltige III-As-, III-Sb- oder III-P-Substrat aus InAs, InSb, InP, InGaAs oder InGaSb hergestellt ist.
  3. Verfahren nach Anspruch 1 oder 2, dadurch gekennzeichnet, dass das Substrat durch Sputtern mit Argon-Ionen und Nacherwärmen unter Ultrahochvakuum-(UHV)-Bedingungen auf mindestens 400°C oder durch reines Erwärmen unter UHV auf etwa 400 bis 550°C gereinigt wird.
  4. Verfahren nach einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, dass das gereinigte Substrat mit einer Zinnschicht (Sn) bedeckt ist.
  5. Verfahren nach einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, dass das gereinigte In-haltige III-As-Substrat auf eine Temperatur von etwa 340 bis 400°C erwärmt wird.
  6. Verfahren nach Anspruch 1 bis 4, dadurch gekennzeichnet, dass das gereinigte In-haltige III-Sb-Substrat auf eine Temperatur von etwa 340 bis 450°C erwärmt wird.
  7. Verfahren nach einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, dass das Erwärmen und die Oxidation des Substrats gleichzeitig durchgeführt werden.
  8. Verfahren nach einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, dass das Substrat 15 bis 30 Minuten lang oxidiert wird.
  9. Verbindungshalbleitersubstrat, dadurch gekennzeichnet, dass das Substrat wenigstens Folgendes umfasst: – ein In-haltiges III-As-, III-Sb- oder III-P-Basismaterial, welches eine erste Seite und eine zweite Seite aufweist, und – eine kristalline (3×1)-O-, c(4×2)-O-, (1×2)-O-, (2×3)-O-, (3×1)-SnO-, (3×3)-SnO- oder (1×1)-SnO-Oxidschicht, die auf wenigstens einem Teil der ersten Seite des Basismaterials gebildet wird.
  10. Substrat nach Anspruch 9, dadurch gekennzeichnet, dass die Oxidschicht mit dem Verfahren nach Anspruch 1 bis 8 hergestellt wurde.
  11. Substrat nach Anspruch 9 oder 10, dadurch gekennzeichnet, dass die Oxidschicht aufweist: – eine (3×1)-O-Kristallstruktur, wobei es sich bei dem In-haltigen III-As- oder III-Sb-Basismaterial um InAs, InSb, InGaAs oder InGaSb handelt, oder – eine c(4×2)-O-Kristallstruktur, wobei es sich bei dem In-haltigen III-As-Basismaterial um InAs oder InGaAs handelt, oder – eine (1×2)-O-Kristallstruktur, wobei es sich bei dem In-haltigen III-Sb-Basismaterial um InSb oder InGaSb handelt, oder – eine (3×1)-SnO- oder (3×3)-SnO-Kristallstruktur, wobei es sich bei dem Inhaltigen III-As-Basismaterial um InAs oder InGaAs handelt, oder – eine (1×1)-SnO-Kristallstruktur, wobei es sich bei dem In-haltigen III-P-Basismaterial um InP oder InGaP handelt.
  12. Substrat nach Anspruch 9 oder 10, dadurch gekennzeichnet, dass es sich bei dem Basismaterial um InP handelt und die Oxidschicht eine (2×3)-O-Kristallstruktur aufweist.
  13. Substrat nach Anspruch 9 bis 12, dadurch gekennzeichnet, dass es sich bei dem Basismaterial um eine Schicht handelt, die auf die Oberfläche eines Si-Substrats aufgebracht wurde.
  14. Substrat nach Anspruch 9 bis 13, dadurch gekennzeichnet, dass die Dicke der Oxidschicht typischerweise 0,2 bis 1 nm beträgt.
  15. Verwendung des Substrats nach einem der Ansprüche 9 bis 14 in einer Struktur eines Transistors, wie einer Struktur eines MOSFET-Transistors, oder einer Struktur einer optoelektronischen Vorrichtung, wie einer Leuchtdiode, einer Photodiode, einem Photokondensator, einer photovoltaischen Zelle oder einem Laser auf Halbleiterbasis.
DE11791014.1T 2010-11-11 2011-11-08 Verfahren zur behandlung eines substrats und substrat Pending DE11791014T1 (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
FI20106181 2010-11-11
FI20106181A FI20106181A0 (fi) 2010-11-11 2010-11-11 Menetelmä substraatin muodostamiseksi ja substraatti
EP11791014.1A EP2638565B1 (de) 2010-11-11 2011-11-08 Verfahren zur behandlung eines substrats und substrat
PCT/FI2011/050991 WO2012062966A1 (en) 2010-11-11 2011-11-08 A method for treating a substrate and a substrate

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KR (1) KR102013265B1 (de)
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RU (1) RU2576547C2 (de)
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CA2814856C (en) 2019-06-18
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KR102013265B1 (ko) 2019-08-22
CA2814856A1 (en) 2012-05-18
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US20180069074A1 (en) 2018-03-08
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