FI20106181A0 - Menetelmä substraatin muodostamiseksi ja substraatti - Google Patents

Menetelmä substraatin muodostamiseksi ja substraatti

Info

Publication number
FI20106181A0
FI20106181A0 FI20106181A FI20106181A FI20106181A0 FI 20106181 A0 FI20106181 A0 FI 20106181A0 FI 20106181 A FI20106181 A FI 20106181A FI 20106181 A FI20106181 A FI 20106181A FI 20106181 A0 FI20106181 A0 FI 20106181A0
Authority
FI
Finland
Prior art keywords
substrate
formation
substrate formation
Prior art date
Application number
FI20106181A
Other languages
English (en)
Swedish (sv)
Inventor
Pekka Laukkanen
Jouko Laang
Marko Punkkinen
Marjukka Tuominen
Veikko Tuominen
Johnny Dahl
Juhani Vaeyrynen
Original Assignee
Pekka Laukkanen
Jouko Laang
Marko Punkkinen
Marjukka Tuominen
Veikko Tuominen
Johnny Dahl
Juhani Vaeyrynen
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pekka Laukkanen, Jouko Laang, Marko Punkkinen, Marjukka Tuominen, Veikko Tuominen, Johnny Dahl, Juhani Vaeyrynen filed Critical Pekka Laukkanen
Priority to FI20106181A priority Critical patent/FI20106181A0/fi
Publication of FI20106181A0 publication Critical patent/FI20106181A0/fi
Priority to NZ609295A priority patent/NZ609295A/en
Priority to BR112013011597-1A priority patent/BR112013011597B1/pt
Priority to EP11791014.1A priority patent/EP2638565B1/en
Priority to US13/881,420 priority patent/US9269763B2/en
Priority to RU2013126686/28A priority patent/RU2576547C2/ru
Priority to PCT/FI2011/050991 priority patent/WO2012062966A1/en
Priority to JP2013538246A priority patent/JP5917539B2/ja
Priority to CA2814856A priority patent/CA2814856C/en
Priority to AU2011327960A priority patent/AU2011327960B2/en
Priority to KR1020137010469A priority patent/KR102013265B1/ko
Priority to DE11791014.1T priority patent/DE11791014T1/de
Priority to CN201180054221.1A priority patent/CN103201827B/zh
Priority to ZA2013/02723A priority patent/ZA201302723B/en
Priority to US14/854,125 priority patent/US9837486B2/en
Priority to US15/802,425 priority patent/US10256290B2/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
    • H01L21/02046—Dry cleaning only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02241—III-V semiconductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28264—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being a III-V compound
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/3165—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation
    • H01L21/31654—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself
    • H01L21/31658—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself by thermal oxidation, e.g. of SiGe
    • H01L21/31666—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself by thermal oxidation, e.g. of SiGe of AIII BV compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H01L21/3245—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering of AIIIBV compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025—Channel region of field-effect devices
    • H01L29/1029—Channel region of field-effect devices of field-effect transistors
    • H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
    • H01L29/1054—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a variation of the composition, e.g. channel with strained layer for increasing the mobility
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/201—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/201—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys
    • H01L29/205—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys in different semiconductor regions, e.g. heterojunctions
FI20106181A 2010-11-11 2010-11-11 Menetelmä substraatin muodostamiseksi ja substraatti FI20106181A0 (fi)

Priority Applications (16)

Application Number Priority Date Filing Date Title
FI20106181A FI20106181A0 (fi) 2010-11-11 2010-11-11 Menetelmä substraatin muodostamiseksi ja substraatti
CN201180054221.1A CN103201827B (zh) 2010-11-11 2011-11-08 处理衬底的方法和衬底
PCT/FI2011/050991 WO2012062966A1 (en) 2010-11-11 2011-11-08 A method for treating a substrate and a substrate
CA2814856A CA2814856C (en) 2010-11-11 2011-11-08 A method for treating a substrate and a substrate
EP11791014.1A EP2638565B1 (en) 2010-11-11 2011-11-08 A method for treating a substrate and a substrate
US13/881,420 US9269763B2 (en) 2010-11-11 2011-11-08 Method for treating a substrate and a substrate
RU2013126686/28A RU2576547C2 (ru) 2010-11-11 2011-11-08 Способ обработки подложки и подложка
NZ609295A NZ609295A (en) 2010-11-11 2011-11-08 Method for treating semiconductor substrates and a semiconductor substrate
JP2013538246A JP5917539B2 (ja) 2010-11-11 2011-11-08 基板を処理する方法および基板
BR112013011597-1A BR112013011597B1 (pt) 2010-11-11 2011-11-08 método para produzir camada de óxido cristalino em substrato do composto as-iii, sb-iii ou p-iii semicondutor contendo in, substrato e uso do substrato
AU2011327960A AU2011327960B2 (en) 2010-11-11 2011-11-08 A method for treating a substrate and a substrate
KR1020137010469A KR102013265B1 (ko) 2010-11-11 2011-11-08 기판을 처리하는 방법 및 기판
DE11791014.1T DE11791014T1 (de) 2010-11-11 2011-11-08 Verfahren zur behandlung eines substrats und substrat
ZA2013/02723A ZA201302723B (en) 2010-11-11 2013-04-16 A method for treating a substrate and a substrate
US14/854,125 US9837486B2 (en) 2010-11-11 2015-09-15 Method for oxidizing a substrate surface using oxygen
US15/802,425 US10256290B2 (en) 2010-11-11 2017-11-02 Method for oxidizing a substrate surface using oxygen

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FI20106181A FI20106181A0 (fi) 2010-11-11 2010-11-11 Menetelmä substraatin muodostamiseksi ja substraatti

Publications (1)

Publication Number Publication Date
FI20106181A0 true FI20106181A0 (fi) 2010-11-11

Family

ID=43268961

Family Applications (1)

Application Number Title Priority Date Filing Date
FI20106181A FI20106181A0 (fi) 2010-11-11 2010-11-11 Menetelmä substraatin muodostamiseksi ja substraatti

Country Status (13)

Country Link
US (3) US9269763B2 (fi)
EP (1) EP2638565B1 (fi)
JP (1) JP5917539B2 (fi)
KR (1) KR102013265B1 (fi)
AU (1) AU2011327960B2 (fi)
BR (1) BR112013011597B1 (fi)
CA (1) CA2814856C (fi)
DE (1) DE11791014T1 (fi)
FI (1) FI20106181A0 (fi)
NZ (1) NZ609295A (fi)
RU (1) RU2576547C2 (fi)
WO (1) WO2012062966A1 (fi)
ZA (1) ZA201302723B (fi)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9390913B2 (en) * 2013-02-22 2016-07-12 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor dielectric interface and gate stack
US9646823B2 (en) 2013-02-22 2017-05-09 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor dielectric interface and gate stack
FI127415B (fi) 2015-04-16 2018-05-31 Turun Yliopisto Vieraan oksidin valmistus puolijohteeseen
US10475930B2 (en) * 2016-08-17 2019-11-12 Samsung Electronics Co., Ltd. Method of forming crystalline oxides on III-V materials
GB2565054A (en) 2017-07-28 2019-02-06 Comptek Solutions Oy Heterostructure semiconductor device and manufacturing method
GB2565056A (en) * 2017-07-28 2019-02-06 Comptek Solutions Oy Semiconductor device and method of manufacture
GB2565055A (en) 2017-07-28 2019-02-06 Comptek Solutions Oy Semiconductor device and manufacturing method

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JPS5811370B2 (ja) * 1977-03-14 1983-03-02 箕村 茂 金属間化合物の金属的変態物質とその製造法
US4226667A (en) * 1978-10-31 1980-10-07 Bell Telephone Laboratories, Incorporated Oxide masking of gallium arsenide
EP0426877B1 (en) 1989-05-31 1995-08-23 Japan Energy Corporation Method of producing compound semiconductor devices
JP2750330B2 (ja) 1991-12-17 1998-05-13 株式会社ジャパンエナジー 化合物半導体装置の製造方法
JPH06104189A (ja) 1992-09-17 1994-04-15 Nippon Telegr & Teleph Corp <Ntt> Ｉｉｉ−ｖ族化合物半導体薄膜選択成長用半導体基板及びその形成法、及びｉｉｉ−ｖ族化合物半導体薄膜形成法
JP3137767B2 (ja) * 1992-10-20 2001-02-26 富士通株式会社 半導体装置の製造方法
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US5762706A (en) * 1993-11-09 1998-06-09 Fujitsu Limited Method of forming compound semiconductor device
US6271069B1 (en) * 1994-03-23 2001-08-07 Agere Systems Guardian Corp. Method of making an article comprising an oxide layer on a GaAs-based semiconductor body
US5550089A (en) * 1994-03-23 1996-08-27 Lucent Technologies Inc. Gallium oxide coatings for optoelectronic devices using electron beam evaporation of a high purity single crystal Gd3 Ga5 O12 source.
JP2699928B2 (ja) * 1995-05-30 1998-01-19 日本電気株式会社 化合物半導体基板の前処理方法
JPH09162201A (ja) 1995-12-11 1997-06-20 Matsushita Electric Ind Co Ltd 半導体装置の製造方法および製造装置
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Also Published As

Publication number Publication date
EP2638565B1 (en) 2018-05-16
JP2014502042A (ja) 2014-01-23
CN103201827A (zh) 2013-07-10
US20160049295A1 (en) 2016-02-18
NZ609295A (en) 2015-07-31
US20130214331A1 (en) 2013-08-22
US9269763B2 (en) 2016-02-23
US20180069074A1 (en) 2018-03-08
US9837486B2 (en) 2017-12-05
EP2638565A1 (en) 2013-09-18
BR112013011597A2 (pt) 2016-08-09
AU2011327960B2 (en) 2015-02-26
RU2013126686A (ru) 2014-12-20
WO2012062966A1 (en) 2012-05-18
DE11791014T1 (de) 2017-12-14
CA2814856C (en) 2019-06-18
JP5917539B2 (ja) 2016-05-18
AU2011327960A1 (en) 2013-05-02
ZA201302723B (en) 2014-06-25
KR20130124493A (ko) 2013-11-14
BR112013011597B1 (pt) 2020-10-13
RU2576547C2 (ru) 2016-03-10
US10256290B2 (en) 2019-04-09
CA2814856A1 (en) 2012-05-18
KR102013265B1 (ko) 2019-08-22

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