DE102015017291B4 - Verfahren zum Herstellen eines Siliziumkarbidbauelements mit einem abgeschirmten Gate - Google Patents

Verfahren zum Herstellen eines Siliziumkarbidbauelements mit einem abgeschirmten Gate

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Publication number
DE102015017291B4
DE102015017291B4 DE102015017291.3A DE102015017291A DE102015017291B4 DE 102015017291 B4 DE102015017291 B4 DE 102015017291B4 DE 102015017291 A DE102015017291 A DE 102015017291A DE 102015017291 B4 DE102015017291 B4 DE 102015017291B4
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Prior art keywords
gate
silicon carbide
semiconductor substrate
carbide semiconductor
oxide layer
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Application number
DE102015017291.3A
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German (de)
English (en)
Inventor
Romain Esteve
Thomas Aichinger
Wolfgang Bergner
Daniel Kueck
Dethard Peters
Ralf Siemieniec
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Infineon Technologies AG
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Infineon Technologies AG
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/109—Reduced surface field [RESURF] PN junction structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01—Manufacture or treatment
    • H10D12/031—Manufacture or treatment of IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
    • H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
    • H10D30/0297—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs using recessing of the gate electrodes, e.g. to form trench gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
    • H10D30/668—Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/106—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]  having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
    • H10D62/107—Buried supplementary regions, e.g. buried guard rings 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/393—Body regions of DMOS transistors or IGBTs 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325—Silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01366—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the semiconductor being silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/512—Disposition of the gate electrodes, e.g. buried gates
    • H10D64/513—Disposition of the gate electrodes, e.g. buried gates within recesses in the substrate, e.g. trench gates, groove gates or buried gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/514—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302—Non-deposition formation processes
    • H10P14/6304—Formation by oxidation, e.g. oxidation of the substrate
    • H10P14/6306—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials
    • H10P14/6308—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials of Group IV semiconductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/22—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping using masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90—Thermal treatments, e.g. annealing or sintering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90—Thermal treatments, e.g. annealing or sintering
    • H10P95/906—Thermal treatments, e.g. annealing or sintering for altering the shape of semiconductors, e.g. smoothing the surface
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
    • H10P50/242—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
DE102015017291.3A 2014-12-11 2015-12-10 Verfahren zum Herstellen eines Siliziumkarbidbauelements mit einem abgeschirmten Gate Active DE102015017291B4 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US14/567,504 US9577073B2 (en) 2014-12-11 2014-12-11 Method of forming a silicon-carbide device with a shielded gate
US14/567,504 2014-12-11

Publications (1)

Publication Number Publication Date
DE102015017291B4 true DE102015017291B4 (de) 2026-04-23

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DE102015121532.2A Active DE102015121532B4 (de) 2014-12-11 2015-12-10 Verfahren zum Herstellen eines Siliziumkarbidbauelements mit einem abgeschirmten Gate

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Country Status (4)

Country Link
US (3) US9577073B2 (https=)
JP (2) JP6373822B2 (https=)
CN (2) CN105702715B (https=)
DE (2) DE102015017291B4 (https=)

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016080322A1 (ja) 2014-11-18 2016-05-26 ローム株式会社 半導体装置および半導体装置の製造方法
DE102014117780B4 (de) 2014-12-03 2018-06-21 Infineon Technologies Ag Halbleiterbauelement mit einer Grabenelektrode und Verfahren zur Herstellung
DE102014119465B3 (de) 2014-12-22 2016-05-25 Infineon Technologies Ag Halbleitervorrichtung mit streifenförmigen trenchgatestrukturen, transistormesas und diodenmesas
DE102016111998B4 (de) * 2016-06-30 2024-01-18 Infineon Technologies Ag Ausbilden von Elektrodengräben unter Verwendung eines gerichteten Ionenstrahls und Halbleitervorrichtung mit Graben-Elektrodenstrukturen
DE102018010445B4 (de) 2017-03-24 2025-07-10 Infineon Technologies Ag Siliziumcarbid-halbleitervorrichtung und herstellungsverfahren
DE102017108738B4 (de) * 2017-04-24 2022-01-27 Infineon Technologies Ag SiC-HALBLEITERVORRICHTUNG MIT EINEM VERSATZ IN EINEM GRABENBODEN UND HERSTELLUNGSVERFAHREN HIERFÜR
US10431465B2 (en) * 2017-09-18 2019-10-01 Vanguard International Semiconductor Corporation Semiconductor structures and methods of forming the same
JP6896593B2 (ja) 2017-11-22 2021-06-30 株式会社東芝 半導体装置、半導体装置の製造方法、インバータ回路、駆動装置、車両、及び、昇降機
JP7166053B2 (ja) 2017-12-21 2022-11-07 株式会社東芝 半導体装置、インバータ回路、駆動装置、車両、及び、昇降機
DE102018103973B4 (de) 2018-02-22 2020-12-03 Infineon Technologies Ag Siliziumcarbid-halbleiterbauelement
DE102019111308A1 (de) 2018-05-07 2019-11-07 Infineon Technologies Ag Siliziumcarbid halbleiterbauelement
US10580878B1 (en) * 2018-08-20 2020-03-03 Infineon Technologies Ag SiC device with buried doped region
JP2020047679A (ja) 2018-09-14 2020-03-26 株式会社東芝 半導体装置
JP7030665B2 (ja) 2018-09-15 2022-03-07 株式会社東芝 半導体装置
US11056586B2 (en) * 2018-09-28 2021-07-06 General Electric Company Techniques for fabricating charge balanced (CB) trench-metal-oxide-semiconductor field-effect transistor (MOSFET) devices
DE102018124740B4 (de) 2018-10-08 2025-08-28 Infineon Technologies Ag Verfahren zur herstellung eines halbleiterbauelements
DE102018127797B4 (de) * 2018-11-07 2022-08-04 Infineon Technologies Ag Einen siliziumcarbid-körper enthaltende halbleitervorrichtung
US10985248B2 (en) 2018-11-16 2021-04-20 Infineon Technologies Ag SiC power semiconductor device with integrated Schottky junction
US10586845B1 (en) 2018-11-16 2020-03-10 Infineon Technologies Ag SiC trench transistor device and methods of manufacturing thereof
US10903322B2 (en) 2018-11-16 2021-01-26 Infineon Technologies Ag SiC power semiconductor device with integrated body diode
KR102751443B1 (ko) 2019-03-25 2025-01-13 삼성디스플레이 주식회사 박막 트랜지스터 기판, 표시 장치 및 이의 제조 방법
DE102019108062B4 (de) 2019-03-28 2021-06-10 Infineon Technologies Ag Siliziumcarbid-vorrichtung mit graben-gatestruktur und herstellungsverfahren
JP7242467B2 (ja) 2019-08-02 2023-03-20 株式会社東芝 半導体装置、インバータ回路、駆動装置、車両、及び、昇降機
DE102019121859B3 (de) * 2019-08-14 2020-11-26 Infineon Technologies Ag Siliziumcarbid-vorrichtung mit graben-gate
US11245016B2 (en) * 2020-01-31 2022-02-08 Alpha And Omega Semiconductor (Cayman) Ltd. Silicon carbide trench semiconductor device
US12604504B2 (en) 2021-11-23 2026-04-14 Infineon Technologies Ag Shielding structure for silicon carbide devices
CN114496795A (zh) * 2021-12-30 2022-05-13 广东芯粤能半导体有限公司 半导体结构及其形成方法
CN115513061A (zh) * 2022-11-22 2022-12-23 广东芯粤能半导体有限公司 半导体结构的制备方法及半导体结构

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080220620A1 (en) 2006-12-21 2008-09-11 Fuji Electric Device Technology Co., Ltd. Method of manufacturing silicon carbide semiconductor device
US20100006861A1 (en) 2008-07-08 2010-01-14 Denso Corporation Silicon carbide semiconductor device and manufacturing method of the same
DE102011082289A1 (de) 2010-09-14 2012-04-05 Denso Corporation SiC-Halbleitervorrichtung und Herstellungsverfahren hierfür
US20130168701A1 (en) 2011-09-22 2013-07-04 Panasonic Corporation Silicon carbide semiconductor element and method for fabricating the same
DE102013224134A1 (de) 2012-11-26 2014-05-28 Infineon Technologies Austria Ag Halbleiterbauelement

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6285060B1 (en) * 1999-12-30 2001-09-04 Siliconix Incorporated Barrier accumulation-mode MOSFET
JP2001358338A (ja) 2000-06-14 2001-12-26 Fuji Electric Co Ltd トレンチゲート型半導体装置
KR100385859B1 (ko) * 2000-12-27 2003-06-02 한국전자통신연구원 트렌치 게이트 mosfet 전력소자 제조방법
JP4564362B2 (ja) * 2004-01-23 2010-10-20 株式会社東芝 半導体装置
US7532922B2 (en) 2004-08-11 2009-05-12 General Electric Company System and method for translating medical imaging system patient tables
JP4961668B2 (ja) * 2005-01-11 2012-06-27 富士電機株式会社 半導体装置の製造方法
US7648877B2 (en) * 2005-06-24 2010-01-19 Fairchild Semiconductor Corporation Structure and method for forming laterally extending dielectric layer in a trench-gate FET
JP2008177335A (ja) 2007-01-18 2008-07-31 Fuji Electric Device Technology Co Ltd 炭化珪素絶縁ゲート型半導体装置。
JP2009088186A (ja) * 2007-09-28 2009-04-23 Sanyo Electric Co Ltd トレンチゲート型トランジスタ及びその製造方法
JP4890407B2 (ja) 2007-09-28 2012-03-07 オンセミコンダクター・トレーディング・リミテッド トレンチゲート型トランジスタ及びその製造方法
US7582922B2 (en) 2007-11-26 2009-09-01 Infineon Technologies Austria Ag Semiconductor device
US7989882B2 (en) 2007-12-07 2011-08-02 Cree, Inc. Transistor with A-face conductive channel and trench protecting well region
JP2009302510A (ja) * 2008-03-03 2009-12-24 Fuji Electric Device Technology Co Ltd トレンチゲート型半導体装置およびその製造方法
US8148749B2 (en) * 2009-02-19 2012-04-03 Fairchild Semiconductor Corporation Trench-shielded semiconductor device
JP5531787B2 (ja) * 2010-05-31 2014-06-25 株式会社デンソー 炭化珪素半導体装置およびその製造方法
US8525254B2 (en) 2010-08-12 2013-09-03 Infineon Technologies Austria Ag Silicone carbide trench semiconductor device
JP2014139956A (ja) 2011-03-30 2014-07-31 Hitachi Ltd トレンチ型ＳｉＣ半導体装置の製造方法
JP5673393B2 (ja) * 2011-06-29 2015-02-18 株式会社デンソー 炭化珪素半導体装置
WO2013076890A1 (ja) 2011-11-21 2013-05-30 パナソニック株式会社 半導体装置及びその製造方法
US8637922B1 (en) 2012-07-19 2014-01-28 Infineon Technologies Ag Semiconductor device
JP6056292B2 (ja) * 2012-09-12 2017-01-11 住友電気工業株式会社 炭化珪素半導体装置の製造方法
DE112013006262B4 (de) 2012-12-28 2024-06-13 Mitsubishi Electric Corporation Siliciumcarbid-Halbleitervorrichtung und Verfahren zu ihrer Herstellung
JP6077380B2 (ja) * 2013-04-24 2017-02-08 トヨタ自動車株式会社 半導体装置
US9299793B2 (en) * 2013-05-16 2016-03-29 Infineon Technologies Americas Corp. Semiconductor device with a field plate trench having a thick bottom dielectric

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080220620A1 (en) 2006-12-21 2008-09-11 Fuji Electric Device Technology Co., Ltd. Method of manufacturing silicon carbide semiconductor device
US20100006861A1 (en) 2008-07-08 2010-01-14 Denso Corporation Silicon carbide semiconductor device and manufacturing method of the same
DE102011082289A1 (de) 2010-09-14 2012-04-05 Denso Corporation SiC-Halbleitervorrichtung und Herstellungsverfahren hierfür
US20130168701A1 (en) 2011-09-22 2013-07-04 Panasonic Corporation Silicon carbide semiconductor element and method for fabricating the same
DE102013224134A1 (de) 2012-11-26 2014-05-28 Infineon Technologies Austria Ag Halbleiterbauelement

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CN113130634A (zh) 2021-07-16
DE102015121532A1 (de) 2016-06-16
US9577073B2 (en) 2017-02-21
CN105702715A (zh) 2016-06-22
DE102015121532B4 (de) 2018-11-22
JP6707498B2 (ja) 2020-06-10
CN105702715B (zh) 2021-05-25
US20180248000A1 (en) 2018-08-30
US20170117352A1 (en) 2017-04-27
US9960230B2 (en) 2018-05-01
JP2016115936A (ja) 2016-06-23
JP2017204655A (ja) 2017-11-16
CN113130634B (zh) 2023-07-25
US20160172468A1 (en) 2016-06-16
JP6373822B2 (ja) 2018-08-15

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