DE102004060170A1 - Halbleitervorrichtung und Verfahren zu ihrer Herstellung - Google Patents

Halbleitervorrichtung und Verfahren zu ihrer Herstellung Download PDF

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Publication number
DE102004060170A1
DE102004060170A1 DE102004060170A DE102004060170A DE102004060170A1 DE 102004060170 A1 DE102004060170 A1 DE 102004060170A1 DE 102004060170 A DE102004060170 A DE 102004060170A DE 102004060170 A DE102004060170 A DE 102004060170A DE 102004060170 A1 DE102004060170 A1 DE 102004060170A1
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Germany
Prior art keywords
layer
region
soi
soi layer
layers
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DE102004060170A
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German (de)
English (en)
Inventor
Toshiaki Iwamatsu
Takashi Ipposhi
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Renesas Electronics Corp
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Renesas Technology Corp
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Publication of DE102004060170A1 publication Critical patent/DE102004060170A1/de
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/40—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/20—Inductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/40—Resistors
    • H10D1/47—Resistors having no potential barriers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/811—Combinations of field-effect devices and one or more diodes, capacitors or resistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/80—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple passive components, e.g. resistors, capacitors or inductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/061—Manufacture or treatment using SOI processes together with lateral isolation, e.g. combinations of SOI and shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/17—Isolation regions comprising dielectric materials formed using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/811—Combinations of field-effect devices and one or more diodes, capacitors or resistors
    • H10D84/817—Combinations of field-effect devices and resistors only

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Element Separation (AREA)
  • Thin Film Transistor (AREA)
DE102004060170A 2003-12-19 2004-12-14 Halbleitervorrichtung und Verfahren zu ihrer Herstellung Withdrawn DE102004060170A1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2003422762A JP2005183686A (ja) 2003-12-19 2003-12-19 半導体装置およびその製造方法
JP2003-422762 2003-12-19

Publications (1)

Publication Number Publication Date
DE102004060170A1 true DE102004060170A1 (de) 2005-07-28

Family

ID=34675327

Family Applications (1)

Application Number Title Priority Date Filing Date
DE102004060170A Withdrawn DE102004060170A1 (de) 2003-12-19 2004-12-14 Halbleitervorrichtung und Verfahren zu ihrer Herstellung

Country Status (6)

Country Link
US (4) US7173319B2 (https=)
JP (1) JP2005183686A (https=)
KR (1) KR20050062390A (https=)
CN (1) CN1649160A (https=)
DE (1) DE102004060170A1 (https=)
TW (1) TW200525734A (https=)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005183686A (ja) 2003-12-19 2005-07-07 Renesas Technology Corp 半導体装置およびその製造方法
JP4479006B2 (ja) 2005-07-28 2010-06-09 セイコーエプソン株式会社 半導体装置の製造方法
US7790527B2 (en) * 2006-02-03 2010-09-07 International Business Machines Corporation High-voltage silicon-on-insulator transistors and methods of manufacturing the same
JP2007242660A (ja) * 2006-03-06 2007-09-20 Renesas Technology Corp 半導体装置
US20070232019A1 (en) * 2006-03-30 2007-10-04 Hynix Semiconductor Inc. Method for forming isolation structure in nonvolatile memory device
CN100514585C (zh) * 2006-04-12 2009-07-15 财团法人工业技术研究院 具有电感的晶片级构装结构及其构装方法
US8089130B2 (en) 2006-06-20 2012-01-03 Agere Systems Inc. Semiconductor device and process for reducing damaging breakdown in gate dielectrics
KR100819558B1 (ko) * 2006-09-04 2008-04-07 삼성전자주식회사 반도체 저항소자들 및 그의 형성방법들
JP5137378B2 (ja) * 2006-10-20 2013-02-06 ルネサスエレクトロニクス株式会社 半導体装置及びその製造方法
JP4614981B2 (ja) * 2007-03-22 2011-01-19 Ｊｓｒ株式会社 化学機械研磨用水系分散体および半導体装置の化学機械研磨方法
JP4458129B2 (ja) * 2007-08-09 2010-04-28 ソニー株式会社 半導体装置およびその製造方法
US7679139B2 (en) * 2007-09-11 2010-03-16 Honeywell International Inc. Non-planar silicon-on-insulator device that includes an “area-efficient” body tie
JP5446388B2 (ja) * 2009-03-31 2014-03-19 サンケン電気株式会社 集積化半導体装置の製造方法
CN101859782B (zh) * 2010-04-30 2012-05-30 北京大学 抗总剂量辐照的soi器件及其制造方法
CN101859783B (zh) * 2010-04-30 2012-05-30 北京大学 一种抗总剂量辐照的soi器件及其制造方法
US8492868B2 (en) * 2010-08-02 2013-07-23 International Business Machines Corporation Method, apparatus, and design structure for silicon-on-insulator high-bandwidth circuitry with reduced charge layer
JP5616823B2 (ja) * 2011-03-08 2014-10-29 セイコーインスツル株式会社 半導体装置およびその製造方法
US8765607B2 (en) 2011-06-01 2014-07-01 Freescale Semiconductor, Inc. Active tiling placement for improved latch-up immunity
KR101896412B1 (ko) * 2011-08-01 2018-09-07 페어차일드코리아반도체 주식회사 폴리 실리콘 저항, 이를 포함하는 기준 전압 회로, 및 폴리 실리콘 저항 제조 방법
JP2012186491A (ja) * 2012-05-07 2012-09-27 Renesas Electronics Corp 半導体装置及びその製造方法
FR3012667A1 (https=) 2013-10-31 2015-05-01 St Microelectronics Crolles 2
FR3012665A1 (https=) 2013-10-31 2015-05-01 St Microelectronics Crolles 2
FR3012666A1 (https=) 2013-10-31 2015-05-01 St Microelectronics Crolles 2
US9929135B2 (en) 2016-03-07 2018-03-27 Micron Technology, Inc. Apparatuses and methods for semiconductor circuit layout
DE102018112866B4 (de) * 2018-05-29 2020-07-02 Infineon Technologies Ag Halbleitervorrichtung mit elektrischem Widerstand

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JPH09289324A (ja) 1996-04-23 1997-11-04 Matsushita Electric Works Ltd 半導体装置の製造方法
JP3161418B2 (ja) 1998-07-06 2001-04-25 日本電気株式会社 電界効果トランジスタの製造方法
JP4540146B2 (ja) * 1998-12-24 2010-09-08 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP2001230315A (ja) * 2000-02-17 2001-08-24 Mitsubishi Electric Corp 半導体装置およびその製造方法
JP4260396B2 (ja) * 2000-03-09 2009-04-30 富士通マイクロエレクトロニクス株式会社 半導体装置およびその製造方法
US6358820B1 (en) * 2000-04-17 2002-03-19 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing semiconductor device
JP4776752B2 (ja) * 2000-04-19 2011-09-21 ルネサスエレクトロニクス株式会社 半導体装置
JP4969715B2 (ja) * 2000-06-06 2012-07-04 ルネサスエレクトロニクス株式会社 半導体装置
JP4776755B2 (ja) 2000-06-08 2011-09-21 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
JP2002110908A (ja) 2000-09-28 2002-04-12 Toshiba Corp スパイラルインダクタおよびこれを備える半導体集積回路装置の製造方法
US6635550B2 (en) * 2000-12-20 2003-10-21 Texas Instruments Incorporated Semiconductor on insulator device architecture and method of construction
JP4803898B2 (ja) * 2001-05-17 2011-10-26 ルネサスエレクトロニクス株式会社 半導体装置
JP3939112B2 (ja) * 2001-08-03 2007-07-04 松下電器産業株式会社 半導体集積回路
JP2003158198A (ja) * 2001-09-07 2003-05-30 Seiko Instruments Inc 相補型ｍｏｓ半導体装置
US6833602B1 (en) * 2002-09-06 2004-12-21 Lattice Semiconductor Corporation Device having electrically isolated low voltage and high voltage regions and process for fabricating the device
JP2005183686A (ja) * 2003-12-19 2005-07-07 Renesas Technology Corp 半導体装置およびその製造方法

Also Published As

Publication number Publication date
US20050133864A1 (en) 2005-06-23
US7453135B2 (en) 2008-11-18
KR20050062390A (ko) 2005-06-23
US20080042237A1 (en) 2008-02-21
US7352049B2 (en) 2008-04-01
JP2005183686A (ja) 2005-07-07
US20060270126A1 (en) 2006-11-30
US7173319B2 (en) 2007-02-06
US20070105329A1 (en) 2007-05-10
CN1649160A (zh) 2005-08-03
TW200525734A (en) 2005-08-01

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Legal Events

Date Code Title Description
8127 New person/name/address of the applicant

Owner name: RENESAS ELECTRONICS CORP., KAWASAKI-SHI, KANAG, JP

R005 Application deemed withdrawn due to failure to request examination

Effective date: 20111215