CN1960832A - 焊料组合物和制备焊接物的方法 - Google Patents

焊料组合物和制备焊接物的方法 Download PDF

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Publication number
CN1960832A
CN1960832A CNA2005800171080A CN200580017108A CN1960832A CN 1960832 A CN1960832 A CN 1960832A CN A2005800171080 A CNA2005800171080 A CN A2005800171080A CN 200580017108 A CN200580017108 A CN 200580017108A CN 1960832 A CN1960832 A CN 1960832A
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substrate
composition
solder composition
weld zone
solder
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CN100509254C (zh
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N·J·A·范维恩
M·H·比格拉里
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MAT-TECH BV
Koninklijke Philips NV
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Matt Technology Co Ltd
Koninklijke Philips Electronics NV
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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24Selection of soldering or welding materials proper
    • B23K35/26Selection of soldering or welding materials proper with the principal constituent melting at less than 400 degrees C
    • B23K35/262Sn as the principal constituent
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • BPERFORMING OPERATIONS; TRANSPORTING
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    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/02Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
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    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/02Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape
    • B23K35/0222Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape for use in soldering, brazing
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    • B23K35/26Selection of soldering or welding materials proper with the principal constituent melting at less than 400 degrees C
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    • BPERFORMING OPERATIONS; TRANSPORTING
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    • B23K35/28Selection of soldering or welding materials proper with the principal constituent melting at less than 950 degrees C
    • B23K35/286Al as the principal constituent
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Abstract

本发明涉及一种焊料组合物,其包括一种热力亚稳定合金的粒子。该合金中的一种元素将形成与金属表面混合的金属间化合物。该焊料组合物特别适用于形成半导体装置的突起。

Description

焊料组合物和制备焊接物的方法
技术领域
本发明涉及一种焊料组合物。
本发明还涉及一种通过焊料组合物在第一基板的焊接区和第二基板的焊接区之间制备导电连接的方法,包括以下步骤:
在第一基板的焊接区上面提供焊料组合物;
组合第一和第二基板,使得该焊料组合物夹在所述第一和第二基板的焊接区之间,以及
通过加热焊料组合物来提供导电连接。
本发明还涉及一种带有焊接区的基板,在焊接区上存在一个焊料组合物层,本发明还涉及一种包括具有焊接区的第一和第二基板的部件,通过导电焊料连接使第一和第二基板的所述焊接区相互连接。
背景技术
本质上已知焊料组合物用于连接金属表面。该金属表面可以在较大区域上延伸,但也可以将其限定在一个不同的电绝缘表面处的小区域。后一种情况尤其是出现在电子元件和产品的环境中。集成电路等表示具体关联性的应用。这些集成电路日益地通过多个焊料或金属突起以倒装芯片的方向与载体相连。在该连接中,其趋势在于对每个集成电路使用大量突起并减小相邻突起之间的间距,尤其是这两种的组合。
对电子元件与载体的连接要求是该连接提供机械稳定性和导电性。焊料组合物以优越的方式满足这些要求。这存在多个原因:首先,所有焊料的导电性都优于例如各向异性导电胶等那样的可选物;而且,该焊料可以以球状部分应用,也称为突起;此外,可以在组合前应用焊料突起,而且该焊料突起只会在热处理阶段中的高温时向外流。在所述热处理阶段甚至可以传送一个带有突起的基板。然而,所述高温不能太高以使载体或元件击穿或损坏。
特别注意所谓的扩散焊料。这些焊料包括第一和第二金属成分。在焊接中,使第二金属成分熔化,而第一金属成分是固态。第一成分扩散进入第二成分中将导致形成一种金属间相,其具有比第一金属成分低的熔化温度。然而金属间相往往引起易脆性和不利于焊接点的机械特性。WO 96/19314A建议包含一个滤波器来解决该问题。WO02/20211A建议提供第一金属成分作为第二成分的焊料中的粒子。WO03/72288A建议为这一扩散焊料添加纳粒子。最后,该焊料连接物吸收由于成分与载体之间的热膨胀差别所产生的压力。
然而目前可用的焊料组合物也具有缺点。缺点之一是在触点包括某种金属时需要粘附层。这种金属还归类为可焊接性较差的触点。所述较差的可焊接性经常归因于在触点上形成的氧化物表层。该氧化物表层是电绝缘的而且阻止焊料与金属的直接连接。因此,会出现粘接问题和导电问题。为了解决这些问题,触点通常具有粘附层。需要分别地提供这种粘附层,其涉及附加的处理步骤和额外的费用。此外,该粘附层限制使用这种可焊接性较差的金属,尤其是在需要耐某种最小温度的成分和载体中。在第一基板的触点中,该问题的复杂性增加,其中该第一基板的触点包括了一种不同于面向第一基板的第二基板的触点的金属。
发明内容
因此本发明的第一目的是提供一种焊料组合物,它可以用来建立在两个相对的基板的焊接区之间的电连接,其中至少一个触点的可焊接性较差。
本发明的第二目的是提供一种制备在公开的段落中提及那样导电连接的方法,其中可以在可焊接性较差的焊接区上建立连接而无需引用一个单独的粘附层。
通过这样来实现第一目的,即在焊料组合物中扩散一种热力亚稳定合金的粒子,该合金包括这样一种元素,一旦对包含金属氧化物表面应用该组合物,该元素就形成与所述表面的金属混合的金属间化合物。
通过这样来实现第二目的,即所述第一和第二基板的焊接区中的第一焊接区包括一个合金金属,应用一种焊料组合物,其中分散一种热力亚稳定合金的粒子,该合金包括一种将形成与第一触点的合金金属混合的金属间化合物的元素。
本发明的焊料组合物实际上是一种允许对相对着的基板上的触点提供良好电连接的在化学上稳定的、化合物的双相混合物。然而,尽管从本质上已知焊料组合物是化学稳定的,但是该组合物中的粒子是热力亚稳定的。这意味着如果加热该组合物,粒子的组成结构就会倾向于呈现一种不同的物理化学形状,例如扩散到焊料组合物中并有可能起反应。可以选择其中亚稳定粒子的结构以便消除可焊接性较差的触点表面的任何氧化物表层。然后不仅仅消除该氧化物表层,还用一种金属间化合物的导电粘附层进行代替。该金属间化合物包括一种触点的元素和一种来源于热力亚稳定粒子的元素。
因此观察到本发明的焊料组合物在焊接过程中相比于介绍中所提及的扩散焊料是致力于一种完全不同的反应。扩散焊料的反应是在焊料本身的第一和第二成分之间的。在焊料中形成金属间相。相反,在本发明中,该反应在亚稳定粒子的组成结构与其中一个将要连接的物体的金属表面之间。在这方面,本发明的焊料具有弄湿表面的能力,特别是具有消除氧化物层的能力,反之,现有技术中的扩散焊料不具备任何固有的能力来实现这些。
此外,粒子的组成结构是不同的。根本没有任何现有技术的文件公开粒子包括合金。在WO 02/20211A中,这些粒子具有特定的核和具有较高熔点的金属壳体(即,第一金属成分)。在WO 03/72288A中,该粒子是纳粒子,它们根本不起反应,但是增强了金属间相的机械特性。
最优选但并不限制地,本发明的焊料的粒子主要由第一和第二成分构成。认为这些粒子的成分以按照不同的相存在;更像一种金属成分的一个核、在第一相内的合金的第一壳体和在第二相内的合金的第二壳体的结构。可以存在一种其他金属成分的外壳。然而假设在把粒子带入基质组合物之后,实质上交换该外壳或使其分解。第二壳体存在于热力亚稳定相内,例如是由于在粒子制备过程中的快速冷却步骤所导致的。观察到核与壳体的图像是一种内部简单化的图片。该图像并不排除壳体内的孔或一个壳体内的区域或另一个相内的核。
本发明的发明人相信,不进行绑定,焊料组合物中并非所有的粒子都参与表面反应。然后粘附层提供在触点和焊料组合物之间的粘接。此外本发明的一个重要特征在于在冷却后,焊料组合物中任何剩余的粒子将继续作为第二相存在于焊料组合物中,而实质上不会对焊料连接物的机械稳定性或导电性起负面影响。
本发明的第一优势在于焊料组合物粘附在大量不同的表面上。这些表面包括像铝、铜、金、镍及其合金那样的金属;像掺杂的硅的欧姆触点那样的半导体材料;像铟-锡-氧化物、氧化钌和氮化钛那样的导电的氧化物和氮化物。特殊优势在于其在环境中的应用,即考虑到氧化表面而不允许一种标准的焊料突起,特别是关于铝、镍(另外具有金的表面)、硅和铟-锡-氧化物的应用。其主要应用分别为标签和其他传统的集成电路;用于细距处理的浸焊,特别是对包括像BiSn或PbSn那样的锡基质的焊料组合物;芯片附着处理;以及将玻璃上芯片(COG)的处理,尤其是驱动显示器。
本发明的第二优势在于在相对的基板上的触点可以包括一种不同的金属作为它们的主要成分。在此情况下,可以仅仅在单个基板的触点上形成粘附层。适当的实例包括铝和铜;铝和金;铟-锡-氧化物和铜或铝等。
焊料组合物的另一个优势在于可以为无铅的。由于环境的原因要求应用无铅的的焊料。
可应用的具有热力稳定性的粒子包括如同金属间化合物的合金元素,特别地并优选为铟、锡、铋和锌组中的一个或多个。这些元素可以形成金属间化合物,特别是带有铝的金属间化合物,也可以带有其他像钨、钛、钒和镍那样的元素。实际上,从元素周期表的较高组(V,V I,Vb)中选择在此使用的合金元素,反之,存在于触点中的元素是在元素周期表的较低组(III,IIIa,Iva)中,因此能够形成一种惰性气体结构,其形成该合金。
在另一个实施例中,该粒子还包括一种元素,该元素能够形成一种优选在氧化铝或氧化锡之上的氧化物。特别地从钛、铬、铝和镍组中选择该元素。利用适合于去除氧化铝层的酸性溶液来处理一种可供选择的方案。观察到,不管氧化铝表面,铝可以充当该成分,这是因为该表面的氧化铝变为具有另一个不同于由亚稳定元素组成的氧化物粒子的能量级的能量级。产生的情况就是在焊料突起中扩散这些氧化物粒子。
举例来说,亚稳定粒子的适当组合物是SnAg4Ti4和ZnAl6Ag6。尽管这些粒子组合物在本质上是已知的,但是使用这些组合物作为标准焊料组合物中的粒子来获得焊料液滴是未知的,该焊料液滴可以用于形成半导体装置的突起。此外,目前根据特殊要求可以将它们应用到半导体装置。在此所使用基于锡的粒子的熔化温度为200-238℃,基于锌的粒子的熔化温度为380-426℃。已经发现不必将焊料组合物加热到粒子的熔化温度以上的温度,而只需将其加热到基质材料的熔化温度以上的温度。
在特别地优选实施例中,反应元素为锡,而且焊料组合物包括锡。在粒子和溶液中都存在锡就提高了组合物稳定性。此外在半导体部件领域中非常确定使用包含锡的焊料。这种焊料的适当的实例为SAC(锡-银-铜)焊料和基于锡的焊料,例如SnCu、SnBi、PbSn、SnIn、SnZn和锡、铟、铋和锌的三元或四元合金。最为优选地组合这种包含锡的焊料与金的金属化物或突起,其中能够形成共熔的AuSn互连。此外,使用包含锡的焊料的优势还在于它具有相对较低的熔点。因此,本发明的焊料组合物可以应用于在只能耐相对较低温度的载体上的焊接性较差的触点。这种载体是特别有有机物和柔性的载体。
一般地,扩散的粒子占0.1到90%的重量浓度,而且优选为占0.5到60%的重量浓度。而且该浓度优选为该范围的下端,大约直至10%,因为这足以形成金属间化合物的一个薄层。可以根据需要选择精确的浓度,还可以考虑到组合物的粘性和粒子大小。应当理解为了确定将会像要求的那样用金属间化合物覆盖触点表面,该组合物的流变能力是一个重要因素。当然对于化学稳定性和导电性而言,高度优选用金属间化合物覆盖整个触点。
举例来说,扩散的粒子的平均直径在0.1到80μm的范围内。该平均直径优选为在0.3到20μm的范围内。仅仅通过焊料组合物中的分散倾向确定分散粒子的最小尺寸,因而分解会改变粒子中元素的相位,并因此改变反应性。将理解为了获得具有均匀厚度的金属间化合物的一个薄层而优选一个小的尺寸。此外,小的尺寸提高了焊料组合物中粒子分布的均匀性。另外,小的粒子尺寸需要应用的在焊料的单个点之间的间距很小。通常把该间距定义为从一个焊料突起的中心到相邻焊料突起的中心之间的距离。在此情况小,“小”暗示从15到40μm的距离,而且将理解该粒子需要至少小于该距离的幅值,并且优选为甚至比该距离更大。
本发明的组合物特别适合用作电子应用中的焊料突起,其中焊接区限定为在一个另外的实质上电绝缘的基板上的焊盘。这种焊盘的尺寸一般小于100*100微米,也包括小于10*10微米,然而它们也可以较大。另外,本发明的焊料组合物用于其他应用。一种特殊的应用是将芯片元件附着到载体上。通过芯片附着处理获得好得出奇的结果,该芯片包括一个半导体基板。其他应用包括连接两个较大的盘和提供焊料环。可以在该环境中修改粒子大小使其充当确定两个相对基板的单个表面之间距离的垫片。
在本发明的方法中,高度优选为其中一个焊接区包括铝,尤其是还称为触点的焊盘。该金属不仅用作集成电路中的互连材料,还用作其他元件,例如无源网络。它还可以在低温中应用在标签或其他柔韧基板上,并且由于其天然的氧化物层而较好地保护不受潮湿等影响。然而,铝的使用经常会导致在必须应用的分离的粘附层中的问题和额外费用,通常是在高温下。在本发明中是没有问题的。
此外更合适的是在第一基板上存在第一触点,而且在第二基板上的触点包括一个变厚的顶层,它将形成带有焊料组合物的合金。尽管不排除可以反过来,但是在应用了焊料组合物的基板上将会形成金属间化合物的试验中获得了良好的结果。其优势在于可以提供焊料组合物之后直接形成第一触点的稳定连接和保护。可以在后一阶段形成第二基板的连接,并且可能是在另一个位置。考虑到金属间化合物的稳定性,在后面的焊接步骤中将不会使其又再分散;然而,由于连续的沉积,金属间化合物层变厚。
存在一个变厚的顶层导致形成带有焊料组合物的合金。变厚的顶层实例包括下面的突起金属化物、钮扣突起、电镀突起等。适当的材料在本质上已为本领域技术人员所公知,举例来说,其包括镍、铜和金。
本发明的方法特别适用于在柔韧载体上提供元件,例如集成电路。然而,它必然不限制于该应用。其他适当的应用包括芯片上芯片应用,其中将一个芯片上的焊盘连接到另一个芯片上的焊盘。通常,尽管不是必要的,但是其中至少一个焊盘包括铝或铝合金。该芯片的第一种组合是存储器芯片与处理器或其他逻辑芯片。一种可供选择的组合是集成电路与作为载体的无源元件网络。举例来说,另一种组合是在集成电路的上面提供一个无源元件网络。特别是对所述元件来说,本发明的焊料显示出较高的适应性,当需要小间距溶液时。而且,由于不需要单独的粘附层,所以降低了成本并提高了柔韧性。在现在的方案中,由铝组成这一无源网络的金属化物层。使用本发明的组合物允许实质上减小掩模步骤。此外,本发明的组合物能较好地改变以便具有只包括铝或氧化铝的受限的可湿性。照这样,可以无掩模地应用焊料组合物,而且通过形成金属间化合物将形成连续的粘附。
可以局部地或在整个基板上提供形成金属间化合物所需要的任何加热处理。使用回流焊炉是可选的,而不是必要的。
如上所述,可以在基板上应用焊料组合物,其后将焊接该基板并将其传送到另一个位置。因此中间产品是带有本发明的以液滴等形式的焊料组合物的基板。该基板一般是元件的一部分,例如集成电路。触点的图案可以是如通常所使用的球栅阵列。然后,它当然不排除使用有源的焊盘图案,其中焊盘图案覆盖半导体装置的有源元件。
可以将焊料应用到以突起方式的元件表面,即通过单独沉积液滴。一种可供选择但适当的方法是使用浸焊突起。在该方法中,通过浸入在下面的一个适当的例如镍或铜的突起金属化物上提供特别包含了锡的层。在此情况下,相对的基板会包括可焊接性较差的触点。浸焊的优势在于可以获得减小的间距。
本发明还涉及一种包括第一和第二基板的部件,通过导电焊接物使第一和第二基板所具有的触点相互连接。
本发明的另一个目的提供一种包括提供良好接触的粘附层的部件。
通过这样来实现该目的,即在触点和焊料连接中至少一个的接口上存在一个包括金属间化合物的粘附层,该金属间化合物包括一个存在于触点上的元件和一个来源于焊料组合物的合金元件。
附图说明
将参照附图进一步阐明本发明的组合物和方法的各方面,其中:
图1显示了现有技术中基板的示意性横截面视图;
图2显示了根据本发明的基板的示意性横截面视图;
图3显示了根据本发明的部件的示意性横截面视图;
图4显示了第一测试结果的照片;
图5显示了第二测试结果的照片;
图6显示了相比较实例的测试结果的相片;
图7显示了根据本发明的部件第二实例的示意性横截面视图;
图8显示了根据本发明的部件第三实例的示意性横截面视图。
具体实施方式
附图并非按比例绘制,不同附图中相同的参考数字指表示相同部分。
图1显示了现有技术的基板的示意性横截面视图。该基板是一种集成电路装置。它包括多个元件,在此情况下为MOS晶体管2和多晶硅轨迹3。该电路提供在半导体主体1的表面上的一个有源电路区4中。在与电路装置2、3相关的覆盖关系中,提供一种互连结构8用于互连电路装置2、3以形成电路。在该实施例中,互连结构8包括第一图案化金属层5、第二图案化金属层6和互连通孔7。在该实例中,图案化金属层5、6包括铝或铝合金,例如AlCu。在互连结构8的上面布置一层钝化材料9。该钝化材料例如氮化硅或氧化硅。该钝化结构还包括防辐射以及在化学上稳定的耐反应性蚀刻剂的层,以便提供一种防止非法访问该集成电路的障碍。后者对于智能卡等的集成电路的应用是首要重要的。通过光刻步骤和进行蚀刻,形成一个从第二图案化金属层6延伸并穿过钝化材料层9的通路接触孔10。在钝化材料层9上和通路接触孔10内提供一个例如包括TiW或Ti/Pt的阻挡层11,例如通过溅射处理来实现。阻挡层11相对于钝化材料层9较薄,其厚度大约为200到300nm。例如通过溅射处理在阻挡层11的上面布置一个金属层12。金属层12例如可以包括金而且厚度为100到200nm。接着,在光刻步骤之前就已经通过电镀法在阻挡层11和金属层12上生成了一个Pb/Sn突起13以限定突起尺寸。阻挡层11、金属层12和突起13一起形成突起电极。该突起电极实质上直线地位于有源电路区4之上。
图2以示意性横截面视图的方式显示了本发明的基板。在该基板中不存在阻挡层11和金属层12。作为代替,使用本发明的焊料组合物作为突起13的材料。印刷该材料作为焊膏,而钝化层9充当阻焊材料。使用共熔的Sn43Bi57焊接合金作为基质材料,按粒子重量来计算,其包括4.5%的Sn92Ag4Ti4和0.5%的Sn90Al6Ag4。在接触孔10中该焊料组合物被用于铝或铝合金的焊盘,在第二图案化金属层6中限定该焊盘。这些焊盘具有一个天然氧化铝层。通过加热步骤使超出基质材料的熔点来将焊料组合物附着于焊垫。在该实例中,当共熔的锡-铋的熔点为139℃时,在170℃执行加热步骤。把结果产生的结构应用于载体。焊盘的大小约为50×50微米,然而这并不是临界值而且还有减小的余地。
图3以示意性横截面视图的方式显示了本发明的部件100。在此情况下,把带有所述焊料突起13的集成电路30应用于载体20,在载体20的第一表面21上包括铝轨迹23。接着执行焊接步骤,其中以35kHz和5W的输出,在250℃的温度下和在10秒的过程中执行超声波焊接。结果产生的连接包括金属间化合物SnAl的粘附层16、26。另外,在焊料突起13内形成和存在SnTi的粒子17,该粒子结合从原来存在的氧化铝表层释放出来的氧。除了SnTi粒子17之外还存在的SnAgTi粒子18。这些粒子在粘附层16的形成过程中并不起作用或者仅仅起部分作用。
图4显示了对比实例的照片。在该实例中,使用没有添加任何粒子的SnBi合金。可以看得见指示为D的裂缝,其显示出该连接是不可靠的。指示为A的黑色相包括Tin(Sn);最有可能是还包括Bi的富锡的组合物。指示为B的白色相包括Bi;最有可能是还包括Sn的富铋的相。SnBi合金的分离是一种经过一定的时间发生的常规处理。它对导电性或机械稳定性都没有负面影响。
图5和6显示了在第一实例中的连接的横截面的照片。该照片的差别在于粒子的形态。图5显示了针状粒子C的结果,而图6显示了具有不规则形状的粒子C的结果。这些粒子包括本发明的亚稳定合金。观察到那些相对远离表面的粒子并不与其起反应。还观察到至今为止还不知道在与基板反应之后究竟对第二合金元件发生了什么。在此情况下使用SnTi粒子。Sn与表面起反应来形成Al-Sn。Ti最有可能形成氧化物。不清楚TiO2是否作为游离相存在,或者是SnTi粒子的一部分或者溶于SnBi之中。由于它涉及相对小的数量,所以这对于所形成连接的性质不是重要的。表面6、23包括铝。如图4所示可以按照相同的方式区分A相和B相。在表面上存在金属间化合物的AlSn的粘附层16、26。在整个表面6、23上的延伸是优选的,但不是必须的。
在实验中的粒子的尺寸是大约10-20微米。在另一个实验中可以将尺寸减小到小于10微米,优选为小于5微米,最优选为1-3微米。考虑到IC产业中的小型化而进行该减小。获得高度欧姆接触,而且导电性良好。
图7以示意性横截面视图的方式显示了根据本发明第二实施例的部件100。在该实例中,在镍或铜金属化物12上应用本发明的焊料组合物13。在该实例中,使用本质上已知的浸焊突起形成技术。镍金属化物12优选地应用于无电镀处理中。这是一种无掩模处理,镍金属化物可以应用小于40微米的非常小的间距而且可能为大约10微米。然后将基板30应用到包含铝焊盘24的载体20上。该载体20特别是一种包括半导体基板22、互连结构28和钝化层29的集成电路。考虑到应用了浸焊的焊料突起的高度较小,优选地在钝化层29上面提供在载体20的第一表面21上的焊盘24,例如在关于本质上已知的有源处理的焊盘中。在这样一种关于有源处理的焊盘中,通过垂直互连等将焊盘24改线连接到互连层25下面的一个钝化层29。该实施例相比于传统浸焊突起形成的优势在于不需要在载体20上应用附加的金的金属化物。其优势还在于可以提高分辨率,与金属化物相反,可以在晶片制造中适当地应用在有源层24上的铝焊盘24并作为标准处理的一部分。浸焊突起形成技术的优势在于可以无需实质压力的情况下来执行焊接处理。因此能够非常适当地与有源上的焊盘结合,其通常不能耐高粘合压力。尽管在这里没有显示,但是适当地用填充剂充满在载体20与基板30之间的任何空间。在载体上没有连接到对应焊盘24的焊盘6和焊料突起13可以用来连接外部装置或其他装置。如本领域公知的,通过使用引线接合或倒装芯片的方法适当地与外部装置连接。基板30可以包括一个集成电路,该集成电路包括例如晶体管的有源组件,另外也可以是一种包括电容器、电阻器、电感器和可选的二极管的无源芯片。
图8以示意性横截面视图的方式显示了本发明的焊料组合物的另一种应用。在此,焊料组合物13用于焊接半导体装置30的背部与载体20的散热器200。特别地,半导体装置30包括一个硅基板1作为支撑晶片。另外,它可以包括另一种例如氧化物、氮化物或甚至硅化物的材料的埋置层和/或包括SiGe、SiC和III-V材料的另一种材料层。后面的材料可以外延生长。令人惊讶的是发现本发明的焊料组合物13对硅具有良好的粘着力。在第一实例中,在共熔的锡-铋焊料基础上使用焊料组合物13。具有更高熔点的焊料可以获得类似的结果,例如锡-银-铜、锡-银和锡-铜合金。如图所示,装置30具有互连结构8,在其顶层上定义了焊盘6。这些通过在装置30的上部32处存在的钝化层9中的孔暴露的焊盘6具有金属化物12,通常被称为是在突起之下的金属化物(UBM)并带有导电连接,在此情况下为引线接合33。引线接合33连接到接触垫201、202,其为载体20的一部分。在该实例中,载体20是HVQFN类型的引线框架。通过任何传统材料(例如环氧材料)的密封40来保护该部件。

Claims (15)

1.一种焊料组合物,其中分散一种热力亚稳定合金的粒子,该合金包括这样一种元素,一旦对包含金属氧化物的表面应用该组合物,该元素就形成与所述表面的金属混合的金属间化合物。
2.按照权利要求1所述的组合物,其特征在于从锡、锌、铟、铝和铋的组中选择对表面起反应的合金元素。
3.按照权利要求2所述的组合物,其特征在于起反应的元素为锡,而且焊料组合物包括锡。
4.按照前面任何一个权利要求所述的组合物,其特征在于分散的粒子占0.1到90%的重量浓度,而且优选为占0.5到60%的重量浓度。
5.按照前面任何一个权利要求所述的组合物,其特征在于扩散的粒子的平均直径为0.5到80μm,优选在1和20μm之间。
6.一种通过焊料组合物在第一基板的焊接区与第二基板的焊接区之间制造导电连接的方法,包括以下步骤:
在第一基板的焊接区上面提供焊料组合物;
组合第一和第二基板,使得该焊料组合物夹在所述第一基板的焊接区和第二基板的焊接区之间,以及
通过加热焊料组合物来提供导电连接,
其特征在于
所述第一和第二基板的焊接区中的第一焊接区包括一个合金金属和对应的氧化物层;
应用一种焊料组合物,在该焊料组合物中扩散一种热力亚稳定合金的粒子,该合金包括一种将形成与第一焊接区的合金金属混合的金属间化合物的元素。
7.按照权利要求6所述的方法,其中第一焊接区的合金金属为铝。
8.按照权利要求6或7所述的方法,其中焊接区被限定为焊盘,第一焊接区在第一基板上,第二基板上的第二焊接区包括一个变厚的顶层,该顶层将形成带有该焊料组合物的合金。
9.按照权利要求6所述的方法,其中提供权利要求1到5中任一项所述的焊料组合物。
10.一种带有焊接区的基板,在该焊接区上存在一层如权利要求1到5中任一项所述的焊料组合物。
11.按照权利要求10所述的基板,其中焊料组合物层是液滴状。
12.按照权利要求10所述的基板,其特征在于基板是集成电路的一部分。
13.一种包括第一和第二基板的部件,通过在第一区上的导电焊料连接使第一和第二基板的表面相互连接,其特征在于在第一区和该焊料连接中的至少一个的接口上存在一个包括金属间化合物的粘附层,所述金属间化合物包括一种存在于第一区内的元素和一种来源于焊料组合物的合金元素。
14.按照权利要求13所述的部件,其特征在于在所述焊料连接中扩散一种热力亚稳定合金的粒子,金属间化合物的合金元素来源于热力亚稳定合金。
15.按照权利要求13所述的部件,其中第一基板包括一个集成电路,第一区被限定为作为焊盘识别的区域。
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI575685B (zh) * 2013-08-09 2017-03-21 矽品精密工業股份有限公司 半導體裝置及其製法
CN107017175A (zh) * 2015-12-30 2017-08-04 台湾积体电路制造股份有限公司 用于接合的多撞击工艺
CN108701670A (zh) * 2015-12-11 2018-10-23 薄膜电子有限公司 具有电镀的天线和/或迹线的电子装置及其制造和使用方法

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1600249A1 (en) * 2004-05-27 2005-11-30 Koninklijke Philips Electronics N.V. Composition of a solder, and method of manufacturing a solder connection
ATE502398T1 (de) 2006-01-24 2011-04-15 Nxp Bv Spannungspufferungsgehäuse für ein halbleiterbauelement
EP2183775A2 (en) 2007-07-26 2010-05-12 Nxp B.V. Reinforced structure for a stack of layers in a semiconductor component
EP2186133A2 (en) 2007-07-30 2010-05-19 Nxp B.V. Reduced bottom roughness of stress buffering element of a semiconductor component
US8493746B2 (en) * 2009-02-12 2013-07-23 International Business Machines Corporation Additives for grain fragmentation in Pb-free Sn-based solder
US8128868B2 (en) 2009-02-12 2012-03-06 International Business Machines Corporation Grain refinement by precipitate formation in PB-free alloys of tin
US8378490B2 (en) * 2011-03-15 2013-02-19 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor apparatus including a metal alloy between a first contact and a second contact
TWI498975B (zh) * 2012-04-26 2015-09-01 Asian Pacific Microsystems Inc 封裝結構與基材的接合方法
DE102016103585B4 (de) * 2016-02-29 2022-01-13 Infineon Technologies Ag Verfahren zum Herstellen eines Package mit lötbarem elektrischen Kontakt
US11000915B2 (en) * 2016-03-31 2021-05-11 Texas Instruments Incorporated Stabilized transient liquid phase metal bonding material for hermetic wafer level packaging of MEMS devices
US10378893B2 (en) * 2016-07-29 2019-08-13 Ca, Inc. Location detection sensors for physical devices
US10784203B2 (en) 2017-11-15 2020-09-22 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor package and method
US11404365B2 (en) * 2019-05-07 2022-08-02 International Business Machines Corporation Direct attachment of capacitors to flip chip dies
DE102019120872A1 (de) * 2019-08-01 2021-02-04 Infineon Technologies Ag Löten eines Leiters an eine Aluminiumschicht

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4492730A (en) * 1982-03-26 1985-01-08 Showa Denko Kabushiki Kaisha Substrate of printed circuit
JPS61501538A (ja) 1984-03-22 1986-07-24 エスジーエス―トムソン マイクロエレクトロニクス インコーポレイテッド 集積回路に電気リードを取付ける方法
US5053195A (en) * 1989-07-19 1991-10-01 Microelectronics And Computer Technology Corp. Bonding amalgam and method of making
US5198189A (en) * 1989-08-03 1993-03-30 International Business Machines Corporation Liquid metal matrix thermal paste
US5202153A (en) * 1991-08-23 1993-04-13 E. I. Du Pont De Nemours And Company Method for making thick film/solder joints
JPH07105586B2 (ja) * 1992-09-15 1995-11-13 インターナショナル・ビジネス・マシーンズ・コーポレイション 半導体チップ結合構造
US5328087A (en) * 1993-03-29 1994-07-12 Microelectronics And Computer Technology Corporation Thermally and electrically conductive adhesive material and method of bonding with same
WO1996019314A1 (de) * 1994-12-22 1996-06-27 Siemens Aktiengesellschaft Lotmetall und dessen verwendung zur bildung einer lötverbindung zwischen zwei objekten
US6291016B1 (en) * 1999-06-02 2001-09-18 Nordson Corporation Method for increasing contact area between a viscous liquid and a substrate
EP1289707A1 (en) * 2000-05-24 2003-03-12 Stephen F. Corbin Variable melting point solders and brazes
ATE306354T1 (de) * 2000-09-07 2005-10-15 Infineon Technologies Ag Lotmittel zur verwendung bei diffusionslotprozessen
DE10204960A1 (de) * 2002-02-06 2003-08-14 Endress & Hauser Gmbh & Co Kg Lot- und Lotverbindung
DE10208635B4 (de) * 2002-02-28 2010-09-16 Infineon Technologies Ag Diffusionslotstelle, Verbund aus zwei über eine Diffusionslotstelle verbundenen Teilen und Verfahren zur Herstellung der Diffusionslotstelle
EP1600249A1 (en) * 2004-05-27 2005-11-30 Koninklijke Philips Electronics N.V. Composition of a solder, and method of manufacturing a solder connection

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI575685B (zh) * 2013-08-09 2017-03-21 矽品精密工業股份有限公司 半導體裝置及其製法
CN108701670A (zh) * 2015-12-11 2018-10-23 薄膜电子有限公司 具有电镀的天线和/或迹线的电子装置及其制造和使用方法
CN107017175A (zh) * 2015-12-30 2017-08-04 台湾积体电路制造股份有限公司 用于接合的多撞击工艺
CN107017175B (zh) * 2015-12-30 2019-05-21 台湾积体电路制造股份有限公司 用于接合的多撞击工艺

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