CN1959531A - 在衬底上形成多层凸起的方法 - Google Patents

在衬底上形成多层凸起的方法 Download PDF

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Publication number
CN1959531A
CN1959531A CNA200610148685XA CN200610148685A CN1959531A CN 1959531 A CN1959531 A CN 1959531A CN A200610148685X A CNA200610148685X A CN A200610148685XA CN 200610148685 A CN200610148685 A CN 200610148685A CN 1959531 A CN1959531 A CN 1959531A
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China
Prior art keywords
projection
metal powder
substrate
double
deck
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CNA200610148685XA
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English (en)
Inventor
萧喜铭
周安乐
黎戈
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NXP USA Inc
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Freescale Semiconductor Inc
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Publication of CN1959531A publication Critical patent/CN1959531A/zh
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Abstract

用于在衬底上形成多层凸起的方法，包含在衬底上沉积第一金属粉末，和有选择地熔化或者回流第一金属粉末的一部分以形成第一凸起。然后在第一凸起上沉积第二金属粉末，并熔化以在第一凸起上形成第二凸起。掩模板配置在衬底上方以选择熔化的金属粉末的部分，通过照射射束熔化金属粉末。在不需要任何湿化学制品的情况下形成多层凸起。

Description

在衬底上形成多层凸起的方法
技术领域
本发明涉及在半导体芯片或者印刷电路板(PCB)平台上形成凸起的方法。更具体地，本发明涉使用金属粉末和局部照射形成用于倒装片压焊的多层连接器的方法。
背景技术
典型的倒装片组件使用通过导电凸起将半导体芯片面向下直接电连接在衬底或电路板上。通常，按照三个阶段制造倒装片组件，即，在芯片上形成凸起，将凸起的芯片连接到板或者衬底，和用不导电材料填充保留在凸起芯片下面的空间。
在倒装片组件中导电凸起具有几个功能，例如，在半导体芯片和衬底之间提供电连接，和提供以半导体芯片向衬底传送热量的导热路径。凸起还提供机械地安装到衬底的部分并用做防止在半导体芯片和衬底导体之间产生电接触的隔离物。
有许多在晶片衬底上形成凸起的方法。形成凸起的一个方法包含在晶片衬底上形成具有与焊盘对准的开口的光致抗蚀剂层，通过丝网印刷在开口中涂敷焊膏，然后熔化或者回流焊膏以形成凸起。通过照射和显影光致抗蚀剂形成开口。
该方法的一个问题是需要新的光致抗蚀剂层处理每一片晶片衬底。另一个问题是需要用产生化学废物的化学溶液除去光致抗蚀剂层。又一个问题是凸起立高(standoff)(凸起高度)依赖光致抗蚀掩膜的厚度。为了获得较高的立高，需要较厚的光致抗蚀剂层。
然而，如果需要低的或者精细间距(凸起间隔)，限制了光致抗蚀剂层的最大可能厚度。实际上，光致抗蚀剂层中的开口一般具有倒置圆锥形，即，开口在焊盘上向窄末端逐渐缩减。因此，在高的立高和低间距之间有折衷。
形成凸起的另一个方法包括图案化施加于晶片衬底的光致抗蚀剂层以形成凸起位置和将焊料合金电镀在凸起位置上。然后在回流焊料合金以形成圆球之前除去光致抗蚀剂层。同时该电镀方法提供小间距，一个问题是需要湿化学制品或者电镀液。另外，这种化学工艺过程包括危险物品并且必须小心地控制。
鉴于上文，希望具有形成凸起的方法，该方法是低成本并且不涉及湿的化学制品。另外，希望具有提供高的立高(凸起高度)和低或者精细间距(凸起间距)的方法。
附图说明
结合附图通过下面详细说明将容易地了解本发明。为了便于描述，类似的附图标记指示类似的结构元件。
图1说明根据本发明的一个实施例的半导体晶片的放大剖视图。
图2说明根据本发明的实施例具有第一金属粉末的图1的半导体晶片的放大剖视图。
图3说明根据本发明的实施例在第一金属粉末的第一照射期间图2的半导体晶片的放大剖视图。
图4说明根据本发明的实施例在第一凸起上具有第二金属粉末的图3的半导体晶片的放大剖视图。
图5说明根据本发明的实施例在第二金属粉末的第二照射期间图4的半导体晶片的放大剖视图。
图6是根据本发明的实施例形成在半导体晶片的焊盘上的大量双层金属凸起的放大剖视图。
具体实施方式
提供在半导体芯片或者印刷电路板(PCB)平台中在衬底上形成多层凸起或者连接器的方法。在下文描述中，为了提供本发明的全面了解阐述许多细节。然而，本领域的技术人员将了解没有一些或者所有的特定细节也可以实现本发明。在其他的情况下，为避免不必要地妨碍本发明的描述，没有详细描写公知工艺操作。
参照图1，显示根据本发明的一个实施例的半导体芯片或者晶片或者PCB衬底104的放大剖视图。该衬底104包含用于限定其上形成凸起的凸起位置112的大量焊盘108。在形成凸起之前，清洁衬底104以从焊盘108除去污染物，例如氧化铝。
为了实现这种清洁，将构图为具有一个或多个孔径120的掩模板116配置在衬底104上方，使得孔径120与凸起位置112对准。将局部照射束124(例如，红外线或者激光束)提供在掩模板116上方并对准凸起位置112。射束124烧除垫108上的任何污染物。
孔径120允许照射束通过凸起位置112，同时掩模板116阻挡射束照射衬底104的剩下部分。掩模板116可以由金属或者陶瓷材料形成，并可以具有大约500微米至大约1毫米的厚度。孔径120可以具有大约40微米至大约60微米的直径，精密地匹配焊盘108的尺寸。
参照图2，显示具有第一金属粉末128的衬底104的剖视图。第一金属粉末128沉积在衬底104上方以在凸起位置112上方形成基本均一的层。具有孔径136的掩模板132配置在衬底104上方以便掩模板132上方的孔径136与凸起位置112对准。掩模板132可以与图1所述的用于调节照射束124的掩模板116相同。
第一金属粉末128优选包含铜或者高铅焊料并且具有大约5微米至大约10微米的颗粒尺寸。虽然也可以使用其它的粒子尺寸，但应该理解较大的粒子尺寸可以导致较大的凸起尺寸和凸起间距。一般地，但不局限于此，选作第一金属粉末128的金属粉未具有至少大约300摄氏度的熔点。
参照图3，显示在第一金属粉末128的第一照射期间衬底104的剖视图。经掩模板(132或者116)发射第一照射束140，经孔径(136或者12)将射束140导向在第一金属粉末128的被选部分。因而第一金属粉末128的被选部分熔化或者回流以在焊盘108上形成大量第一凸起150。第一照射束140可以是适合于加热和熔化第一金属粉末的任何类型的射束，例如红外光束或者激光束。目前，优选激光束因为它容易聚焦。
参照图4，显示具有配置在衬底104和第一凸起150上的第二金属粉末228的衬底104的剖视图。例如通过喷洒将优选具有比第一金属粉末128更低熔点的第二金属粉末228沉积在第一凸起150上方。一般地，但不局限于此，第二金属粉末228的熔点可以介于大约150摄氏度至大约200摄氏度。
第二金属粉末228可以是具有大约5微米至大约10微米的颗粒尺寸的低共熔焊料(例如，锡铅)，然而，应该理解较大的颗粒尺寸可以导致较大的凸起尺寸和凸起间距。掩模板232配置在第二金属粉末228上方使得掩模板232中的孔经236与第一凸起150对准，在第一凸起150上形成第二凸起250。掩模板232可以与图1描述的掩模板116，或者与如图2描述的掩模板132，或者与两者相同。
参照图5，显示在第二金属粉末228的第二照射期间衬底104的剖视图。通过掩模板(232，132或者116)发射第二照射束240，通过孔径(236，136或者120)将射束240对准在第二金属粉末228的被选部分。因而第二金属粉末228的被选部分熔化或者回流以在第一凸起150上形成大量第二凸起250。因为第二金属粉末228具有比第一金属粉未128低的熔点，当第二金属粉末228熔化或者回流以形成第二组凸起250时第一凸起150不熔化。
第二照射射束240可以是红外光束或者激光束，其将第二金属粉末228加热到它充分熔化以与第一凸起150接合的程度。然后冷却第二凸起250并使其固化。最后，通过例如鼓气或者自旋除去第一和第二金属粉末128a和228a的未融化部分。
在本发明的另一个实施例中，凸起可以形成于提供在焊盘108上的焊垫冶金上。衬垫冶金，又名凸起下金属化(UBM)，保护衬底104并在凸起和外部衬底例如印刷电路板(PCB)之间提供电和机械连接。UBM通常包含通过本领域技术人员熟知的方法在焊盘108上形成的金属连续层。
在另一个实施例中，可以用可编程单激光束替换如上所述用于熔化或者回流金属粉末(128，228)和用于清洁凸起位置112的照射射束。用可编程单激光束，可以将用于熔化金属粉末(128，228)的热量更准确地导向于凸起位置112。因此，可以在不需要掩模板调节受热的情况下有选择地熔化用于形成凸起(150，250)的金属粉末(128，228)的部分。
参照图6，显示根据本发明的一个实施例形成在衬底104的焊盘108上的大量双层金属凸起350的剖视图。每一个双层凸起350包含耦连到焊盘108的第一凸起150，和形成在第一凸起150上并耦连第一凸起150的第二凸起250。在例如倒装片组件中，双层凸起350提供将半导体衬底104电连接到电子组件中的外部衬底的连接器。通常，第一凸起150提供立高而第二凸起250提供焊接接缝形成。
当尽管以在衬底104上形成凸起来描述上述工艺过程，本发明可适用于在PCB衬底上形成互连或者凸起。上述工艺过程也适用于形成具有多于两层凸起的连接器。例如，可以通过在第二凸起250上方沉积第三金属粉末来形成连接器的第三凸起，并有选择地熔化或者回流第三金属粉末的一部分。
本发明特别有利于降低加工成本，因为它需要最少的加工，不涉及湿式化学工艺过程，并且使用可再用的掩模板。如果使用可编程、单激光束以有选择地熔化金属粉末，则可以除去掩模板。
本发明的另一个优点是与单层凸起比较可以通过双或者多层凸起实现高的立高。高温下，硅晶片和凸起经受由于硅晶片中和外表面例如PCB不同的膨胀率引起的热机械应力。不同的膨胀率应归于在不同材料中失配的热膨胀系数(CTE)。过度的应力可以引起硅破裂或者凸起破裂。高的立高释放由CTE失配引起的应力，从而提高凸起接缝的可靠性。
本发明的另一个优点是降低凸起尺寸和凸起间距。通过在第一凸起150上形成第二凸起250，在不增加凸起尺寸或者直径的情况下实现高的立高。随后，这允许依赖所使用的金属粉粒尺寸和掩模板的孔径的分辨率的范围在大约50微米到大约75微米的较低或者较精细的凸起间距。在使用可编程激光束的实施例中，凸起尺寸和间距依赖激光束的分辩率。
考虑说明书和发明的实施，本发明的其他的实施例对本领域的技术人员来说是显而易见的。而且，某些术语被用来描述清楚的目的，而不是限制本发明。如上所述的实施例和优选特征是示范的，用附加权利要求限定本发明。

Claims (20)

1.一种用于在衬底上形成双层凸起的方法，包括：
在衬底上沉积第一金属粉末；
熔化第一金属粉末以形成第一凸起；
在至少第一凸起上方沉积第二金属粉末；和
熔化第二金属粉末以在第一凸起上形成第二凸起，其中第一凸起和第二凸起形成双层凸起。
2.根据权利要求1用于形成双层凸起的方法，其中熔化第一金属粉末还包括：
在衬底上方放置第一掩模板，第一掩模板具有至少一个孔径；和
通过透过该至少一个孔径照射被选的部分熔化第一金属粉末的该被选部分。
3.根据权利要求2用于形成双层凸起的方法，其中熔化第二金属粉末还包括：
在衬底上方放置第二掩模板，第二掩模板具有至少一个孔径；和
通过通过第二掩模板的该孔径照射被选的部分熔化第二金属粉末的该被选部分。
4.根据权利要求3用于形成双层凸起的方法，其中第二金属粉末的熔点低于第一金属粉末的熔点。
5.根据权利要求1的用于形成双层凸起的方法，其中第一金属粉末和第二金属粉末每一种具有大约5微米到大约10微米的颗粒尺寸。
6.根据权利要求5用于形成双层凸起的方法，其中第一金属粉末包含铜和高铅焊料之一，以及第二金属粉末包含低共熔焊料。
7.根据权利要求1用于形成双层凸起的方法，还包含在沉积第一金属粉末之前清洁衬底上的焊盘。
8.根据权利要求7用于形成双层凸起的方法，其中清洁步骤包括照射焊盘以烧除其上的任何污染物。
9.根据权利要求1用于形成双层凸起的方法，其中熔化第一金属粉末还包括用可编程单激光束照射第一金属粉末的一部分。
10.根据权利要求1用于形成双层凸起的方法，还包含除去保留在衬底上的第一和第二金属粉末的任何未熔化部分。
11.一种半导体器件，包括：
具有焊盘的衬底；和
形成在焊盘上的双层凸起，其中该双层凸起包含与焊盘耦连的第一凸起和耦连到第一凸起的第二凸起，其中第二凸起由具有比形成第一凸起的材料低的熔点的材料形成。
12.根据权利要求10的半导体器件，其中通过熔化沉积在衬底上的第一金属粉末形成第一凸起，通过熔化沉积在第一凸起上的第二金属粉末形成第二凸起。
13.根据权利要求12的半导体器件，其中第一和第二金属粉末每一种具有大约5微米到大约10微米的颗粒尺寸。
14.根据权利要求13的半导体器件，其中第一凸起包含铜和高铅焊料之一，第二凸起包含低共熔焊料。
15.根据权利要求13的半导体器件，其中第一金属粉末具有高于大约300℃的熔点。
16.根据权利要求15的半导体器件，其中第二金属粉末具有在大约150℃到大约200℃的熔点。
17.一种用于在衬底上形成多层连接器的方法，包括：
在衬底上沉积第一金属粉末；
照射第一金属粉末的被选的部分以形成第一凸起；
在第一凸起上方沉积第二金属粉末；和
照射第二金属粉末以在第一凸起上形成第二凸起，其中第一凸起和第二凸起形成多层连接器。
18.根据权利要求17的形成多层连接器的方法，其中以被导向通过配置在衬底上的掩模板的孔径的照射射束来照射第一和第二金属粉末。
19.根据权利要求17的形成多层的连接器的方法，其中第二金属粉末的熔点低于第一金属粉末的熔点。
20.根据权利要求17的形成多层连接器的方法，其中第一金属粉末和第二金属粉末每一种具有在大约5微米到大约10微米的颗粒尺寸。
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CN105632910B (zh) * 2015-03-31 2021-04-30 中国科学院微电子研究所 栅导体层及其制造方法

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US20070099413A1 (en) 2007-05-03
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SG131913A1 (en) 2007-05-28
JP5079304B2 (ja) 2012-11-21
TW200725768A (en) 2007-07-01
DE102006051151A1 (de) 2007-06-06
US7279409B2 (en) 2007-10-09
KR101279234B1 (ko) 2013-06-26
KR20070046756A (ko) 2007-05-03

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