CN108701670A - 具有电镀的天线和/或迹线的电子装置及其制造和使用方法 - Google Patents
具有电镀的天线和/或迹线的电子装置及其制造和使用方法 Download PDFInfo
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- CN108701670A CN108701670A CN201680072584.0A CN201680072584A CN108701670A CN 108701670 A CN108701670 A CN 108701670A CN 201680072584 A CN201680072584 A CN 201680072584A CN 108701670 A CN108701670 A CN 108701670A
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- metal layer
- integrated circuit
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- electronic component
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 14
- 238000007747 plating Methods 0.000 title description 19
- 238000002360 preparation method Methods 0.000 title description 2
- 229910052751 metal Inorganic materials 0.000 claims abstract description 180
- 239000002184 metal Substances 0.000 claims abstract description 180
- 239000000758 substrate Substances 0.000 claims abstract description 114
- 238000000034 method Methods 0.000 claims abstract description 43
- 229910052782 aluminium Inorganic materials 0.000 claims description 55
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 55
- 229910052718 tin Inorganic materials 0.000 claims description 50
- 239000011135 tin Substances 0.000 claims description 50
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 47
- 239000004411 aluminium Substances 0.000 claims description 45
- 229910000679 solder Inorganic materials 0.000 claims description 44
- 238000004891 communication Methods 0.000 claims description 22
- 238000007639 printing Methods 0.000 claims description 22
- 239000011888 foil Substances 0.000 claims description 16
- 238000000151 deposition Methods 0.000 claims description 13
- 230000005611 electricity Effects 0.000 claims description 10
- 229910001128 Sn alloy Inorganic materials 0.000 claims description 8
- 230000004888 barrier function Effects 0.000 claims description 7
- 238000009792 diffusion process Methods 0.000 claims description 6
- 238000007654 immersion Methods 0.000 claims description 6
- 229920003023 plastic Polymers 0.000 claims description 6
- 239000004033 plastic Substances 0.000 claims description 6
- 230000008569 process Effects 0.000 claims description 4
- 239000011230 binding agent Substances 0.000 claims description 3
- 238000010438 heat treatment Methods 0.000 claims description 3
- 239000012212 insulator Substances 0.000 claims description 3
- 239000003795 chemical substances by application Substances 0.000 claims 1
- 239000010408 film Substances 0.000 description 29
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 18
- 238000005516 engineering process Methods 0.000 description 17
- 229910052802 copper Inorganic materials 0.000 description 16
- 239000010949 copper Substances 0.000 description 16
- 229920000642 polymer Polymers 0.000 description 15
- 239000000463 material Substances 0.000 description 14
- 238000005530 etching Methods 0.000 description 12
- 229910045601 alloy Inorganic materials 0.000 description 11
- 239000000956 alloy Substances 0.000 description 11
- 239000011521 glass Substances 0.000 description 11
- 230000008021 deposition Effects 0.000 description 10
- 239000000853 adhesive Substances 0.000 description 9
- 230000001070 adhesive effect Effects 0.000 description 9
- 239000000203 mixture Substances 0.000 description 9
- 229920000139 polyethylene terephthalate Polymers 0.000 description 8
- 239000005020 polyethylene terephthalate Substances 0.000 description 8
- 238000005275 alloying Methods 0.000 description 7
- 239000005030 aluminium foil Substances 0.000 description 7
- UHOVQNZJYSORNB-UHFFFAOYSA-N Benzene Chemical compound C1=CC=CC=C1 UHOVQNZJYSORNB-UHFFFAOYSA-N 0.000 description 6
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 6
- 239000003990 capacitor Substances 0.000 description 6
- 239000011112 polyethylene naphthalate Substances 0.000 description 6
- -1 polypropylene Polymers 0.000 description 6
- 229910052709 silver Inorganic materials 0.000 description 6
- 239000004332 silver Substances 0.000 description 6
- 239000004642 Polyimide Substances 0.000 description 5
- 239000004743 Polypropylene Substances 0.000 description 5
- 239000004020 conductor Substances 0.000 description 5
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 5
- 229910052737 gold Inorganic materials 0.000 description 5
- 239000010931 gold Substances 0.000 description 5
- 239000000543 intermediate Substances 0.000 description 5
- 239000002985 plastic film Substances 0.000 description 5
- 229920006255 plastic film Polymers 0.000 description 5
- 229920003207 poly(ethylene-2,6-naphthalate) Polymers 0.000 description 5
- 229920001721 polyimide Polymers 0.000 description 5
- 229920001155 polypropylene Polymers 0.000 description 5
- 229920000219 Ethylene vinyl alcohol Polymers 0.000 description 4
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 4
- 239000011248 coating agent Substances 0.000 description 4
- 238000000576 coating method Methods 0.000 description 4
- 239000004715 ethylene vinyl alcohol Substances 0.000 description 4
- 229920005989 resin Polymers 0.000 description 4
- 239000011347 resin Substances 0.000 description 4
- 239000010935 stainless steel Substances 0.000 description 4
- 229910001220 stainless steel Inorganic materials 0.000 description 4
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 4
- 229910052721 tungsten Inorganic materials 0.000 description 4
- 239000010937 tungsten Substances 0.000 description 4
- 229910052725 zinc Inorganic materials 0.000 description 4
- 239000011701 zinc Substances 0.000 description 4
- 229910000838 Al alloy Inorganic materials 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 230000008901 benefit Effects 0.000 description 3
- 229910052797 bismuth Inorganic materials 0.000 description 3
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 description 3
- RZXDTJIXPSCHCI-UHFFFAOYSA-N hexa-1,5-diene-2,5-diol Chemical compound OC(=C)CCC(O)=C RZXDTJIXPSCHCI-UHFFFAOYSA-N 0.000 description 3
- 229910052738 indium Inorganic materials 0.000 description 3
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 238000003475 lamination Methods 0.000 description 3
- 238000000059 patterning Methods 0.000 description 3
- 239000002243 precursor Substances 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 239000002002 slurry Substances 0.000 description 3
- 239000010409 thin film Substances 0.000 description 3
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 239000011889 copper foil Substances 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 2
- 238000001704 evaporation Methods 0.000 description 2
- 239000002648 laminated material Substances 0.000 description 2
- 238000001459 lithography Methods 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- BDAGIHXWWSANSR-UHFFFAOYSA-N methanoic acid Natural products OC=O BDAGIHXWWSANSR-UHFFFAOYSA-N 0.000 description 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 2
- 150000003839 salts Chemical class 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 230000003746 surface roughness Effects 0.000 description 2
- OSWFIVFLDKOXQC-UHFFFAOYSA-N 4-(3-methoxyphenyl)aniline Chemical compound COC1=CC=CC(C=2C=CC(N)=CC=2)=C1 OSWFIVFLDKOXQC-UHFFFAOYSA-N 0.000 description 1
- 101100094968 Caenorhabditis elegans sam-10 gene Proteins 0.000 description 1
- 206010012735 Diarrhoea Diseases 0.000 description 1
- 101001072091 Homo sapiens ProSAAS Proteins 0.000 description 1
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 1
- 102100036366 ProSAAS Human genes 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 229910010037 TiAlN Inorganic materials 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 239000002318 adhesion promoter Substances 0.000 description 1
- 239000004840 adhesive resin Substances 0.000 description 1
- 229920006223 adhesive resin Polymers 0.000 description 1
- 150000001336 alkenes Chemical class 0.000 description 1
- AZDRQVAHHNSJOQ-UHFFFAOYSA-N alumane Chemical class [AlH3] AZDRQVAHHNSJOQ-UHFFFAOYSA-N 0.000 description 1
- 239000012298 atmosphere Substances 0.000 description 1
- 239000007767 bonding agent Substances 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 150000004696 coordination complex Chemical class 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 239000005357 flat glass Substances 0.000 description 1
- 235000019253 formic acid Nutrition 0.000 description 1
- 238000007641 inkjet printing Methods 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 239000011777 magnesium Substances 0.000 description 1
- 229910052749 magnesium Inorganic materials 0.000 description 1
- WPBNNNQJVZRUHP-UHFFFAOYSA-L manganese(2+);methyl n-[[2-(methoxycarbonylcarbamothioylamino)phenyl]carbamothioyl]carbamate;n-[2-(sulfidocarbothioylamino)ethyl]carbamodithioate Chemical compound [Mn+2].[S-]C(=S)NCCNC([S-])=S.COC(=O)NC(=S)NC1=CC=CC=C1NC(=S)NC(=O)OC WPBNNNQJVZRUHP-UHFFFAOYSA-L 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 239000008188 pellet Substances 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 230000008439 repair process Effects 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 238000007711 solidification Methods 0.000 description 1
- 230000008023 solidification Effects 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 238000012876 topography Methods 0.000 description 1
- 229910021654 trace metal Inorganic materials 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4867—Applying pastes or inks, e.g. screen printing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49855—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q1/00—Details of, or arrangements associated with, antennas
- H01Q1/12—Supports; Mounting means
- H01Q1/22—Supports; Mounting means by structural association with other equipment or articles
- H01Q1/2208—Supports; Mounting means by structural association with other equipment or articles associated with components used in interrogation type services, i.e. in systems for information exchange between an interrogator/reader and a tag/transponder, e.g. in Radio Frequency Identification [RFID] systems
- H01Q1/2225—Supports; Mounting means by structural association with other equipment or articles associated with components used in interrogation type services, i.e. in systems for information exchange between an interrogator/reader and a tag/transponder, e.g. in Radio Frequency Identification [RFID] systems used in active tags, i.e. provided with its own power source or in passive tags, i.e. deriving power from RF signal
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q1/00—Details of, or arrangements associated with, antennas
- H01Q1/36—Structural form of radiating elements, e.g. cone, spiral, umbrella; Particular materials used therewith
- H01Q1/38—Structural form of radiating elements, e.g. cone, spiral, umbrella; Particular materials used therewith formed by a conductive layer on an insulating support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q7/00—Loop antennas with a substantially uniform current distribution around the loop and having a directional radiation pattern in a plane perpendicular to the plane of the loop
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
-
- H—ELECTRICITY
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
-
- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/05624—Aluminium [Al] as principal constituent
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05639—Silver [Ag] as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05647—Copper [Cu] as principal constituent
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05663—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05684—Tungsten [W] as principal constituent
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
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Abstract
本发明公开了一种电子装置及其制造方法。制造电子装置的方法包括在第一衬底上形成第一金属层,在第二衬底上形成集成电路或离散的电子元件,在集成电路或离散的电子元件的输入和/或输出端子上形成电连接器,在第一金属层上形成第二金属层,第二金属层改善第一金属层与集成电路或离散电子元件上的电连接器的粘附和/或电连接性,电连接所述电连接器至第二金属层。
Description
相关申请的交叉引用
此申请要求了美国临时专利申请,申请号62/266,323,提交于2015年12月11日的优先权,其通过引用全文并入在此。
技术领域
本发明通常关于电子装置领域,更具体地,是关于无线通信和无线装置。本发明的实施例关于射频(RF和/或RFID),近场通信(NFC),高频(HF),甚高频(VHF),超高频(UHF)和电子物品监视(EAC)标签和装置,其在天线和/或其他金属迹线上具有一层锡或其他粘着促进金属或合金用于改进所述天线或金属迹线与集成电路或其他电子部件的附着和/或电气连通性,和其制造和使用方法。
背景技术
通常,智能标签有例如印刷集成电路(PIC)、电池和/或显示器组成。因此,组装传统的智能标签需要多种表面安装(例如,SMD或“表面安装装置”)技术和材料,例如,各向异性导电浆料(ACP)和/或焊接。
由于其有限的厚度,传统的印刷背板可能不能满足用于高质量(Q)近场通信(NFC)标签的电阻率要求。在塑料薄膜上的传统蚀刻的铝箔可以提供相对高质量(Q)的NFC标签。然而,组装具有铝迹线的IC和背板的所述方法限制于使用接线柱和/或ACP。
典型的,在塑料薄膜上的蚀刻铜箔或覆盖有铜层的蚀刻铝箔,提供了高质量NFC装置,其能够使用多种组装技术组装。然而,铜是比较贵的,并且与食品不相适。
进一步的,锡浸镀可以在诸如开关或接触器等离散电气部件的铜或铝迹线表面沉积一层薄的锡。然而,使用这种技术来将IC或分立的电气部件组装到底板上的天线和/或金属迹线是未知的。
本“背景技术”部分仅用于提供背景信息。本“背景技术”部分中的陈述不是对本“背景技术”部分中公开的主题构成本公开的现有技术的承认,且本“背景技术”部分中的任何部分都不应视为承认本申请的任何部分(包括本“背景技术”部分)构成本公开的现有技术。
发明内容
本发明关于电子装置,更具地是无线通信和无线装置。本发明的实施例关于射频(RF和/或RFID),近场通信(NFC),高频(HF),甚高频(VHF),超高频(UHF),和电子物品监视(EAS)标签和具有在天线和/或金属迹线上用于改善所述天线和/或迹线至集成电路或其他电子元件的粘贴性和电连接性的锡或其他粘贴促进金属或合金层,和其制造和使用方法。
一方面,本发明关于制造电子装置的方法,其包括,在第一衬底上形成第一金属层,在第二衬底上形成集成电路或分立的电子元件,在所述集成电路或离散电气部件的输入和/或输出端子上形成电连接器,在第一金属层上形成第二金属层,和电连接所述电连接器至第二金属层。第二金属层改进第一金属层至位于所述集成电路或离散电气部件上的电连接器的粘着和/或电连接性。所述电子装置可以是无线通信装置。
在本发明的不同实施例中,所述电子装置可以是无线通信装置。所述无线通信装置可以包括近场、射频、高频(HF)、甚高频(VHF)或超高频(UHF)通信装置。
在本发明的一些实施例中,第一衬底可以包括从聚酰亚胺、聚(乙烯-乙烯醇)、玻璃/聚合物层压体或高温聚合物组成的组中选择的绝缘衬底。高温聚合物可以包括聚对苯二甲酸乙二醇酯[PET]、聚丙烯或聚萘二甲酸乙二醇酯[PEN]。
在本发明典型的实施例中,形成第一金属层可以包括在第一衬底的第一表面上沉积铝层。所述铝层可以具有至少10μm的厚度。在一些实施例中,所述铝层可以被蚀刻用于形成天线和/或迹线。所述天线可以被配置为(i)接收和(ii)发射或广播无线信号。
在本发明的不同实施例中,形成第一金属层可以包括以相应于所述天线和/或迹线的图案在所述衬底上印刷金属墨水,和接下来干燥所述金属墨水和固化所述金属墨水中的金属或金属前驱物。印刷所述金属墨水,干燥所述金属墨水和固化所述金属或金属前驱物可以形成印刷的种子层,所述方法可以进一步包括在印刷的籽晶层上电镀或化学镀覆块状金属。所述天线和/或迹线可以由第一衬底上的单金属层组成。
在本发明的不同实施例中,形成第一金属层可以包括在第一衬底的第一和第二表面上沉积铝层。此外,形成第二金属层可以包括在第一金属层上沉积包含锡或锡合金的层。沉积第二金属层可以包括浸镀过程。在本发明的一些实施例中,第二金属层可以具有从0.1μm到10μm的厚度。
在本发明的示例性实施例中,形成集成电路或离散电子元件可以包括在第二衬底上印刷所述集成电路或离散电子元件的一个或多个层。因此,本发明方法可以形成印刷集成电路,在这种情况下,可以印刷集成电路或离散电气元件的多个层。形成印刷集成电路可以进一步包括通过一个或多个薄膜处理技术形成集成电路的一个或多个层。在一些实施例中,形成集成电路或离散电子元件可以包括通过薄膜处理技术形成集成电路或离散电子元件的多个层。当形成集成电路时,输入和/或输出端子可以形成在集成电路的最上层金属层中。输入和/或输出端子可以包括天线连接焊盘。在本发明的一些实施例中,粘合剂可以沉积在输入和/或输出端子上。粘合剂可以是或包括各向异性导电浆料。
在本发明的各种实施例中,电连接器可包括集成电路的第一输入/输出端子上的第一焊料块或球,集成电路的第二输入/输出端子上的第二焊料块或球。将电连接器与第二金属层电连接可以包括在第二金属层上的第一和第二位置加热和按压第一和第二焊料块或球到第二金属层。第一输入/输出端子可以位于集成电路的第一端,第二输入/输出端子可以位于集成电路的与第一端相对的第二端。
本发明方法可包括在第一衬底上形成一个或多个迹线,并且传感器可连接于一个或多个迹线中的至少一个。在本发明的一些实施例中,可以将电池连接到一个或多个轨迹中的至少一个。在进一步的实施例中,显示器可以连接到一个或多个轨迹中的至少一个。在本发明的示例性实施例中,形成第一金属层和第二金属层也可以形成一个或多个迹线。
在本发明的不同实施例中,离散电子元件可以是或包括电容器、电感器、电阻器或开关。
另一方面,本发明涉及一种电子装置,其包括在其上具有第一金属层的衬底,在第二衬底上的集成电路或离散的电子元件,所述集成电路或离散的电子元件被配置为(i)处理从中产生第一信号和/或信息,以及(ii)产生用于此的第二信号和/或信息,所述集成电路或离散电子元件的输入端和/或输出端上的电连接器,以及第一金属层上的第二金属层,第二金属层被配置为改善第一金属层与所述集成电路或离散电子元件上的电连接器的粘附性和/或电连接性,所述电连接器与第二金属层电连接。第一金属层可以包括天线,电子装置可以是无线通信装置。
在本装置的不同实施例中,所述电子装置是无线通信装置。对于本发明的方法,无线通信装置可以是近场(NFC)、射频(RF)、高频(HF)、甚高频(VHF)或超高频(UHF)通信装置。
在本发明装置的一些实施例中,第一衬底可以包括从聚酰亚胺、聚(乙烯-乙烯醇)、玻璃/聚合物层压体或高温聚合物组成的组中选择的绝缘衬底。对于本发明的方法,高温聚合物可以包括聚对苯二甲酸乙二醇酯[PET]、聚丙烯或聚萘二甲酸乙二醇酯[ PEN]。
在本发明装置的典型实施例中,第一金属层可以包括第一衬底的第一表面上的铝层。所述铝层可以具有至少10µm的厚度。在一些实施例中,第一金属层在所述衬底的第一和第二表面上。第一金属层可以包括天线,和所述天线可以配置为(i)接收,和(ii)发射或广播的无线信号。所述天线可能主要由单一单金属层组成。在本发明装置的不同实施例中,第二金属层可以包括一层锡或锡合金层。作为本发明的方法,所述锡层或锡合金层可以具有从0.1µm到10µm的厚度。
在本发明的一些实施例中,第二衬底可以包括其上具有扩散阻挡层和/或绝缘体膜的金属箔。所述金属箔可以包括铝或不锈钢箔。或者,第二衬底可以包括塑料。塑料可以包括聚对苯二甲酸乙二醇酯(PET)、聚丙烯、聚(乙烯乙烯醇)或聚萘二甲酸乙二醇酯(PEN)。
在不同实施例中,所述集成电路可以包括接收器和发射器。发射器可以包括调制器,并且接收器可以包括解调器。在一些实施例中,所述集成电路或离散电子元件可以包括一个或多个印刷层。例如,本发明的装置可以包括印刷集成电路,并且印刷集成电路可以包括多个印刷层。在其他或进一步的实施例中,所述集成电路可以包括一个或多个薄膜。例如,所述集成电路可以包括多个薄膜。当所述装置包括集成电路时,输入和/或输出端可以位于所述集成电路的最上层金属层中。所述输入和/或输出端子可以包括天线连接焊盘。通常,所述输入和/或输出端子可以包括铝、钨、铜、银或它们的组合。
在不同实施例中,所述电连接器可包括集成电路的第一输入和/或输出端上的第一焊料块或球,以及集成电路的第二输入和/或输出端上的第二焊料块或球。在一些实施例中,粘合剂可以在第一和第二输入和/或输出端子上。粘合剂可以包括各向异性导电浆料。在进一步的实施例中,输入/输出端子可以位于集成电路的第一端,并且第二输入/输出端子可以位于集成电路与第一端相对的第二端。
在本发明不同的实施例中,离散的电子元件可以包括电容器、电感器、电阻器或开关。另外或替代地,本发明的装置可以包括在第一衬底上的传感器,该传感器可以电连接到集成电路或离散的电子元件。在一些实施例中,该装置可以包括在第一衬底上的电池,该电池可以电连接到所述集成电路或离散的电子元件。在进一步或其他实施例中,该装置可以包括在第一衬底上的显示器,该显示器可以电连接到集成电路、电池或离散的电子元件。在本发明的一些实施例中,第一和第二金属层可以包括一个或多个迹线,其将传感器、电池或显示器电连接到集成电路或离散的电子元件。
本发明有利地改善了背板上的天线或金属迹线的机械平滑性,以及天线或迹线与集成电路或离散电子元件之间的电接触。此外,本发明降低了某些电子装置的成本和制造时间,该电子装置例如智能标签和NFC、RF、HF和UHF标签,并且与食品相适。从下面的不同实施例的详细描述中,本发明的这些和其它优点将变得显而易见。
附图说明
图1示出了根据本发明的一个或多个实施例的用于在天线和/或金属迹线上制造具有锡或其他粘着促进金属或合金层的电子装置(例如,无线通信设备)的示例性方法的流程图。
图2A-2D示出示例性方法中的示例性中间体的截面图,图2E-2F示出了根据本发明的一个或多个实施例的具有在天线和/或金属迹线上的锡或其它附着促进金属或合金层的示例性电子装置的横截面视图。
图3A- 3D示出了另一示例性方法中的示例性中间体的截面图,图3E示出了另一个示例性电子装置的横截面视图,该电子装置具有根据本发明的一个或多个实施例的具有在天线和/或金属迹线上的锡或其它附着促进金属或合金层。
具体实施例
下文将对本发明的各个实施例进行详细介绍,其示例将通过附图举例阐明。虽然本发明将结合下文的实施例进行描述,应当理解的是,这些说明并不是为了将本发明限制在这些实施例中。相反,本发明旨在涵盖那些可能包括在本发明的主旨和范围内的替换、修改和等同物。而且,在下文的详细说明中,对许多具体细节进行了阐明以便于对本发明的彻底理解。然而,对本领域的技术人员来说显而易见的是,本发明可以不采用这些具体细节来实施。在其他实例中,没有详细描述众所周知的方法、程序、部件、和材料以免本发明的相关方面被不必要地掩盖。
本发明的实施例的技术方案将结合下文的实施例的附图进行全面和清楚地描述。应当理解的是,这些描述并不是为了将本发明限制在这些实施例中。基于本发明已描述的实施例,本领域的技术人员能够在不做出创造性贡献的情况下获得其他实施例,而这些都在本发明所获取的法律保护范围之内。
而且,本文公开的所有的特征、措施或处理(除非特征和/或处理相互排斥)能够以任意方式结合并结合成任何可能的组合。除非另有说明,本说明书、权利要求书、摘要、和附图中公开的特征能够被其他等效特征或具有相似目标、目的和/或功能的特征替代。
本发明有利地改善了背板上的天线或金属迹线的机械平滑性,以及天线或迹线与集成电路之间的电接触。此外,本发明降低了诸如智能标签和NFC、RF、HF和UHF标签等电子设备的成本和处理时间,并且与食品兼容。
制造电子装置的典型方法
本发明涉及一种制造电子装置的方法,包括在第一衬底上形成第一金属层,在第二衬底上形成集成电路或离散电子元件,在集成电路或离散电子元件的输入和/或输出端上形成电连接器,在第一金属层上形成第二金属层,并电连接电连接器到第二金属层。第二金属层改善第一金属层与集成电路或离散电子元件上的电连接器的粘附性和/或电连接性。所述电子装置可以是无线通信装置。在不同实施例中,无线通信和无线装置包括射频(RF和/或RFID)、近场通信(NFC)、高频(HF)、甚高频(VHF)、超高频(UHF)或电子物品监视(EAS)标签和/或装置。在一个示例中,该设备是NFC装置,例如NFC标签、智能标签或智能标识。
图1示出了根据本发明一个或多个实施例的用于制造电子装置(例如,无线通信装置,更具体地是NFC/RF标签)的典型方法,所述电子装置具有在天线或金属迹线上的锡或其他粘附促进金属或合金层。所述锡(或其他第二金属)层有利地改善了天线或迹线与集成电路或离散电子元件的粘附和/或电连接性。
在20,在第一衬底上形成第一金属层。形成第一金属层可以包括在第一衬底的第一表面上沉积铝层(例如铝箔)。铝层可以涂覆或层压在第一衬底(例如,无线或显示器底板)上,然后蚀刻以形成天线和/或迹线。通常,铝层具有至少10μm的厚度。铝层还可以包括铝合金(例如,0.1至5重量或原子百分比的一种或多种铜、锡、硅等)。在一些实施例中,在第一衬底上形成至少一个迹线。通常,当在第一衬底上形成至少一个迹线时,形成多个金属迹线。形成第一金属层可以进一步包括蚀刻涂覆或层压的铝层以在背板上形成天线和/或一个或多个迹线。通常,天线被配置为(i)接收和(ii)发射或广播无线信号,并且所述迹线被配置为将电子装置(例如,IC或电子元件)电连接到一个或多个其它元件(例如,电池、显示器、一个或多个传感器,等等)。
在一些实施例中,形成天线和/或迹线可以包括在第一衬底上形成单个金属层、图案化金属层、以及蚀刻单个金属层以形成天线和/或迹线。可选地,形成天线和/或迹线可以包括以对应于天线和/或迹线的图案在第一衬底上印刷金属墨水,然后干燥墨水并固化墨水中的金属或金属前驱体。可选地,该方法可以进一步包括减少金属墨水中的金属前驱物如金属盐或金属络合物(例如,通过在还原气氛中固化金属盐或络合物,例如形成气体)。另外或替代地,可以在印刷金属种子层上电镀或化学镀块状金属。用于HF器件的示例性天线厚度可以是约20μm至50μm(例如,约30μm),并且对于UHF器件而言,可以是约10μm至约30μm(例如,约20μm)。
在进一步的实施例中,在第一衬底的第一表面和第二表面上沉积和/或层压铝层。在第一衬底的第二表面上的铝层可以被毯式沉积(例如,涂覆和/或层压)在衬底上。或者,可以蚀刻第二表面上的铝层以形成与第一衬底的第一表面上的天线/迹线类似的天线和/或迹线。在沉积铝层之前,可以在第一衬底中形成一个或多个通道,以在衬底的第一表面上的天线和/或迹线之间提供电连接,并且提供在衬底的第二表面上天线和/或迹线。
在不同实施例中,第一衬底可以包括绝缘衬底(例如,塑料膜或玻璃)。例如,绝缘基底可以包括聚酰亚胺、玻璃/聚合物层压材料或高温聚合物。高温聚合物可以由聚对苯二甲酸乙二醇酯[PET]、聚丙烯或聚萘二甲酸乙二醇酯[PEN]组成。
在30处,在第一金属层上形成第二金属层。通常,形成第二金属层包括在第一金属层上沉积包含或基本上由锡组成的层。例如,包含锡的层可以基本上由锡合金(例如,锡与一种或多种合金化金属或从铋、银、铜、锌和铟中选择的元素)组成。在一个实施例中,锡可以镀在图案化的铝上。优选地,镀锡层包括浸镀工艺。含锡层可以具有0.1μm至10μm的厚度,或其中任何厚度或厚度范围。第二金属层也可以与第一金属形成合金或金属间界面。
在40,在第二衬底上形成集成电路或离散电子元件。在各种实施例中,集成电路可以包括薄膜集成电路或印刷集成电路(例如,不包括形成在单片单晶硅晶片或芯片上的电路),并且离散电子元件可以包括或由电容器、电感器,电阻器,开关等组成。
在不同的实施例中,第二衬底可以包括绝缘衬底(例如,塑料薄膜或玻璃)。例如,绝缘衬底可以包括聚酰亚胺、玻璃/聚合物层压材料或高温聚合物。高温聚合物可以由聚对苯二甲酸乙二醇酯[PET]、聚丙烯或聚萘二甲酸乙二醇酯[PEN]组成。或者,第二衬底可以包括金属片、薄膜或箔或其层压体。例如,金属衬底可以包括金属箔,例如铝或不锈钢箔,其上具有一个或多个扩散阻挡层和/或绝缘膜。在一个示例中,不锈钢箔可以具有一个或多个扩散阻挡膜,例如在其上的单个或多层TiN、AlN或TiAlN膜,以及在扩散阻挡膜上的一个或多个绝缘体膜,例如二氧化硅、氮化硅和/或氮氧化硅。扩散阻挡膜可以具有从300埃到5000埃(例如,300~950埃,或任何厚度或在300埃和5000埃之间厚度范围)的组合厚度,并且绝缘膜可以具有从200到5000埃的组合厚度(例如,250-2000埃,或任何厚度或在200~5000埃间的厚度范围)。绝缘膜可以具有足以将形成在其上的电气器件与底层金属衬底和扩散阻挡层电绝缘的厚度。
形成集成电路或离散电子元件可包括在第二衬底上印刷集成电路或离散电子元件的一个或多个层。通过印刷形成的一个或多个层的集成电路可以被认为是印刷集成电路或PIC。
在典型的方法中,可以印刷集成电路的多个层,其中最底层(例如,最下面的绝缘体、导体或半导体层)可以印刷或以其他方式形成在第二衬底上。有利地,印刷最底层的材料以减少与第二衬底上的集成电路层的地形变化有关的问题。或者,可以打印不同的(例如,较高)层。印刷提供了比光刻图案化处理的优点,例如低的设备成本、更大的吞吐量、减少的浪费(因此,“绿色”的制造工艺)等,这对于较低的晶体管计数设备如NFC、RF和HF标签来说是理想的。
在一些实例中,输入和/或输出端子可以通过印刷技术(例如丝网印刷、喷墨印刷、凹版印刷等)形成在集成电路的最上层。第一输入端和/或输出端可以位于集成电路的第一端,第二输入端和/或输出端可以位于集成电路的与第一端相反的第二端。在示例性实施例中,输入和/或输出端子包括第一和第二天线连接焊盘。输入和/或输出端子的材料可以包括铝、钨、铜、银等,或者它们的组合(例如,铝垫上的钨薄膜)。
可替代地,该方法可以通过一个或多个薄膜处理技术形成集成电路的一个或多个层。薄膜处理也具有相对低的拥有成本,并且是一种相对成熟的技术,这可以导致在各种可能的衬底上制造合理可靠的器件。因此,在一些实施例中,该方法可以包括通过薄膜处理技术(例如,毯式沉积、光刻图案化、蚀刻等)形成集成电路的多个层。在另一个示例中,输入和/或输出端子可以通过薄膜处理形成在集成电路的最上层。
在一些实施例中,可以使用印刷和薄膜处理二者,并且该方法可以包括通过薄膜处理形成集成电路的一个或多个层,并印刷集成电路的一个或多个附加层。在一些实施例中,可以在第二衬底上形成多个集成电路。
在50,可以在集成电路的输入端和/或输出端上形成电连接器。电连接器可以例如通过印刷(例如,丝网印刷)将电导体材料的浆料印刷到输入和/或输出端子上。在不同的示例中,电连接器可以包括集成电路的输入端和/或输出端上的焊料块或焊料球。焊料块或焊料球材料可以包括焊料合金(例如,锡和一种或多种合金元素),其沉积在输入和/或输出端子上。合金元素可以从铋、银、铜、锌和铟中选择。焊料块或焊料球可以进一步包含粘合剂树脂,该粘合剂树脂可以通过加热(例如,到回流焊温度或更低)来活化,例如环氧树脂。包括焊料合金和树脂的一些材料包括SAM树脂(例如,SAM10树脂,可从日本大阪的Tamur公司获得)和/或具有焊料的自对准粘合剂(SAAS)和/或SAM树脂,其可从日本东京的松下公司;日本新潟的Namics公司,和日本东京的Nagase&有限公司获得。
典型地,第一焊料块或焊料球位于第一输入和/或输出端子上,第二焊料块或焊料球在第二输入和/或输出端子上的因此,焊料块或焊料球可以用来有利地将集成电路或印刷集成电路连接到第一和第二金属(例如,镀锡或镀锡铝)层的组合。在另一个实施例中,ACP可以沉积在焊料块或焊料球和/或输入端和/或输出端的上不被焊料块或焊料球覆盖的区域,以进一步粘附和/或电连接所述IC至天线和/或迹线。
在60处,电连接器连接到第二金属层。将电连接器与第二金属层电连接可以包括在第二金属层上的第一和第二位置加热和按压第一和第二焊料块或球到第二金属层。可以使用传统的键合器(例如,可以从德国罗丁的Muhlbauer 高科技国际获得),压力约为0.1N至约50N(例如,约1N),用于具有约0.5平方毫米至约10平方毫米(例如,1.5平方毫米至约5平方毫米,在一个例子中,大约2.25平方毫米)的第二衬底。当天线包括块状铝层时,第二衬底上的IC或离散电子元件可以被加热的按压工具压入天线(在第一衬底上)。因此,可选地,可以使用热能头同时将压力和热施加到第一和第二衬底上。目标温度一般取决于衬底材料,但一般可以从50°C到约400°C。例如,当使用PET衬底时,应该使用190℃的最高温度。然而,190°C也可以是固化某些粘合剂的最低温度,在这种情况下,可以使用耐高温的基材。
在将电连接器连接到第二金属层之前,粘合剂可沉积在第二金属层上。例如,粘合剂可以包括各向异性导电浆料。
当在第一衬底上形成金属迹线时,传感器、电池和/或显示器可附接到一个或多个迹线(如可以是IC),并电连接到集成电路。通常,传感器、电池和/或显示器中的每一个都连接到唯一的迹线或一组迹线,每个迹线还连接到IC的一个或多个唯一输入和/或输出端。所述迹线可以由第一或第二金属层形成。此外,除了传感器、电池和/或显示器之外的其他组件可以使用各种表面安装器件(SMD)附着技术中的任何一种附着到衬底和/或锡或铝层上。
典型的电子装置(和)用于制造其的方法的中间体
根据本发明的一个或多个实施例, 图2A-2D显示了典型的方法中的典型中间体的平面和剖视图,图2E-2F示出了具有在铝天线上有锡的表面层的示例性电子装置的平面图和剖视图。电子元件通常包括其上具有第一金属层(例如,铝)的衬底,在第二衬底上的集成电路或离散电子元件,集成电路或离散电子元件被配置为(i)处理由此产生的第一信号和/或信息,以及(ii)产生用于此的第二信号和/或信息,集成电路或离散电子元件的输入端和/或输出端上的电连接器,以及第一金属层上的第二金属层,第二金属层配置成改善第一金属层与电连接器的粘着和/或电连接性,电连接器与至少第二金属层电连接。在一些实施例中,集成电路可以包括薄膜集成电路或印刷集成电路(例如,不包括形成在单片单晶硅晶片或芯片上的电路),并且离散电子元件可以包括或包括电容器、电感器、电阻器、开关等。在进一步或其他实施例中,电子装置是无线通信装置。
图2A示出了其上具有第一金属层120的第一衬底110。在各种实施例中,第一衬底110可以包括绝缘衬底(例如,塑料薄膜或玻璃)。例如,绝缘衬底110可以包括聚酰亚胺、玻璃/聚合物层压材料或高温聚合物。高温聚合物可以由聚对苯二甲酸乙二醇酯[PET]、聚丙烯或聚萘二甲酸乙二醇酯[PEN]组成。
在各种实施例中,第一金属层120可以包括在第一衬底110的第一表面上的图案化的铝层(例如,图案化的铝箔)。铝层可以基本上由元素铝组成,或者可以包括或基本上由铝合金构成(例如,铝与一种或多种合金元素如铜、钛、硅、镁、锰、锡、锌等)。通常,铝层120具有至少10μm的厚度。
图2B示出了由图2A的第一金属层120形成的天线120。通常,天线120被配置为(i)接收和(ii)发射或广播无线信号。在一些实施例中,天线120可以由第一衬底110上的单个金属层组成。用于HF器件的示例性天线厚度可以是约20μm至50μm(例如,约30μm),并且对于UHF器件而言,可以是约10μm至约30μm(例如,约20μm)。虽然图2B示出了具有四个环路的螺旋天线,但是螺旋天线可以超过四个环路或小于四个环路,并且天线可以具有几种形式,例如蛇形、片状或块(例如,正方形或矩形)等。
在不同实施例中,天线120可以是印刷天线(例如,使用印刷导体,例如,但不限于,来自铜浆或墨水的铜)或毯式沉积和蚀刻的天线(例如,通过在衬底上溅射或蒸发铝形成的,例如塑料膜或片材,通过在其上印刷抗蚀剂或通过低分辨率[例如,10-1000μm线宽]光刻,以及使用图案化的抗蚀剂作为掩模的湿法或干法蚀刻来图案化)。或者,天线可以包括层压金属箔或在印刷的种子金属层上镀覆的块状金属。叠层金属箔可以包括铝或铜箔。块状镀覆金属可以包括在印刷的锡、铝或钯籽晶层上的铜。或者,天线可以包括印刷银天线。印刷天线(和/或任何可能存在的铝迹线)可以具有从约50 µm到约5000µm的线宽,并且可以具有与毯式沉积和光刻限定和蚀刻的天线不同的晶体形态(例如,结晶度),与毯式沉积和光刻限定和蚀刻的天线相比更圆的截面,和/或其表面粗糙度、边缘均匀性和/或线宽均匀性通常大于毯式沉积和光刻限定和蚀刻的天线。所述天线120可以具有与多个形状因子中的任意一个匹配的大小和形状,同时保持与目标频率或由一个或多个行业标准(例如,NFC读取器硬件的13.56 MHz目标频率)指定的频率的兼容性。
图2C示出了图2B中沿A—A线的截面图,其中第二金属层130位于第一金属层120上。在示例性实施例中,第二金属层130包括在第一金属层(例如,铝层)120上的锡层。在一个实施例中,通过浸镀工艺沉积锡层130。或者,可以印刷锡层。在各种实施例中,锡层可以包括或基本上包括锡合金,如本文所述。第二金属层130可以具有0.1μm至10μm的厚度。
图2D示出在第二衬底140上的集成电路150。在各种实施例中,第二衬底140包括金属箔。在一个例子中,金属箔包括不锈钢箔,如本文所述。或者,如本文所述,第二衬底可以包括塑料膜或玻璃片或条。当集成电路是无线通信装置时,集成电路150可以包括接收器和/或发射器。发射器可以包括调制器,其被配置为产生由无线通信装置广播的无线信号,接收器可以包括解调器,该解调器被配置为将接收到的无线信号转换成一个或多个电信号(例如,由所述集成电路150所处理)。
在一些实施例中,集成电路150可以包括一个或多个印刷层。这样的层具有印刷材料的特性,如更大的尺寸变化性,厚度作为距离印刷结构的边缘的函数变化(例如增加)、相对高的表面粗糙度等。另外和/或可选的,所述集成电路150可以(进一步)包括一个或多个薄膜(例如,多个薄膜)。
在典型实施例中,集成电路150的最上层金属层可以包括输入端和/或输出端。可选地,离散电子元件还可以包括电连接到离散电子元件的电极或电极端子的输入端和/或输出端。在不同的实施例中,输入和/或输出端子可以包括天线连接焊盘(155a、155b)。天线连接焊盘155a、155b可以包括铝、钨、铜、银等,或者它们的组合,并且可以在其上具有一个或多个阻挡层和/或粘着促进层。例如,天线连接焊盘155a、155b可以包括其上的具有薄钨粘附和/或氧化阻挡层的块状铝层。
图2E示出连接到第一衬底110上镀锡天线120的位于第二衬底140上的集成电路150。在一些实施例中,电连接器157a、157b可以在集成电路150的输入和/或输出端上。第一输入端和/或输出端155a可以位于集成电路150的第一端,第二输入和/或输出端155b可以位于集成电路150上与第一端相反的第二端。在示例性实施例中,第一和第二天线连接焊盘155a、155b和集成电路150电连接天线120的端部。由此,第二衬底140可以充当桥接天线120的端部的内插器,并且为电连接到天线120的端部的电子元件提供绝缘机械支撑。
图2F显示了沿图2E的B-B′线的横截面,其中所述镀锡天线120/130连接到所述集成电路150,包括输入端和/或输出端155a、155b上的电连接器157a、157b。所述电连接器157a、157b可以包括在所述集成电路150的输入端和/或输出端155a、155b上的焊料块或焊球。焊料块或焊料球157a、157b可以包括在输入和/或输出端子155a、155b上的焊料合金(例如,锡和一种或多种如本文所述的合金元素)。例如,用于锡的合金元素可以从铋、银、铜、锌和铟中选择。通常,第一焊料块或焊球157a位于第一输入和/或输出端155a上,第二焊料块或焊球157b位于第二输入和/或输出端155b上。
将所述集成电路150放置在镀锡天线120/130上或上方的方法包括但不限于,拾取和放置或卷到卷处理。将所述集成电路150连接到镀锡天线120/130的方法包括但不限于,卷曲和/或将粘合剂浆料如各向异性导电浆糊(ACP)施加到天线连接焊盘155a、155b焊料和其上的任何焊料块157a、157b和/或非导电浆料(NCP)在除了天线连接焊盘155a、155b以外的区域中的所述集成电路150上。该方法还可以包括向所述镀锡天线120/130和所述集成电路150施加压力,或者将压力和热施加到镀锡天线120/130 和所述集成电路150,如本文所述。
在一些实施例中,至少一个迹线(未示出)也在第一衬底110上。传感器、电池和/或显示器(未示出)可以附着在一个或多个迹线上并电连接到所述集成电路150(并且,可选地,电连接至其他传感器、电池和/或显示器,如电池)。所述迹线可以由第一金属层120和可选地第二金属层130形成。所述传感器可被配置为感测环境参数,例如温度或相对湿度,或所述背板110、IC 150和传感器所附着其上的封装的连续状态。所述显示器可以是相对简单的单色显示器,被配置为显示相对简单的数据(例如,对应于感测参数的2位或3位数值)和/或有限数量的消息中的一个(例如,“有效”或“无效”,其取决于参数值相对于预定最小或最大阈值,或“密封”或“打开”,其取决于封装的连续状态)。此外,除了所述传感器、电池和/或显示器之外的其他元件可以使用多种SMD技术中的任何一种附着到衬底和/或镀锡铝层120/130。
图3A- 3D示出了另一典型过程中其他典型中间体的截面图,并且图3E示出了根据本发明的一个或多个实施例的另一个典型电子装置的横截面视图,该电子装置具有在铝天线上的锡表面层。所述电子装置一般包括具有在第一表面上的第一金属层(例如,铝)222和在相对表面上的另一第一金属层226的衬底,在第二衬底上的集成电路或离散的电子元件150,其被配置为(i)处理由此的第一信号和/或信息,以及(ii)产生为此的第二信号和/或信息,集成电路或离散电子元件的输入端和/或输出端上的电连接器157a~b,和在第一金属层222上的第二金属层230,所述第二金属层230配置为改善第一金属层222与电连接器157a~b的粘合性和/或电连接性,电连接器157a~b电连接到至少第二金属层230。在不同实施例中,集成电路可以包括薄膜集成电路或印刷集成电路,且所述离散电子元件可以包括或由电容器、电感器、电阻器、开关等组成。在进一步或其他实施例中,所述电子装置是无线通信设备。
图3A显示了具有分别位于所述衬底210的第一和第二表面上的第一金属层(例如,铝层)220、225的第一衬底210。第一金属层220和/或225可以包括图案化或毯式铝层(例如,图案化的或非图案化的铝箔)。在不同实施例中,所述铝层220和/或225可以主要由元素铝组成或可以包括或主要由铝合金组成,如在此所述的。通常,所述铝层220和/或225具有至少10μm的厚度。在不同实施例中,第一衬底210可以包括绝缘衬底(例如,塑料薄膜或玻璃),如本文所述。在进一步的实施例中,第一衬底210可以包括与食品相容的绝缘基底,例如聚(乙烯乙烯醇)(例如从日本东京的KuraRay有限公司商业上可以获得的EVAL膜)。
图3B显示了天线和/或迹线222,其由第一衬底210的第一表面上的图3A的第一金属层形成。通常,所述天线222配置为(i)接收和(ii)发射或广播无线信号。
在一些实施例中,所述天线222可以由在第一衬底210的第一表面上的单金属层组成。所述天线222可以具有各种形状或形式,包括螺旋形、蛇形、片状或块状,并且当它是螺旋状时,它可以具有任意数量的环(例如,至少2, 4, 6、8等)。在一个实施例中,第一衬底210的第二(相对)表面上的第一金属层225是通过溅射或蒸发(例如)形成的毯式沉积膜225。所述金属层225通常涂覆或层压绝缘衬底210。
在不同的实施例中,第一金属层222可以包括在第一衬底210的第一表面上的图案化的铝层(例如,图案化的铝箔)。如本文所述,所述天线222可以是印刷天线或毯式沉积和图案化天线。所述印刷天线(和/或任何可能存在的铝迹线)222可以具有从大约50μm到大约5000μm的线宽,并且可以具有与本文所描述的毯式沉积,光刻定义和蚀刻的天线不同的结晶度和/或薄膜形态。所述天线222可以具有与多个形状因子中的任意一个匹配的尺寸和形状,同时保持与目标频率或由一个或多个行业标准(例如,NFC读取器硬件的13.56 MHz目标频率)指定的频率的兼容性。
在另一个实施例中,图3C示出了从图3A- B的第一金属层225(例如,通过图案化和蚀刻)或通过直接印刷到衬底210的第二表面上形成在第一衬底210的第二表面上的天线和/或迹线226。在这样的实施例中,在形成天线和/或迹线222之前,可以在第一衬底210中形成一个或多个通道224,以在第一衬底210的第一表面上的所述天线和/或迹线222和第一衬底210第二表面上的所述天线226之间提供电连接。
典型的,所述天线226配置为(i)接收和(ii)发射或广播无线信号,或者单独的(当通过一个或多个[通常两个]通道224耦合到第一衬底210的第一表面上的迹线222)或者与天线222一起(当通过一个或多个[通常两个]通到224耦合到第一衬底210的第一表面上的天线222时)。在一些实施例中,天线226可以由在第一衬底210的第二表面上的单个金属层组成。所述天线226可以是各种形状或形式,包括螺旋形、蛇形、片状或块状,并且当它是螺旋状时,它可以具有任意数量的环,如本文所述。
在不同实施例中,所述天线226可以是印刷天线或毯式沉积和图案化的天线,如在此所述的。所述印刷天线(和/或任何可能存在的铝迹线)226可以具有大约50μm到大约5000μm的线宽,和可以具有与在本文中所描述的毯式沉积的光刻限定的和蚀刻的天线所不同的结晶度和/或薄膜形态。所述天线226可以具有与多个形状因子中的任意一个匹配的尺寸和形状,同时保持与目标频率或由一个或多个行业标准(例如,NFC读取器硬件的13.56 MHz目标频率)指定的频率的兼容性。
图3D显示了在所述衬底210的第一表面上的所述天线222上的典型的的金属层230。在典型的实施例中,第二金属230包括在第一金属(例如铝)层220上的锡层,如在此所述的。例如,锡不象铜一样氧化,因此它不需要有机铜保护(OCP),它限制了SMD加工中使用的导电材料的类型,以保护底层金属的表面(例如,第一金属层222)。此外,锡是一种相对低成本的金属,并且与食品相容。因此,本发明降低了诸如智能标签和NFC、RF、HF和UHF标签等电子设备的成本和处理时间,并且与食品兼容。
在不同的实施例中,第二金属层230是在第一衬底210的第一表面上。在一实施例中,第二层230是通过浸镀过程沉积的。可选的,第二金属层230可以是印刷的。当第二金属层230包括锡,其可以包括或实质由锡合金组成,如在此所述的。第二金属层230可以具有0.1µm 到10µm的厚度。第二金属层230可以形成在图案化的第一金属层222和226上,但是当IC或离散电子元件附着到所述衬底210的单一表面上是,第二金属层230可以仅形成在所述衬底210的一侧或表面上。
图3E显示了在图2D-2F的第二衬底140上的集成电路或离散电子元件150,其连接至在第一衬底210上的镀锡天线222/230。在一些实施例中,电连接器157a,157b可以是在所述集成电路或离散电子元件150的输入和/或输出端子上,如在此所述。所述集成电路或离散电子元件150能够使用螺柱凸块和ACP或印刷凸块和ACP连接到涂覆的天线或迹线222/230。因此,所述电连接器157a、157b可以包括焊料块或焊料球,它们可以印刷在所述集成电路150的输入端和/或输出端上,如本文所述。所述焊料块或焊料球157a、157b可以包括在所述输入和/或输出端子上的焊料合金(例如,锡和一或多合金元素,如在此所述的),如在此所述。
在一些实施例中,至少一迹线(未示)也位于第一衬底210上。传感器、电池和/或显示器(未示)可以粘着至一或多个迹线和电连接至所述集成电路或离散电子元件150,如在此所述的。
结论
本发明的电子装置和其制造方法优选地改进了通常用于在薄膜或印刷集成电路背板上的天线和迹线的金属的机械平滑度(例如,附着力)和电接触或连接。本发明的其他优点包括如下。由于相对厚的铝天线,可以形成高Q NFC器件。使用锡焊料或任何其它导电材料形成铝天线或迹线与薄膜或印刷IC之间的接触相对容易。因此,各式各样的元件,例如离散的电容器、电感器或开关,可以用焊料组装,这是坚固和可靠的。进一步的,其他元件,例如需要低温处理的其他部件,如电池、传感器或显示器,可以用各种导电粘合剂附着。
基于图示和说明的目的提供了前述的本发明具体实施方式的描述。其不是穷尽性的或意图将本发明限制在这些已公开的确切形式。所选择和描述的实施例是为了最好地解释本发明的原则及其实际应用。其应理解为本发明的范围由附于本文的权利要求及其等同物界定。
Claims (20)
1.一种制造电子装置的方法,包括:
a)在第一衬底上形成第一金属层;
b)在第二衬底上形成集成电路或离散的电子元件;
c)在所述集成电路或所述离散的电子元件的输入和/或输出端子上形成电连接器;
d)在第一金属层上形成第二金属层,所述第二金属层改进第一金属层至所述集成电路或所述离散电子元件上的电连接器的粘着和/或电连接性;和
e)电连接所述电连接器至第二金属层。
2.根据权利要求1所述的方法,其特征在于:形成第一金属层包括在第一衬底的第一表面上沉积铝层。
3.根据权利要求1所述的方法,其特征在于:形成第二金属层包括在第一金属层上沉积包含锡或锡合金的层。
4.根据权利要求3所述的方法,其特征在于:沉积第二金属层包括浸镀过程。
5.根据权利要求1所述的方法,其特征在于:形成所述集成电路或离散电子元件包括在第二衬底上印刷一或多层的集成电路或离散电子元件。
6.根据权利要求1所述的方法,包括形成所述集成电路,和进一步包括形成所述集成电路的最上层金属层中形成所述输入和/或输出端子。
7.根据权利要求6所述的方法,还包括在所述输入和/或输出端子上沉积粘合剂。
8.根据权利要求1所述的方法,其特征在于:所述电连接器包括在所述集成电路的第一输入和/或输出端子上的第一焊料块或球,和在所述集成电路的第二输入和/或输出端子上的第二焊料块或球。
9.根据权利要求8所述的方法,其特征在于:电连接所述电连接器至所述第二金属层包括在第二金属层上的第一和第二位置加热和压紧第一和第二焊料块或球至第二金属层。
10.一种电子装置,包括:
a)衬底,其上具有第一金属层;
b)在第二衬底上的集成电路或离散电子元件,所述集成电路或所述离散电子元件被配置为(i)处理由此的第一信号和/或信息,和(ii)产生为此的第二信号和/或信息;
c)在所述集成电路或所述离散电子元件的输入和/或输出端子上的电连接器;和
d)在第一金属层上的第二金属层,所述第二金属层配置为改善所述第一金属层至所述集成电路或所述离散电子元件上的电连接器的粘着和/或电连接性,所述电连接器电连接至所述第二金属层。
11.根据权利要求10所述的装置,其特征在于:所述电子装置时无线通信装置。
12.根据权利要求10所述的装置,其特征在于:第一金属层包括在第一衬底的第一表面上的铝层。
13.根据权利要求10所述的装置,其特征在于:第二金属层包括锡层或锡合金层。
14.根据权利要求10所述的装置,其特征在于:第二衬底包括(i)金属箔,其上具有扩散阻挡层和/或绝缘体膜,或(ii)塑料。
15.根据权利要求10所述的装置,其特征在于:所述集成电路或离散电子元件包括一或多印刷层。
16.根据权利要求10所述的装置,包括所述集成电路,其特征在于:所述输入和/或输出端子是在所述集成电路的最上层的金属层中。
17.根据权利要求10所述的装置,其特征在于:所述电连接器包括在第一输入和/或输出端子上的第一焊料块或球,和在第二输入和/或输出端子上的第二焊料块或球。
18.根据权利要求17所述的装置,还包括在第一和第二输入和/或输出端子上的粘合剂。
19.根据权利要求10所述的装置,还包括在第一衬底上的传感器,电连接至所述集成电路或离散电子元件。
20.根据权利要求10所述的装置,还包括在第一衬底上的传感器,电池或显示器,其特征在于:所述第一和第二金属层包括疑惑多迹线,其电连接所述传感器、所述电池或所述显示器至所述集成电路、所述离散电子元件或至其他所述传感器、所述电池或所述显示器。
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5892661A (en) * | 1996-10-31 | 1999-04-06 | Motorola, Inc. | Smartcard and method of making |
CN1960832A (zh) * | 2004-05-27 | 2007-05-09 | 皇家飞利浦电子股份有限公司 | 焊料组合物和制备焊接物的方法 |
US20090061561A1 (en) * | 2005-04-18 | 2009-03-05 | Kousuke Tanaka | Method of producing electronic apparatus |
CN101896947A (zh) * | 2007-10-10 | 2010-11-24 | 蔻维尔公司 | 包括印刷集成电路的无线器件及其制作和使用方法 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19731969A1 (de) * | 1997-07-24 | 1998-08-27 | Siemens Ag | Verfahren zum Herstellen eines elektrischen Bauteils |
US8143108B2 (en) * | 2004-10-07 | 2012-03-27 | Stats Chippac, Ltd. | Semiconductor device and method of dissipating heat from thin package-on-package mounted to substrate |
US7727854B2 (en) | 2003-12-19 | 2010-06-01 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of semiconductor device |
US20070279230A1 (en) * | 2006-06-01 | 2007-12-06 | Wavezero, Inc. | System and Method for Attaching Radiofrequency Identification Chips to Metalized Antenna |
US7572723B2 (en) * | 2006-10-25 | 2009-08-11 | Freescale Semiconductor, Inc. | Micropad for bonding and a method therefor |
JP5050583B2 (ja) * | 2007-03-12 | 2012-10-17 | 富士通セミコンダクター株式会社 | 配線基板及び電子部品の実装構造 |
DE102008017622A1 (de) * | 2008-04-04 | 2009-10-08 | Deutsche Post Ag | Antennenanordnung mit wenigstens zwei entkoppelten Antennenspulen; RF-Bauteil zur berührungslosen Übertragung von Energie und Daten; elektronisches Gerät mit RF-Bauteil |
JP5498864B2 (ja) * | 2010-06-07 | 2014-05-21 | 新光電気工業株式会社 | 配線基板及び配線基板の製造方法 |
DE102011017692A1 (de) * | 2011-04-28 | 2012-10-31 | Robert Bosch Gmbh | Leiterplattenanordnung mit einem schwingfähigen System |
DE102012010560B4 (de) * | 2012-05-29 | 2020-07-09 | Mühlbauer Gmbh & Co. Kg | Transponder, Verfahren zur Herstellung eines Transponders und Vorrichtungzum Herstellen des Transponders |
US9490795B1 (en) * | 2015-08-18 | 2016-11-08 | Cadence Design Systems, Inc. | System and method for selectively coupled parasitic compensation for input referred voltage offset in electronic circuit |
-
2016
- 2016-12-12 CN CN201680072584.0A patent/CN108701670A/zh active Pending
- 2016-12-12 WO PCT/US2016/066137 patent/WO2017100752A2/en active Application Filing
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Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5892661A (en) * | 1996-10-31 | 1999-04-06 | Motorola, Inc. | Smartcard and method of making |
CN1960832A (zh) * | 2004-05-27 | 2007-05-09 | 皇家飞利浦电子股份有限公司 | 焊料组合物和制备焊接物的方法 |
US20090061561A1 (en) * | 2005-04-18 | 2009-03-05 | Kousuke Tanaka | Method of producing electronic apparatus |
CN101896947A (zh) * | 2007-10-10 | 2010-11-24 | 蔻维尔公司 | 包括印刷集成电路的无线器件及其制作和使用方法 |
Also Published As
Publication number | Publication date |
---|---|
WO2017100752A3 (en) | 2017-08-17 |
US20180359858A1 (en) | 2018-12-13 |
EP3387673A2 (en) | 2018-10-17 |
EP3387673A4 (en) | 2019-07-24 |
US10667397B2 (en) | 2020-05-26 |
WO2017100752A2 (en) | 2017-06-15 |
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