CN1943024A - 布线基板及半导体装置 - Google Patents

布线基板及半导体装置 Download PDF

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Publication number
CN1943024A
CN1943024A CNA2005800116971A CN200580011697A CN1943024A CN 1943024 A CN1943024 A CN 1943024A CN A2005800116971 A CNA2005800116971 A CN A2005800116971A CN 200580011697 A CN200580011697 A CN 200580011697A CN 1943024 A CN1943024 A CN 1943024A
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China
Prior art keywords
semiconductor chip
melting
connection electrode
point metal
low
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Pending
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CNA2005800116971A
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English (en)
Inventor
谷田一真
宫田修
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Rohm Co Ltd
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Rohm Co Ltd
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Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Publication of CN1943024A publication Critical patent/CN1943024A/zh
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Abstract

一种布线基板(2、15)，其表面与半导体芯片(3)相对并接合，包括：连接电极(14)，该电极形成在与半导体芯片接合的接合面(2a、15a)上，用于与该半导体芯片连接；绝缘膜(6)，该绝缘膜形成在所述接合面上，具有用于使所述连接电极露出的开口(6a)；以及低熔点金属部(16)，该部在所述开口内，设置在所述连接电极上，由固相线温度比所述连接电极低的低熔点金属构成。

Description

布线基板及半导体装置
技术领域
[0001]
本发明涉及半导体芯片被倒装片连接的布线基板，及将半导体芯片与该布线基板倒装片连接的半导体装置。
背景技术
[0002]
为了实现半导体装置的小型化及高密度安装，使形成了半导体芯片的功能元件的功能面，与固体装置相对，将半导体芯片与固体装置连接的倒装片连接结构，引人注目。
图6是具有倒装片连接结构的半导体装置的示意性的剖面图。该半导体装置51，具备布线基板52，和半导体芯片53。半导体芯片53中将形成了功能元件54的功能面53a与布线基板52的接合面52a相对连接。
[0003]
在布线基板52的接合面52a上，形成多个连接电极55。另外，在布线基板52的接合面52a上，还形成焊料抗蚀剂膜56，其厚度小于该接合面52a和半导体芯片53的功能面53a的间隔。在焊料抗蚀剂膜56中，形成用于使连接电极55一个个露出的多个开口56a。
在半导体芯片53的功能面53a上，形成与功能元件54电连接的多个电极突台57。电极突台57，从覆盖功能面53a的表面保护膜59形成的开口59a中露出。另外，在各电极突台57上，突起电极58从表面保护膜59的表面突出后形成。
[0004]
布线基板52的接合面52a上形成的连接电极55，和半导体芯片53的功能面53a上形成的突起电极58，通过由固相线温度(熔点)比电极突台57、连接电极55及突起电极58低的低熔点金属构成的接合部件60做媒介，相互连接。该接合部件60，由配置在半导体芯片53的突起电极58上的焊料球在该半导体芯片53和布线基板52接合时熔化而形成。
[0005]
而且，在布线基板52和半导体芯片53之间存在的空隙，用填充层63充填。
图7是为了讲述现有技术的半导体装置51的制造方法而绘制的示意性的剖面图。
首先，将接合面52a朝着上方，以大致水平的姿势保持布线基板52。然后，利用内置加热器并可以加热的接合工具62，吸附、保持和半导体芯片53的功能面53a相反的一侧的面——背面53b。将半导体芯片53的功能面53a朝着下方，与布线基板52的接合面52a相对。在半导体芯片53的功能面53a上，形成与连接电极55对应的焊料球61。
[0006]
接着，半导体芯片53的焊料球61，能够和布线基板52的连接电极55相接地对位后，接合工具62下降，半导体芯片53与布线基板52相接。这时，利用接合工具62，加热半导体芯片53，焊料球61在加热后熔化。然后，停止利用接合工具62进行的加热，焊料球61成为将连接电极55和突起电极58电连接的接合部件60。
[0007]
进而，未硬化(液态)的填充材料，充填到布线基板52和半导体芯片53的间隙中后，进行旨在使其硬化的处理，在布线基板52和半导体芯片53之间形成填充层63。这样，可以获得图6所示的半导体装置51。
在下列文献中，讲述了这种半导体装置及其制造方法。
[0008]
可是，因为布线基板52的连接电极55及半导体芯片53的焊料球61，在高度上存在着离差(不均匀性)，所以为了切实地接合连接电极55和突起电极58，接合时必须向半导体芯片53施加较大的载荷。因此，熔化的焊料球61，朝着沿接合面52a(功能面53a)的方向扩大。其结果，在接合面52a的面内方向上邻接的连接电极55(功能面53a的面内方向上邻接的突起电极58)，彼此之间被接合部件60电性短接，存在着出现短路不良的问题。
[0009]
另外，填充层63的形成，往往采用在将半导体芯片53与布线基板52接合之前，在接合面52a上涂敷未硬化的填充材料，再在将半导体芯片53与布线基板52连接后进行硬化的方式进行。这时，为了使焊料球61与连接电极55接触，利用接合工具62，用与不存在未硬化的填充材料时相比，较大的力，将半导体芯片53按压到布线基板52上。
[0010]
在该状态下，半导体芯片53被接合工具62加热，产生焊料球61的熔液后，该熔液容易向接合面52a的面内方向扩散，所以在该熔液固化后形成的接合部件60的作用下，在该面内方向上邻接的连接电极55及突起电极58被电性短接，容易出现短路不良。
非专利文献1：Chua Khoon Lam、另外1人、《Assembly and ReliabilityPerformance of Flip Chip with No-Underfills》、2003 Electronics PackagingTechnology Conference、p.336-341
发明内容
[0011]
本发明的目的在于，提供能够防止在为了和半导体芯片电连接的连接电极之间出现短路的布线基板及使用它的半导体装置。
[0012]
本发明的布线基板，是将其表面与半导体芯片相对后接合的布线基板，包含：连接电极，该电极在与半导体芯片接合的接合面上形成，旨在与该半导体芯片连接；绝缘膜，该绝缘膜在所述接合面上形成，具有使所述连接电极露出的开口；低熔点金属部，该部在所述开口内，设置在所述连接电极上，由固相线温度比所述连接电极低的低熔点金属构成。
[0013]
采用本发明后，在和半导体芯片的接合面中，形成使其最表面的绝缘膜露出连接电极的开口，在该开口内配置低熔点金属。因此，在和半导体芯片连接之际，将该布线基板加热到低熔点金属部的固相线温度以上的温度后，能够产生低熔点金属部的熔液。通过该熔液固化后形成的接合材料做媒介，可以实现布线基板的连接电极和半导体芯片的电连接。
[0014]
这时，即使产生低熔点金属部的熔液，也能够使该熔液只停留在开口内，能够防止其从开口溢出。所以，能够防止在接合面15a的面内方向上邻接的连接电极，被该熔化的低熔点金属部短路。
在将半导体芯片与该布线基板连接之际，最好将所述布线基板的所述接合面朝上地保持。这时，接合之际，低熔点金属部即使被加热到其固相线温度以上的温度后产生熔液时，该熔液也会在重力的作用下朝下方流去，所以能够收容到绝缘膜的开口内。
[0015]
绝缘膜，例如可以是焊料抗蚀剂。
所述开口内的容积，最好大于所述连接电极的体积和所述低熔点金属部的体积之和。
采用该结构后，在开口内，由连接电极占据的空间的剩余的空间的容积，大于低熔点金属部的体积。由于低熔点金属部的体积和该低熔点金属部熔化及固化后获得的接合材料的体积相等，所以开口具有可以收容该接合材料的总量的容积。因此，低熔点金属部及其熔液，在接合时被收容到开口内，而不向在接合面的面内方向上邻接的连接电极及突起电极移动。所以，该布线基板在和半导体芯片接合时，能够防止出现短路不良。
[0016]
在这里，低熔点金属部的体积，不仅是固相状态中的体积，而且还包含液相状态中的体积。
低熔点金属部，例如能够通过电镀在连接电极上形成。这时，通过控制电镀时间及电镀电流，从而控制电镀厚度后，能够使低熔点金属部的体积成为规定的体积。
[0017]
另外，低熔点金属部，例如可以通过在连接电极上涂敷钎焊膏(膏状钎焊料)后，将布线基板加热，从而使该钎焊膏中的有机物(焊剂、溶剂等)飞散，同时还使该钎焊膏中的焊料粉末熔化及固化后形成。这时，通过控制钎焊膏的涂敷量后，能够使低熔点金属部的体积成为规定的体积。就是说，这时的所谓“低熔点金属部的体积”，不是指钎焊膏的体积，而是指构成钎焊膏的钎焊料粉末熔化及固化后获得的钎焊料的体积。
[0018]
本发明的半导体装置，包含布线基板，和半导体芯片(该半导体芯片，在形成功能元件的表面具有与该功能元件电性连接的突起电极，使表面与所述布件基板的接合面相对后接合)。所述布线基板，具有：连接电极，该电极在所述接合面上形成，旨在与该半导体芯片连接；绝缘膜，该绝缘膜在所述接合面上形成，具有使所述连接电极露出的开口；低熔点金属部，该部在所述开口内，设置在所述连接电极上，由固相线温度比所述连接电极低的低熔点金属构成。
[0019]
所述开口内的容积，最好大于所述连接电极的体积和所述低熔点金属部的体积之和。
本发明中的上述的或进而其它的目的、特征及效果，将在通过参照附图进行的下述实施方式的讲述中得到阐明。
附图说明
[0020]
图1是表示本发明的一种实施方式涉及的半导体装置的示意性的剖面图。
图2是将图1所示的半导体装置的连接部件的周边放大后表示的示意性的剖面图。
图3是为了讲述图1所示的半导体装置的制造方法而绘制的示意性的剖面图。
图4是为了讲述图1所示的半导体装置的制造方法而绘制的示意性的剖面图。
图5是表示图1所示的半导体装置的变形例的示意性的剖面图。
图6是表示具有倒装片连接结构的半导体装置的构造的示意性的剖面图。
图7是为了讲述图6所示的半导体装置的制造方法而绘制的示意性的剖面图。
具体实施方式
[0021]
图1是本发明的一种实施方式涉及的半导体装置的示意性的剖面图。该半导体装置1，具备布线基板2，和将形成了功能元件4的功能面3a与布线基板2的表面(以下称作“接合面”)2a相对连接的半导体芯片3。
在布线基板2的接合面2a上，形成多个连接电极14(参照图2～图4)，布线基板2和半导体芯片3，在分别包含连接电极14的多个连接部件5的作用下，被保持规定间隔地接合，而且被电连接。
[0022]
在布线基板2的接合面2a上，形成具有厚度小于该接合面2a和半导体芯片3的间隔的焊料抗蚀剂膜6。利用该焊料抗蚀剂膜6，能够防止在布线基板2的接合面2a上形成的布线之间的电气性的短路。在该焊料抗蚀剂膜6中，形成分别使连接电极14露出的多个开口6a。连接部件5，在开口6a中与连接电极14连接。
[0023]
在布线基板2和半导体芯片3的间隙(是在布线基板2和半导体芯片3之间，在垂直俯视接合面2a的俯视图中，与半导体芯片3重叠的区域)中，配置着填充层7。利用填充层7，在密封布线基板2和半导体芯片3的间隙的同时，还保护功能面3a及连接部件5。
在布线基板2的端部，利用未图示的布线，形成与连接部件5电连接的端面电极8。端面电极8，从布线基板2的接合面2a起，经过端面，直到接合面2a的相反的一侧——外部连接面2b地形成。该半导体装置1，能够在端面电极8中，实行和其它的布线基板(安装基板)电连接。
[0024]
图2是将半导体装置1的连接部件5的周边放大后表示的示意性的剖面图。
在半导体芯片3的功能面3a中，形成与功能元件4电连接、由铝(Al)构成的多个电极突台11。电极突台11，从覆盖功能面3a的表面保护膜12中形成的开口12a露出。表面保护膜12，例如由氮化硅(钝化膜)及聚酰亚胺构成。另外，在各电极突台11上，突起电极13从表面保护膜12上突出后形成。突起电极13，例如既可以通过无电解镍(Ni)电镀及无电解金(Au)电镀后形成，还可以通过电解铜(Cu)电镀及电解金电镀后形成。
[0025]
在接合面2a上形成的各连接电极14，在与半导体芯片3的功能面3a上形成的多个电极突台11(突起电极13)一一对应的位置上形成。连接电极14，例如具有用镍/金电镀层14B覆盖铜突台14A的表面的结构。
多个突起电极13和对应的各连接电极14，分别被接合部件10机械性地接合而且电气性地接合。接合部件10由固相线温度(熔点)比电极突台11、突起电极13及连接电极14低的低熔点金属例如锡(Sn)、铟(In)及它们的合金构成。
[0026]
由连接电极14、突起电极13及接合部件10，构成连接部件5。
图3是为了讲述半导体装置的制造方法的示意性的剖面图，图4是利用其切断线IV-IV的示意性的剖面图。在图3中，省略了半导体芯片3的图示。
半导体装置1，例如可以通过对布线基板2的接合面2a而言，将半导体芯片3的功能面3a与其相对地接合后，再向布线基板2和半导体芯片3的间隙注入液态的填充材料，并且使该填充材料硬化，形成填充层7后获得。
[0027]
具体的说，首先准备在功能面3a上形成电极突台11、表面保护膜12及突起电极13的半导体芯片3。参照图4，在该半导体芯片3的功能面3a的一侧，不设置与现有技术的制造方法中的焊料球61(参照图7)对应的部件，突起电极13的表面露出，从表面保护膜12中突出。
[0028]
然后，准备装入了多个布线基板2的基板15。在基板15的接合面15a(布线基板2的接合面2a)上，形成覆盖各连接电极14地形成低熔点金属膜16。
低熔点金属膜16，由基本上和半导体装置1的接合材料10相同成分的金属材料构成。就是说，低熔点金属膜16的固相线温度，低于电极突台11、突起电极13及连接电极14(铜突台14A及镍/金电镀层14B)的固相线温度。
[0029]
低熔点金属膜16，例如可以通过电镀，在连接电极14上形成。另外，低熔点金属膜16还可以通过在连接电极14上涂敷钎焊膏(膏状钎焊料)后，将基板15加热，从而使该钎焊膏中的有机物(焊剂、溶剂等)飞散，同时还使该钎焊膏中的焊料粉末熔化及固化后形成。
[0030]
连接电极14及开口6a，例如在垂直俯视接合面15a的俯视图中，具有大体上是正方形的形状，连接电极14配置在开口6a的大致中部(参照图3)。连接电极14及开口6a，还可以在垂直俯视接合面15a的俯视图中，具有正方形以外的多边形及圆形的形状。与端面电极8(参照图1)连接的布线17，从连接电极14延伸。布线17的除了和连接电极14连接的部位附近以外，都被焊料抗蚀剂膜6覆盖。
[0031]
在垂直俯视接合面15a的俯视图中，低熔点金属膜16例如具有大体上是正方形的形状，存在于开口6a的形成区域内。低熔点金属膜16还可以在垂直俯视接合面15a的俯视图中，具有正方形以外的多边形及圆形的形状。
各开口6a，其容积V0大于在该开口6a内配置的连接电极14的体积VP和低熔点金属膜16的体积VL之和地形成(参照下列公式(1))。
[0032]
V0＞VL+VP  (1)
此外，包含熔液(液相)的状态中的低熔点金属膜16的体积，比固相的状态中的低熔点金属膜16的体积大时，上述公式(1)中的低熔点金属膜16的体积VL，是包含液相的状态中的低熔点金属膜16的体积。
低熔点金属膜16，通过电镀形成时，通过控制电镀电流(电解电镀时)及电镀时间，从而控制电镀厚度，能够使低熔点金属膜16的体积VL成为规定的体积。
[0033]
另外，在使用钎焊膏形成低熔点金属膜16时，通过控制钎焊膏的涂敷量，能够使低熔点金属膜16的体积VL成为规定的体积。这时所谓的“低熔点金属膜16的体积VL”，不是指钎焊膏的体积，而是指除去有机物、构成钎焊膏的钎焊料粉末熔化及固化后获得的低熔点金属膜16的体积。
[0034]
开口6a的形状成为柱体(本实施方式中为角柱)时，开口6a的容积V0，与在垂直俯视焊料抗蚀剂膜6的俯视图中的开口6a的面积和焊料抗蚀剂膜6的厚度之积相等。
接着，将接合面52a朝着上方，以大致水平的姿势保持基板15。然后，利用内置加热器、可以加热的接合工具19，吸附、保持和半导体芯片3的功能面3a相反的一侧的面——背面3b。再将半导体芯片3的功能面3a朝着下方，与基板15的接合面15a相对。该状态如图4所示。
[0035]
接着，使半导体芯片3的突起电极13和基板15的低熔点金属膜16对位后，将接合工具19下降，使突起电极13与低熔点金属膜16接触。在这里，在基板15的连接电极14上形成的低熔点金属膜16和半导体芯片3的突起电极13，往往具有较大的高度离差。这时，为了切实使突起电极13与低熔点金属膜16连接，利用接合工具19，给半导体芯片3施加较大的载荷。
[0036]
然后，在该状态下，利用接合工具19，将半导体芯片3加热，其热量将低熔点金属膜16加热到固相线温度以上(最好是液相线温度以上)的温度后熔化。再然后，停止利用接合工具19进行的加热，突起电极13和连接电极14，在低熔点金属膜16的熔液固化后形成的接合材料10的作用下，被电连接的同时，还被机械性地接合。
[0037]
在这里，连接电极14的体积VP和低熔点金属膜16的体积VL之和，小于开口6a的容积V0，从而使低熔点金属膜16及其熔液，在开口6a内，被连接电极14的剩余的空间收容。另外，低熔点金属膜16不在突起电极13上，而是在开口6a内配置的连接电极14上形成。因此，低熔点金属膜16及其熔液，不扩散到开口6a外地向接合面15a的面内方向移动。其结果，即使给半导体芯片3施加较大的载荷，在该面内方向邻接的突起电极13及连接电极14，也被接合材料10电气性短路，能够防止出现短路不良的问题。
[0038]
接着，在基板15和半导体芯片3的间隙之间，充填填充层7(参照图1及图2)。例如，由分配器喷出未硬化(液态)的填充材料，利用毛细现象充填到基板15和半导体芯片3的间隙中，再硬化(例如热硬化)后形成。
可以在连接半导体芯片3之前的基板15的接合面15a上，涂敷未硬化的填充材料。这时，利用接合工具19，将半导体芯片3按压到基板15上，从而使低熔点金属膜16和突起电极13穿透未硬化的填充材料地接触。再在使基板15和半导体芯片3的接合完毕后，使未硬化的填充材料硬化，从而获得填充层7。
[0039]
这时，在将半导体芯片3与基板15接合之际，为了使突起电极13与低熔点金属膜16接触，利用接合工具19，用与不存在未硬化的填充材料时相比较大的力按压半导体芯片3。在该状态下，半导体芯片3被加热，低熔点金属膜16被熔化，低熔点金属膜16的熔液，也在开口6a内，被连接电极14剩余的空间收容，所以能够防止接合面15a的面内方向邻接的连接电极14及突起电极13被接合材料10短路。
[0040]
然后，将基板15切断成布线基板2的单片，在布线基板2的端部形成端面电极8后，就可以获得图1所示的半导体装置1。
以上，讲述了本发明的实施方式。但本发明也可以用别的方式实施。例如：可以在布线基板2上，倒装片连接2个以上的半导体芯片3。
[0041]
本发明的半导体装置的封装形态，并不局限于图1所示的半导体装置1那样，将端面电极8作为外部连接部件，也可以用别的方式。图5是表示半导体装置1的变形例的示意性的剖面图。在图5中，对于与图1所示的各部对应的部分，赋予和图1相同的参照符号。
该半导体装置21，作为外部连接部件，取代端面电极8，在外部连接面22b(与半导体芯片3连接的接合面2a相反一侧的面)上具备金属球23。金属球23，在布线基板22的内部及/或表面再布线后，与连接部件5电连接。该该半导体装置21，通过金属球23做媒介，能够与其它的布线基板接合。
[0042]
以上，详细讲述了本发明的实施方式。但它们只不过是为了阐述本发明的技术内容而使用的具体例子。本发明不应该理解为局限于这些具体示例，本发明的精神及范围，只能由同时提交的《权利要求书》限定。
本申请与2004年9月29日向日本国特许厅递交的特愿2004-284681对应，该申请的全部内容被本文引用后，成为本申请的内容。

Claims (3)

1、一种布线基板，其表面与半导体芯片相对并接合，
包括：
连接电极，该电极形成在与半导体芯片接合的接合面上，用于与该半导体芯片连接；
绝缘膜，该绝缘膜形成在所述接合面上，具有用于使所述连接电极露出的开口；以及
低熔点金属部，该部在所述开口内，设置在所述连接电极上，由固相线温度比所述连接电极低的低熔点金属构成。
2、如权利要求1所述的布线基板，其特征在于：所述开口内的容积，大于所述连接电极的体积和所述低熔点金属部的体积之和。
3、一种半导体装置，包含：布线基板、和
半导体芯片，该半导体芯片，在形成有功能元件的表面具有与该功能元件电性连接的突起电极，且表面与所述布件基板的接合面相对并接合；
所述布线基板，具有：
连接电极，该电极形成在所述接合面上，用于与该半导体芯片连接；
绝缘膜，该绝缘膜形成在所述接合面上，具有用于使所述连接电极露出的开口；以及
低熔点金属部，该部在所述开口内，设置在所述连接电极上，由固相线温度比所述连接电极低的低熔点金属构成。
CNA2005800116971A 2004-09-29 2005-08-04 布线基板及半导体装置 Pending CN1943024A (zh)

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US7456502B2 (en) 2008-11-25
KR20070057704A (ko) 2007-06-07
WO2006035548A1 (ja) 2006-04-06
JP2006100552A (ja) 2006-04-13
US20070200249A1 (en) 2007-08-30
KR101140518B1 (ko) 2012-04-30

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