CN1846309A - 具有平行互补鳍片场效应晶体管对的集成电路 - Google Patents

具有平行互补鳍片场效应晶体管对的集成电路 Download PDF

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CN1846309A
CN1846309A CNA2004800249678A CN200480024967A CN1846309A CN 1846309 A CN1846309 A CN 1846309A CN A2004800249678 A CNA2004800249678 A CN A2004800249678A CN 200480024967 A CN200480024967 A CN 200480024967A CN 1846309 A CN1846309 A CN 1846309A
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CN100483734C (zh
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A·布赖恩特
W·F·克拉克
D·M·弗里德
M·D·贾菲
E·J·诺瓦克
J·J·派卡里克
C·S·帕特南
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GlobalFoundries Inc
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Abstract

公开了一种用于集成电路结构的方法和结构，该集成电路结构利用了互补鳍片型场效应晶体管(FinFET)。本发明具有包括第一鳍片(100)的第一类型FinFET，以及包括平行于第一鳍片(100)延伸的第二鳍片(102)的第二类型FinFET。本发明还具有位于第一类型FinFET和第二类型FinFET的源极/漏极区域(130)之间的绝缘鳍片。绝缘鳍片具有与第一鳍片(100)和第二鳍片(102)基本相同的宽度尺寸，以便第一类型FinFET和第二类型FinFET之间的间隔大约等于一个鳍片的宽度。本发明还具有在第一类型FinFET和第二类型FinFET的沟道区域上形成的公共栅极(106)。栅极(106)包括与第一类型FinFET相邻的第一杂质掺杂区域和与第二类型FinFET相邻的第二杂质掺杂区域。第一杂质掺杂区域和第二杂质掺杂区域之间的差别给所述栅极提供与第一类型FinFET和第二类型FinFET之间的差别相关的不同的功函数。第一鳍片(100)和第二鳍片(102)具有大约相同的宽度。

Description

具有平行互补鳍片场效应晶体管对的集成电路
技术领域
本发明概括地涉及晶体管，以及更具体涉及称为FinFET的鳍片型晶体管，并且涉及在单个常规FinFET空间中形成两个或更多FinFET。
背景技术
随着持续对晶体管的尺寸缩小的需求，创造了新的和更小型的晶体管。在晶体管技术中的一个最近的发展是称为FinFET的鳍片型场效应晶体管的引入。Hu等人(以下称为“Hu”)的美国专利6,413,802公开了FinFET结构，该结构包括具有沿其中心的沟道的中心鳍片和位于鳍片结构的末端的源极和漏极，在此通过参考引入其内容。栅极导体覆盖沟道部分。
虽然FinFET结构减小了基于晶体管的器件的尺寸，持续减小FinFET晶体管的尺寸仍然重要。下面描述的本发明提供了一种允许在以前仅有一个FinFET可以预先形成的地方中形成两个或更多FinFET的方法/结构，从而使FinFET的密度近似地加倍。
发明内容
本发明提供一种利用互补鳍片型场效应晶体管(FinFET)的集成电路结构。本发明具有包括第一鳍片的第一类型FinFET，和包括平行于第一鳍片延伸的第二鳍片的第二类型FinFET。本发明还具有位于第一类型FinFET和第二类型FinFET的源极和漏极区域之间的绝缘鳍片。绝缘鳍片具有与第一鳍片和第二鳍片基本相同的宽度尺寸，以便第一类型FinFET和第二类型FinFET之间的间隔基本等于一个鳍片的宽度。本发明还具有在第一类型FinFET和第二类型FinFET的沟道区域上形成的公共栅极。该栅极包括与第一类型FinFET相邻的第一杂质掺杂区域和与第二类型FinFET相邻的第二杂质掺杂区域。第一杂质掺杂区域和第二杂质掺杂区域之间的差别给该栅极提供与第一类型FinFET和第二类型FinFET之间的差别相关的不同的功函数。第一鳍片和第二鳍片具有基本上相同的宽度。
本发明还提供一种形成互补平行鳍片型场效应晶体管(FinFET)对的方法。该方法在衬底上形成半导体层。下一步，该方法在半导体层上形成具有基本垂直的侧壁的心轴结构。该方法在心轴结构的侧壁上形成三层衬垫组。该方法除去心轴结构和衬垫的中间衬垫，以便保留从半导体层延伸的内部衬垫和外部衬垫。随后，该方法构图半导体层，利用内部衬垫和外部衬垫作为掩膜，以便保留由内部衬垫和外部衬垫保护的区域作为从衬底延伸的第一鳍片和第二鳍片。利用倾斜注入在所述第一鳍片和所述第二鳍片中相互不同地掺杂沟道区域。
该方法还在第一鳍片和第二鳍片的中心区域上形成栅极导体。该方法掺杂第一鳍片和第二鳍片的未由栅极导体保护的部分以在第一鳍片和第二鳍片中形成源极和漏极区域。随后该方法绝缘第一鳍片的源极和漏极区域与第二鳍片的源极和漏极区域。
掺杂沟道区域的步骤包括从基本上垂直于第一鳍片的角度利用第一沟道掺杂物质掺杂第一鳍片，以便第一鳍片保护第二鳍片不接收第一沟道掺杂物质。该工艺形成半导体层，其在半导体层中提供第二沟道掺杂物质。掺杂沟道区域的步骤还从基本上垂直于第二鳍片的角度利用第二沟道掺杂物质掺杂第二鳍片，以便第二鳍片保护第一鳍片不接收第二沟道掺杂物质。
该方法还包括形成三层衬垫组的工艺。该方法沿心轴结构的侧壁形成内部衬垫。该方法还在内部衬垫上形成中间衬垫，以及在中间衬垫上形成外部衬垫。掺杂源极和漏极区域的工艺，以不同的角度将不同的掺杂剂注入第一鳍片和第二鳍片的源极和漏极区域。
心轴结构包括两个平行侧壁，并且同时形成与每个所述侧壁相邻的衬垫结构对。该心轴结构和中间衬垫包括相同的材料，以便除去工艺在单个工艺中除去心轴和中间衬垫。绝缘源极和漏极区域的工艺在第一鳍片和第二鳍片上沉积介质材料，并随后从除了第一鳍片和第二鳍片的源极和漏极区域之间的区域的所有区域除去介质材料。
本发明还提供一种在衬底上形成平行鳍片结构的方法，该方法在半导体层上形成具有基本垂直的侧壁的心轴结构。该方法在心轴结构的侧壁上形成三层衬垫组，并且随后除去心轴结构和衬垫的中间衬垫，以便保留从衬底延伸的内部衬垫和外部衬垫。内部衬垫和外部衬垫可以包括导体，半导体，以及用于在衬底中构图特征的掩膜部分。
该方法还包括形成三层衬垫组的工艺。该方法沿心轴结构的侧壁形成内部衬垫。该方法还在内部衬垫上形成中间衬垫，以及在中间衬垫上形成外部衬垫。衬垫都具有大约相同的宽度，以便内部衬垫与外部衬垫距离一个衬垫的宽度。
本发明还提供在衬底上形成平行结构的方法。该方法在衬底上形成材料层。随后该方法在材料层上形成具有基本垂直的侧壁的心轴结构。该方法在心轴结构的侧壁上形成三层衬垫组。随后该方法除去心轴结构和衬垫的交替层，以便保留从下面的材料的延伸的均匀地分离的衬垫层。该方法构图材料层，利用内部衬垫和外部衬垫作为掩膜，以便保留由均匀地分离的衬垫层保护的区域作为从衬底延伸的多个鳍片。
附图说明
本发明将通过本发明的优选实施例的随后详细说明并参考附图得到更好的理解，其中：
图1是根据本发明的双倍密度结构的示意图；
图2是根据本发明的部分完成的双倍密度FinFET结构的示意图；
图3是根据本发明的部分完成的双倍密度FinFET结构的示意图；
图4是根据本发明的部分完成的双倍密度FinFET结构的示意图；
图5是根据本发明的部分完成的双倍密度FinFET结构的示意图；
图6是根据本发明的部分完成的双倍密度FinFET结构的示意图；
图7是根据本发明的部分完成的双倍密度FinFET结构的示意图；
图8是根据本发明的部分完成的双倍密度FinFET结构的示意图；
图9是根据本发明的部分完成的双倍密度FinFET结构的示意图；
图10是根据本发明的部分完成的双倍密度FinFET结构的示意图；
图11是根据本发明的部分完成的双倍密度FinFET结构的示意图；
图12是根据本发明的部分完成的双倍密度FinFET结构的示意图；
图13是根据本发明的部分完成的双倍密度FinFET结构的示意图；
图14是根据本发明的部分完成的双倍密度FinFET结构的示意图；
图15是根据本发明的部分完成的双倍密度FinFET结构的示意图；
图16是根据本发明的部分完成的双倍密度FinFET结构的示意图；
图17是根据本发明的部分完成的双倍密度FinFET结构的示意图；
图18是根据本发明的部分完成的双倍密度FinFET结构的示意图；
图19是根据本发明的部分完成的双倍密度FinFET结构的示意图；
图20是根据本发明的部分完成的双倍密度FinFET结构的示意图；
图21是根据本发明的部分完成的双倍密度FinFET结构的示意图；
图22是根据本发明的部分完成的双倍密度FinFET结构的示意图；
图23是根据本发明的部分完成的双倍密度FinFET结构的示意图；
图24是根据本发明的交叉耦合FinFET结构的示意图；
具体实施方式
如上所述，本发明允许在以前仅有一个FinFET可以形成的地方中形成两个或更多FinFET，从而使FinFET的密度近似地加倍(四倍，等等)。图1中示出了本发明利用的结构的顶视图。图1示出了限定四个分离晶体管的四个鳍片100、102。更具体，鳍片100形成P-型场效应晶体管(PFET)而鳍片102形成N-型场效应晶体管(NFET)。绝缘体104分离这两个鳍片。环绕鳍片的沟道区域的栅极以标号106示出。栅极接触以标号112示出，而用于示出的各种晶体管的源极和漏极的接触以标号108标出。标号110表示可以包括分离各种晶体管的隔离区域的绝缘区域。虽然图1示出了N-型和P-型晶体管，本领域的普通技术人员在阅读本公开后可以理解该结构并不仅限于互补型晶体管，还可以包括任意形式的基于晶体管的结构。虽然描述集中于示例性二个FinFET结构，本领域的普通技术人员在阅读本公开后可以理解该结构并不仅限于一对，还可以形成多个FinFET。
图2-23示出了制造器件时的不同工艺进程。图2示出了包括衬底20、氧化物层21、硅层22和掩膜层23(例如氧化物或其它掩膜材料)的层状结构的截面图。衬底20、氧化物层21和硅层22包括绝缘体上硅(SOI)结构，该结构将硅22与下面的衬底20隔离，从而显著地提高晶体管的性能。
构图掩膜层23以形成多边形结构23(条，台，心轴，矩形盒，等)，如图3的顶视图和图4的截面图。随后，如在图5和6中的顶视和截面图所示，在台23的周围形成一组侧壁衬垫60-62。通过沉积材料并随后执行选择性各向异性蚀刻工艺形成侧壁衬垫60-62，该工艺以比它从垂直表面除去材料的速率高的多的速率从水平表面除去材料。该工艺仅留下沿现有结构的侧壁的沉积材料。重复形成侧壁衬垫的此工艺以形成图5和图6中示出的三个不同的侧壁衬垫60-62。内部和外部侧壁衬垫60，62由硬材料(如Si3N4或其它硬掩膜材料)形成，而中间衬垫61由如氧化物或其它材料的牺牲材料形成，以便它可以被相对于内部和外部衬垫60，62具有选择性地蚀刻。
使用衬垫技术的一个优点是衬垫可以具有比使用现有平版印刷技术形成的最小尺寸平板印刷特征更小的尺寸。例如，如果台23的宽度具有可能的最小宽度，如受随后的现有平版印刷技术的当前状态限制，在台23的侧面上形成的衬垫将是亚平版印刷尺寸(比平版印刷可能的最小尺寸更小的尺寸)。另外，衬垫与台结构23以及相互之间是自对准的，这消除了对准衬垫的必要。
下一步，如在图7和8中的顶视和截面图中所示，使用选择性蚀刻工艺除去牺牲衬垫61和心轴23，该工艺除去台23和衬垫61，而基本不影响如硅22以及内部衬垫和外部衬垫60，62的硬结构。虽然在此公开中提及了一些特殊材料，实质上任何材料都可以用于这里描述的结构，只要可以相对于内部和外部衬垫60，62具有选择性地除去台23和中间衬垫61。优选地，中间衬垫61和台23由相同的材料(或非常相似的材料)形成，如此可以允许同时除去这两种结构。
在图9中，在使用衬垫60，62作掩膜的蚀刻工艺中构图硅22。另外，在此步骤之前或之后，可以平面化衬垫以除去上表面上的任意圆形畸变(rounding)。虽然随后的描述利用构图结构以形成FinFET，本领域的技术人员可以明白(根据此公开)该结构本身可以用作导体，半导体，绝缘体，结构支撑，掩膜等等。因此，虽然随后的描述集中于晶体管，本发明并不仅局限于此。图9还示出了掺杂鳍片的沟道区域的离子注入工艺。在此实例中，离子注入是N-型或P-型。然而，依赖于特殊的设计要求可以形成许多其它类型的晶体管，并且本发明不局限于在这些典型实施例中使用的特殊类型的晶体管。进一步地，在此实例中，离子注入是倾斜的以便在衬垫60下面的硅部分仅接受第一类型(P-型)的掺杂剂，而在衬垫62下面的硅部分仅接受第二类型(N-型)的掺杂剂。通过使用倾斜注入工艺，接近掺杂剂指向的垂直方向的衬垫和鳍片掩蔽远离掺杂剂指向的垂直方向的邻近鳍片。
下一步，在每一个鳍片对上构图栅极100，如在图10中所示。如普通的FinFET技术，栅极100沿鳍片的中心部分(鳍片的沟道区域)环绕鳍片的侧面和顶部。在图11中示出了在图10中由A-A线示出的区域的截面图，并且在图12中示出了在图10中由B-B线示出的区域的截面图。为了给在N-型掺杂硅和P-型掺杂硅上的栅极部分提供不同的功函数，该栅极可以进行不同类型的倾斜注入(从都垂直于平行鳍片的纵向的不同的角度)，如上面掺杂沟道区域22的做法。可选地，栅极材料本身可以预掺杂(在沉积之前包括一定水平的杂质)并随后在栅极导体的一侧上执行另外的倾斜掺杂注入以在栅极结构100的一侧执行不同的注入以改变栅极导体那一侧的功函数。再一次，通过执行倾斜注入，掩蔽对远离倾斜注入指向的方向的栅极导体的侧面的注入，从而允许栅极导体的不同部分接收不同功函数的注入。在此之后，鳍片的源极和漏极区域(没有被栅极导体覆盖的区域)130接收源极和漏极掺杂剂，如图13中所示。如果为源极和漏极使用不同的掺杂剂，可以再一次使用如上所述的从不同垂直角度的不同杂质的倾斜注入有选择地掺杂单独的鳍片。
图14和15示出了沉积在整个结构上的保形介质层140(如氮化物等)。图14是沿线A-A的截面图而图15是沿线B-B的截面图。图16和图17示出了下一步在例如选择性蚀刻工艺中从除了鳍片的源极和漏极区域130之间的区域的所有区域除去介质140。实际上，如图17中所示，介质140甚至凹入鳍片顶部的下面。图17是图16中示出的顶视图的沿A-A线的截面图。沿B-B线的视图显示与图12所示相同，因为如上面的状态，仅在源极/漏极区域130之间保留介质140。
如图18中所示，该图为源极/漏极区域沿线A-A的截面图，硅化暴露硅区域22形成硅化物区域181。下一步，在整个结构上沉积如钨的导体180。
图19示出了沿线B-B的鳍片的栅极和沟道区域上的钨180。在图20和21中，钨凹入鳍片顶部的下面。图20是沿线A-A的源极/漏极区域的截面图而图21是沿线B-B的源极/漏极区域的截面图。
图22示出了沿线A-A的源极/漏极区域的部分截面图并且示出了另外的工艺，其中构图钨180以从鳍片组之间的区域220除去钨。图23示出了沿线B-B的沟道/栅极区域中的钨180的相同构图220。图1示出了将钨180另外构图成各种接触108，112等，已在上面描述过。另外，图1中示出的结构具有为了隔离不同结构沉积的另外的介质。可以执行如本领域的普通技术人员已公知的各种平面化工艺以完成该结构。
图24是本发明的高密度SRAM单元结构的示意图，该结构包括利用布线图形248交叉耦合的晶体管对244-247(其中每个盒代表一对平行互补晶体管)。标号241代表接地线并且标号242代表电压线。标号249代表位线接触。标号243代表字线用作通路晶体管的栅极。尽管图24示出了使用本发明的晶体管的一个示例性电路，本领域的普通技术人员可以明白(根据本公开)根据本发明可以制造许多其它和不同的基于FinFET的结构。
如上所述，本发明工艺制造几乎双倍密度的FinFET器件的结构。本发明利用衬垫技术以形成鳍片，其允许相互更近地形成不同晶体管的鳍片(仅间隔一个衬垫的宽度)并允许鳍片处于亚平板印刷尺寸。本发明还提供倾斜离子注入，其允许一个鳍片掩蔽其它鳍片(在每一鳍片组中)以允许对鳍片进行有选择地不同掺杂。从而，本发明容易地制造互补晶体管。互补晶体管共享一个栅极并且可以分别接触，允许在更小的区域形成集成电路。本发明还提供形成鳍片对的方法，其可以在晶体管中形成，或用作布线或电阻器以独立接触每个鳍片。
虽然本发明以优选实施例进行了描述，本领域的技术人员可以认识到本发明可以在附加权利要求的范围和精神内进行修改。

Claims (33)

1.一种利用鳍片型场效应晶体管(FinFET)的集成电路结构，包括：
第一FinFET，具有第一鳍片；
第二FinFET，具有平行于所述第一鳍片延伸的第二鳍片；以及
绝缘鳍片，位于所述第一FinFET和所述第二FinFET的源极/漏极区域之间，其中所述绝缘鳍片具有与所述第一鳍片和所述第二鳍片基本相同的宽度尺寸，以便所述第一FinFET和所述第二FinFET之间的间隔基本等于一个鳍片的宽度。
2.根据权利要求1的集成电路结构，还包括在所述第一FinFET和所述第二FinFET的沟道区域上形成的公共栅极。
3.根据权利要求2的集成电路结构，其中所述公共栅极包括与所述第一FinFET相邻的第一杂质掺杂区域和与所述第二FinFET相邻的第二杂质掺杂区域。
4.根据权利要求3的集成电路结构，其中所述第一杂质掺杂区域和所述第二杂质掺杂区域之间的差别给所述公共栅极提供与所述第一FinFET和所述第二FinFET之间的差别相关的不同的功函数。
5.根据权利要求1的集成电路结构，其中所述第一鳍片和所述第二鳍片具有基本相同的宽度。
6.一种利用互补鳍片型场效应晶体管(FinFET)的集成电路结构，包括：
第一类型FinFET，具有第一鳍片；
第二类型FinFET，具有平行于所述第一鳍片延伸的第二鳍片；
绝缘鳍片，位于所述第一类型FinFET和所述第二类型FinFET的源极和漏极区域之间，其中所述绝缘鳍片具有与所述第一鳍片和所述第二鳍片基本相同的宽度尺寸，以便所述第一类型FinFET和所述第二类型FinFET之间的间隔基本等于一个鳍片的宽度；以及
公共栅极，在所述第一类型FinFET和所述第二类型FinFET的沟道区域上形成。
7.根据权利要求6的集成电路结构，其中所述公共栅极包括与所述第一类型FinFET相邻的第一杂质掺杂区域和与所述第二类型FinFET相邻的第二杂质掺杂区域。
8.根据权利要求6的集成电路结构，其中所述第一杂质掺杂区域和所述第二杂质掺杂区域之间的差别给所述公共栅极提供与所述第一类型FinFET和所述第二类型FinFET之间的差别相关的不同的功函数。
9.根据权利要求6的集成电路结构，其中所述第一鳍片和所述第二鳍片具有基本相同的宽度。
10.一种形成平行鳍片型场效应晶体管(FinFET)对的方法，所述方法包括以下步骤：
在衬底上形成半导体层；
在所述半导体层上形成具有基本垂直的侧壁的心轴结构；
在所述心轴结构的所述侧壁上形成三层衬垫组；
除去所述心轴结构和所述衬垫的中间衬垫，以便保留从所述半导体层延伸的内部衬垫和外部衬垫；
构图所述半导体层，利用所述内部衬垫和所述外部衬垫作为掩膜，以便保留由所述内部衬垫和所述外部衬垫保护的区域作为从所述衬底延伸的第一鳍片和第二鳍片；
在所述第一鳍片和所述第二鳍片中限定沟道区域；
在所述第一鳍片和所述第二鳍片的中心区域上形成栅极导体；
掺杂所述第一鳍片和所述第二鳍片的未由所述栅极导体保护的部分，以在所述第一鳍片和所述第二鳍片中形成源极和漏极区域；以及
绝缘所述第一鳍片的所述源极和漏极区域与所述第二鳍片的源极和漏极区域。
11.根据权利要求10的方法，其中形成所述三层衬垫组的所述工艺包括以下步骤：
沿所述心轴结构的侧壁形成所述内部衬垫；
在所述内部衬垫上形成所述中间衬垫；以及
在所述中间衬垫上形成所述外部衬垫。
12.根据权利要求10的方法，其中所述第一鳍片包括第一FinFET并且所述第二鳍片包括第二FinFET。
13.根据权利要求12的方法，其中掺杂所述源极和漏极区域的所述工艺，以不同的角度将不同的掺杂剂注入所述第一FinFET和所述第二FinFET的源极和漏极区域。
14.根据权利要求10的方法，其中所述心轴结构包括两个平行侧壁，并且其中所述方法同时形成与每个所述侧壁相邻的FinFET对。
15.根据权利要求10的方法，其中所述心轴结构和所述中间衬垫包括相同的材料，以便所述除去工艺在单个工艺中除去所述心轴和所述中间衬垫。
16.根据权利要求10的方法，其中绝缘所述源极和漏极区域的所述工艺包括在所述第一鳍片和所述第二鳍片上沉积介质材料，并从除了所述第一鳍片和所述第二鳍片的所述源极和漏极区域之间的区域的所有区域除去所述介质材料。
17.一种形成互补平行鳍片型场效应晶体管(FinFET)对的方法，所述方法包括以下步骤：
在衬底上形成半导体层；
在所述半导体层上形成具有基本垂直的侧壁的心轴结构；
在所述心轴结构的所述侧壁上形成三层衬垫组；
除去所述心轴结构和所述衬垫的中间衬垫，以便保留从所述半导体层延伸的内部衬垫和外部衬垫；
构图所述半导体层，利用所述内部衬垫和所述外部衬垫作为掩膜，以便保留由所述内部衬垫和所述外部衬垫保护的区域作为从所述衬底延伸的第一鳍片和第二鳍片；
利用倾斜注入在所述第一鳍片和所述第二鳍片中相互不同地掺杂沟道区域；
在所述第一鳍片和所述第二鳍片的中心区域上形成栅极导体；
掺杂所述第一鳍片和所述第二鳍片的未由所述栅极导体保护的部分，以在所述第一鳍片和所述第二鳍片中形成源极和漏极区域；以及
绝缘所述第一鳍片的所述源极和漏极区域与所述第二鳍片的源极和漏极区域。
18.根据权利要求17的方法，其中掺杂所述沟道区域的所述步骤包括从基本垂直于所述第一鳍片的角度利用第一沟道掺杂物质掺杂所述第一鳍片，以便所述第一鳍片保护所述第二鳍片不接收所述第一沟道掺杂物质。
19.根据权利要求18的方法，其中所述形成所述半导体层的所述工艺包括在所述半导体层中提供第二沟道掺杂物质。
20.根据权利要求18的方法，其中掺杂所述沟道区域的所述步骤还包括从基本垂直于所述第二鳍片的角度利用第二沟道掺杂物质掺杂所述第二鳍片，以便所述第二鳍片保护所述第一鳍片不接收所述第二沟道掺杂物质。
21.根据权利要求17的方法，其中形成所述三层衬垫组的所述工艺包括以下步骤：
沿所述心轴结构的侧壁形成所述内部衬垫；
在所述内部衬垫上形成所述中间衬垫；以及
在所述中间衬垫上形成所述外部衬垫。
22.根据权利要求17的方法，其中掺杂所述源极和漏极区域的所述工艺，以不同的角度将不同的掺杂剂注入所述第一鳍片和所述第二鳍片的源极和漏极区域。
23.根据权利要求17的方法，其中所述心轴结构包括两个平行侧壁，并且其中所述方法同时形成与每个所述侧壁相邻的多个平行FinFET。
24.根据权利要求17的方法，其中所述心轴结构和所述中间衬垫包括相同的材料，以便所述除去工艺在单个工艺中除去所述心轴和所述中间衬垫。
25.根据权利要求17的方法，其中绝缘所述源极和漏极区域的所述工艺包括在所述第一鳍片和所述第二鳍片上沉积介质材料，并从除了所述第一鳍片和所述第二鳍片的所述源极和漏极区域之间的区域的所有区域除去所述介质材料。
26.一种在衬底上形成平行鳍片结构的方法，包括以下步骤：
在所述半导体层上形成具有基本垂直的侧壁的心轴结构；
在所述心轴结构的所述侧壁上形成三层或更多层衬垫组；以及
除去所述心轴结构和所述衬垫的交替层，以便保留从所述衬底延伸的内部衬垫和外部衬垫。
27.根据权利要求26的方法，其中所述内部衬垫和所述外部衬垫包括如下的一种：导体；半导体；绝缘体；以及用于在所述衬底中构图特征的掩膜部分。
28.根据权利要求26的方法，其中形成所述三层衬垫组的所述工艺包括以下步骤：
沿所述心轴结构的侧壁形成所述内部衬垫；
在所述内部衬垫上形成所述中间衬垫；以及
在所述中间衬垫上形成所述外部衬垫。
29.根据权利要求26的方法，其中所述衬垫都具有大约相同的宽度，以便所述内部衬垫与所述外部衬垫距离一个衬垫的宽度。
30.在衬底上形成平行结构的方法，包括以下步骤：
在所述衬底上形成材料层；
在所述材料层上形成具有基本垂直的侧壁的心轴结构；
在所述心轴结构的所述侧壁上形成三层衬垫组；
除去所述心轴结构和所述衬垫的中间衬垫，以便保留从所述材料层延伸的内部衬垫和外部衬垫；以及
构图所述材料层，利用所述内部衬垫和所述外部衬垫作为掩膜，以便保留由所述内部衬垫和所述外部衬垫保护的区域作为从所述衬底延伸的第一鳍片和第二鳍片。
31.根据权利要求30的方法，其中所述材料层包括如下的一种：导体；半导体；和绝缘体。
32.根据权利要求30的方法，其中形成所述三层衬垫组的所述工艺包括以下步骤：
沿所述心轴结构的侧壁形成所述内部衬垫；
在所述内部衬垫上形成所述中间衬垫；以及
在所述中间衬垫上形成所述外部衬垫。
33.根据权利要求30的方法，其中所述衬垫都具有大约相同的宽度，以便所述内部衬垫与所述外部衬垫距离一个衬垫的宽度。
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