CN1771604A - 半导体元件及其制造方法 - Google Patents

半导体元件及其制造方法 Download PDF

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CN1771604A
CN1771604A CNA2004800094732A CN200480009473A CN1771604A CN 1771604 A CN1771604 A CN 1771604A CN A2004800094732 A CNA2004800094732 A CN A2004800094732A CN 200480009473 A CN200480009473 A CN 200480009473A CN 1771604 A CN1771604 A CN 1771604A
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R·巴特梅斯
H·-J·舒尔泽
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Infineon Technologies AG
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Abstract

本发明涉及一种用于制造半导体元件的方法，该方法包括下列方法步骤：在使用连接电极(40)作为掩膜的情况下利用高能粒子照射半导体本体(100)的正面(101)，以便在该半导体本体(100)中产生用于重组第一和第二导电类型的载流子的重组中心(80A、80B)。

Description

半导体元件及其制造方法
技术领域
本发明涉及一种用于制造垂直半导体元件的方法，该元件具有半导体本体，该半导体本体具有内部区域、至少一个存在于该内部区域内的pn结和布置在该内部区域和边缘之间的边缘区域。在垂直方向上、也就是与半导体本体的正面和反面垂直地施加适当电压的情况下电流流过这种元件。这种具有内部区域和邻接该内部区域的边缘区域的垂直半导体元件例如在US 6,351,024 B1中有所介绍，其中该内部区域具有pn结。
背景技术
在断开这种半导体元件时，也就是在施加阻断pn结的电压时，正如下面简要介绍的那样边缘区域具有重要意义。在导电极化的pn结的情况下，边缘区域由于扩散同样充满载流子、也就是电极和空穴。在断开该元件时，必须将这些载流子从边缘区域排出，这导致在内部区域的邻接边缘区域的这些区域内必须比在内部区域的其余区域内排出明显更高的电荷。在断开时从边缘区域流出的载流子、特别是空穴在此情况下可以有助于产生附加的载流子(雪崩效应)，这导致由于动态开始的雪崩效应而提高了开关损耗，并在最不利的情况下导致元件损坏。断开时边缘区域内与内部区域相比增加的电流密度限制了借助于该元件可整体开关的电流。
为减轻这一问题，从上述的US 6,351,024 B1中基本上公知降低边缘区域内载流子的寿命。这一点例如通过借助于利用高能粒子照射边缘区域而产生附加的重组中心来实现。这种公知方法的缺点是，需要采用难以调整的金属掩膜的昂贵技术。此外，还应有利地降低元件内部区域内的载流子寿命，这需要第二种昂贵的掩膜和照射技术。
发明内容
本发明的目的因此在于，提供一种用于制造具有改善的断开特性的垂直半导体元件的简单且成本低廉的方法和一种具有改善的断开特性的垂直半导体元件。
该目的通过依据权利要求1所述特征的方法和通过依据权利要求11所述特征的半导体元件得以实现。
依据本发明的用于制造半导体元件的方法包括制备半导体本体，它具有正面、反面、内部区域、边缘和布置在内部区域和边缘之间的边缘区域，并且它具有在内部区域和边缘区域内的第一导电类型的第一半导体区和至少一个布置在内部区域内并且在正面区域内的、与第一导电类型互补的第二导电类型的第二半导体区。这种具有在内部区域内的pn结并具有边缘区域的半导体本体的制造充分公开，因此对此不进行进一步讨论。
在半导体本体的正面的第二半导体区上随后制造连接电极，通过该电极可电接触后来的元件的第二半导体区。接着利用例如质子或者氦原子的高能粒子对半导体本体的正面进行照射，其中连接电极用作照射方法的掩膜并导致粒子在由连接电极覆盖的内部区的区域内的渗入深度低于在没有被连接电极覆盖的边缘区的区域内。
被引入到半导体本体内的粒子产生重组中心，其中，在照射之后优选进行温度步骤，该温度步骤用于稳定重组中心。双空穴或者A中心(空穴/氧络合物)用作重组中心，该双空穴或者A中心通过照射和可选地随后的温度步骤产生。退火例如在220℃和360℃之间的温度下在取决于温度的持续时间在30分钟和4小时之间的情况下进行。
由照射引起的用作重组中心的空穴在n掺杂区域内具有高于在p掺杂区域内的重组效果，并在n掺杂区域内因此导致更大幅度缩短载流子寿命。高能粒子的照射能量和用作掩膜的连接电极的厚度这样彼此匹配，使得在连接电极的下面重组中心至少近似地仅在第二半导体区内产生。
由此可以在内部区域内第一半导体区为n掺杂而第二半导体区为p掺杂的情况下实现在第二半导体区内用于调整动态和静态特性所预期的载流子寿命的较小缩短，而在边缘区域内在第一半导体区中实现所期望的载流子寿命的大大缩短，以减少所述的断开时的雪崩效应。
为提高边缘区域内的耐电强度，在半导体本体内在正面区域内并且在边缘区域内存在至少一个第二导电类型的第三半导体区。在此情况下，在一实施例中存在至少两个第三半导体区，它们在朝边缘的方向上彼此相间隔并与第二半导体区相间隔。这种优选地环状环绕内部区域并因此称为场环(Feldringe)的第三半导体区的作用原理例如在Baliga的：“Power Semiconductor Devices”(PWS Publishing，1995，第98-100页)中有所描述。
在另一实施例中，第三半导体区邻接第二半导体区，其中该第三半导体区的掺杂在朝边缘的方向上减少。这种半导体区也称为VLD区(VLD＝Variation ofLateral Doping，横向掺杂变化)。
高能粒子的照射能量这样来选择，使得这些粒子在边缘区域内如此深地渗入半导体本体内，以致重组区基本上在用于提高边缘区域内的耐电强度的第三半导体区的下面、也就是在第一半导体区内产生。更有利地，半导体本体在边缘上斜切，这是用于提高边缘区域内的耐电强度的公知措施，但对于本方法的效果而言却不是必需的。
依据本发明的方法能够以简单的方式在将连接电极用作掩膜的情况下制造在内部区域的第二半导体区内具有较小重组效果的重组区和在边缘区域的第一半导体区内具有较高重组效果的重组区。
依据本发明的半导体元件包括半导体本体，它具有正面、反面、内部区域、边缘、布置在内部区域和边缘之间的边缘区域、在内部区域和边缘区域内的第一导电类型的第一半导体区和至少一个布置在内部区域内并且在正面区域内的与第一导电类型互补的第二导电类型的第二半导体区。在第二半导体区上，在半导体本体的正面上涂覆连接电极。此外，存在具有重组中心的重组区，该重组区被布置在连接电极下面的第二半导体区内和在边缘区域内的第一半导体区内。
为提高边缘区域内的耐电强度，第二导电类型的场环或者VLD区优选地存在于正面下面的边缘区域内。
附图说明
下面借助附图以实施例对本发明进行更详细的说明。其中：
图1示出在依据本发明的方法中作为出发点的半导体本体的部分横截面；
图2示出在用于制造半导体元件的下个方法步骤期间按照图1的半导体本体；
图3示出利用依据本发明的方法制造的半导体元件的部分横截面；
图4示出按照图3的半导体元件的示意性的俯视图；
图5示出另一半导体本体的部分横截面，该另一半导体本体构成依据本发明的方法的一个实施例的出发点；
图6示出在用于制造半导体元件的另一方法步骤期间按照图5的半导体本体；
图7示出依据本发明的半导体元件的部分横截面。
只要没有其他说明，附图中相同的附图标记表示具有相同意义的相同部分。
具体实施方式
下面借助制造垂直功率二极管的图1-3来说明依据本发明的用于制造半导体元件的方法。该方法包括制备图1中部分地以横截面示出的半导体本体100。该半导体本体100具有正面101、反面102以及在该实施例中斜切分布的边缘105。该半导体本体包括与边缘105相间隔的内部区域103和布置在内部区域103和边缘之间的边缘区域104。所示的半导体本体100具有n本底掺杂(Grunddotierung)，其中具有这种本底掺杂的半导体区域下面称为第一半导体区20。在该第一半导体区20内，在正面101下面的内部区域103内引入p掺杂的第二半导体区30，从而在内部区域103内在该第二半导体区30和第一半导体区20之间形成pn结。在边缘区域104内，在正面101的下面存在p掺杂的场环62、64，它们从第二半导体区30出发在朝边缘105的方向上彼此相间隔并与第二半导体区30相间隔地布置。在正面101的区域内用作沟道截断环的n掺杂的半导体区70直接邻接边缘105。
半导体本体100此外还包括高n掺杂的第五半导体区50，它在反面102的区域内邻接第一半导体区20。该高n掺杂的用作n发射极的半导体区50形成作为二极管构造的后来的半导体元件的阴极区。第一半导体区20在内部区域103内形成n基极，而p掺杂的用作p发射极的第二半导体区30形成阳极区。边缘区域104内的场环62、64以公知的方式用于提高边缘区域内元件的耐电强度。同样公知的边缘105的斜切用于同一目的。
图1中所示的具有所述半导体区的半导体本体的制备已充分公开，因此可以放弃对此的进一步说明。
如图2所示，在半导体本体100的正面101在第二半导体区30(p发射极)的区域内涂覆连接电极40，该连接电极40用于p发射极30的以后的电接触。接着利用例如质子或者氦原子的高能粒子照射半导体本体100的正面101，该高能粒子渗入半导体本体100内。连接电极40下面的渗入深度在此情况下低于在其余区域内的渗入深度，因为在渗入半导体本体100内之前连接电极40就已经抑制了高能粒子。利用高能粒子来照射半导体本体100用于在半导体本体内产生重组中心，目的是降低载流子寿命。例如双空穴或者A中心的这种重组中心通过由高能粒子引起的晶格中的空穴形成。在例如采用质子或者氦原子进行照射时，在这种情况下利用以下效应，即最高的空穴浓度在相当窄的区、即所谓的“End-of-range”区域内产生，在该区域内照射粒子释放出其能量的大部分并因此受到抑制。
在采用高能粒子进行这种照射之后优选进行退火处理，其中在30分钟和4小时之间的持续时间内将半导体本体加热到220℃和360℃之间，以稳定重组中心。
高能粒子的渗入深度取决于照射能量，而在连接电极40的区域内取决于该连接电极40的厚度。照射能量和该连接电极40的厚度在此情况下这样相互匹配，使得重组中心在连接电极40下面在p掺杂的第二半导体区30内产生。重组中心在p掺杂区30内具有小于在边缘区域内的n掺杂的第一半导体区20内的重组效果，因此重组中心在该p掺杂区30内引起比在n掺杂的区域10内更小的载流子寿命缩短。除了边缘区域104内的第一半导体区20外，也希望在p掺杂的阳极区30内在一定程度上缩短载流子寿命，以便能够由此调整元件的静态和动态特性。
此外，高能粒子的照射能量这样来选择，使得重组中心在边缘区域104内基本上在场环62、64和沟道截断环70下面的第一半导体区20(n基极)内产生。
图3示意性地示出结果在内部区域103内的连接电极40下面和在边缘区域104内的重组中心的空间位置，其中附图标记80A表示阳极区30内的重组区，附图标记80B表示边缘区域104内的重组区。连接电极下面的重组区80A在此情况下更靠近正面101，因为高能粒子在其渗入到半导体本体100中之前在该区域内通过连接电极40已经得到抑制。在不存在连接电极的边缘区域104内，高能粒子相应更深地渗入半导体本体101内，因此重组中心80B在这里更加远离正面101。因为各粒子的照射能量受到波动并由于半导体光栅中统计的散射效应，产生在半导体本体的垂直方向上具有确定宽度的重组区80A、80B，其中该宽度此外也取决于照射能量。绝大部分重组中心在此情况下处于照射的所谓的End-of-Range区域内。
依据本发明的方法能够以简单的方式制造具有pn结的垂直半导体元件，在该垂直半导体元件的边缘区域104内通过重组中心达到有效缩短载流子寿命的目的，其中附加地在内部区域103内在二极管的情况下用作p发射极的第二半导体区30内同样达到缩短载流子寿命的目的，但该缩短却低于在边缘区域内的缩短。
依据本发明的方法不局限于半导体二极管的制造，而更确切地说可以在任意的垂直半导体元件、例如MOS晶体管、IGBT或者晶闸管的情况下应用，其中这些垂直半导体元件在内部区域内具有pn结并且在这些垂直半导体元件的情况下希望缩短边缘区域内的载流子寿命。
除了上述的高能粒子在内部区域103内的渗入深度通过连接电极40的厚度来调整的可能性外，还存在通过选择电极材料来影响渗入深度的可能性。在此情况下适用的是，高能粒子渗入到半导体本体内的深度越小，电极材料“越密”。例如适合的电极材料有：金(Au)、铜(Cu)、钼(Mb)、钛(Ti)或者钨(W)。
图4示意性地示出图3中所示的半导体元件的正面101的俯视图，该半导体元件在该实施例中被构造成圆形且具有环绕的边缘105和边缘区域104。需要指出的是，图4中的图示未按正确比例，在该图示中边缘区域104在面积上明显大于内部区域103。
图5-7示出用于制造另一种作为二极管构成的半导体元件的方法，其中该方法与图1-3中所示的方法的区别在于，代替场环(图1-3中附图标记62、64)，所使用的半导体本体具有作为第三半导体区的VLD区60，该VLD区在朝边缘105的方向上邻接第二半导体区30并且其掺杂从第二半导体区30出发在朝边缘105的方向上减少。这种VLD区例如通过以下方式来实现，即该区60由多个在横向上并排布置的半导体区60A、60B、60C组成。这些半导体区60A-60C内的掺杂在此情况下可以分别是均匀的，其中该掺杂在朝边缘105的方向上从半导体区60A、60B向半导体区60B、60C减少。
用于制造该半导体元件的其余方法步骤、即涂覆连接电极40、利用高能粒子照射半导体本体的正面101和可选地在照射之后的退火步骤与借助图1-3说明的方法相应。高能粒子的能量在此情况下在这里也这样来选择，使得重组区80B在边缘区域104内基本上在n基极20内、也就是在VLD区60的下面产生。
为使该元件完整，可以在反面102涂覆另一连接电极90，它能够实现高n掺杂的半导体区的电接触并且在二极管的情况下用作阴极电极。
附图标记
20                   第一半导体区，n基极
30                   第二半导体区，p发射极
50                   第四半导体区，n发射极
60、60A、60B、60C    VLD区
62、64               第三半导体区，场环
70                   沟道截断环
80A、80B             重组区
100                  半导体本体
101                  正面
102                  反面
103                  内部区域
104                  边缘区域
105                  边缘

Claims (16)

1.用于制造半导体元件的方法，该方法包括下列方法步骤：
-制备半导体本体(100)，该半导体本体具有正面(101)、反面(102)、内部区域(103)、边缘(105)和布置在内部区域(103)和边缘(105)之间的边缘区域(104)，并且该半导体本体具有在内部区域(103)和边缘区域(104)内的第一导电类型的第一半导体区(20)和至少一个布置在内部区域(103)内并且在正面(101)区域内的、与第一导电类型互补的第二导电类型的第二半导体区(30)，
-在半导体本体的正面(101)在第二半导体区(30)上制造连接电极(40)，
-在使用连接电极(40)作为掩膜的情况下利用高能粒子照射正面(101)，以便在半导体本体(100)中产生用于重组第一和第二导电类型的载流子的重组中心(80A、80B)。
2.按权利要求1所述的方法，其中，在引入高能粒子之后进行温度处理，用于稳定半导体本体(100)中的重组中心。
3.按权利要求2所述的方法，其中，在220℃和360℃之间的温度和30分钟和4小时之间的持续时间的情况下进行温度处理。
4.按权利要求1-3之一所述的方法，其中，高能粒子为质子或者氦原子。
5.按前述权利要求之一所述的方法，其中，高能粒子的能量和用作掩膜的连接电极(40)的厚度这样相互匹配，使得在连接电极(40)下面重组中心至少近似地仅在第二半导体区(30)内产生。
6.按前述权利要求之一所述的方法，其中，半导体本体(100)在边缘区域(104)内并且在正面(101)区域内具有至少一个第二导电类型的第三半导体区(60；62、64)，其中高能粒子的能量这样来选择，使得重组中心在边缘区域(104)内至少近似地仅在第一半导体区(20)内产生。
7.按权利要求6所述的方法，其中，半导体本体(100)具有第三半导体区(60)，其掺杂浓度从内部区域(103)出发在朝边缘(105)的方向上降低。
8.按权利要求7所述的方法，其中，第三半导体区(60)邻接第二半导体区。
9.按权利要求6所述的方法，其中，半导体本体(100)具有至少两个第三半导体区(62、64)，它们被布置成在朝边缘(105)的方向上彼此相间隔并与第二半导体区(30)相间隔。
10.按前述权利要求之一所述的方法，其中，在半导体本体(100)的反面(102)区域内产生第一导电类型的第四区(50)，其比第一区(20)更高地被掺杂。
11.一种半导体元件，该半导体元件具有下列特征：
-半导体本体(100)，该半导体本体具有正面(101)、反面(102)、内部区域(103)和布置在内部区域(103)和边缘(105)之间的边缘区域(104)，并且该半导体本体具有在内部区域(103)和边缘区域(104)内的第一导电类型的第一半导体区(20)和至少一个布置在内部区域(103)内并且在正面(101)区域内的、与第一导电类型互补的第二导电类型的第二半导体区(30)，
-在半导体本体的正面(101)涂覆在第二半导体区(30)上的连接电极(40)，
-具有重组中心的重组区(80A、80B)，该重组区被布置在连接电极(40)下面的第二半导体区(30)内和边缘区域内的第一半导体区(20)内。
12.按权利要求11所述的半导体元件，其中，在边缘区域(104)内并且在正面(101)区域内设置有至少一个第二导电类型的第三半导体区(60；62、64)。
13.按权利要求12所述的半导体元件，其中，存在第三半导体区(60)，其掺杂浓度从内部区域(103)出发在朝边缘(105)的方向上降低。
14.按权利要求13所述的半导体元件，其中，第三半导体区(60)邻接第二半导体区(30)。
15.按权利要求12所述的半导体元件，其中，存在至少两个第四半导体区(62、64)，它们被布置成在朝边缘(105)的方向上相间隔并与第二半导体区(30)相间隔。
16.按前述权利要求之一所述的半导体元件，其中，在半导体本体(100)的反面(102)区域内存在第一导电类型的第四区(50)，其比第一区(20)更高地被掺杂。
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US20080132048A1 (en) 2008-06-05
CN1771604B (zh) 2010-04-07
US7319250B2 (en) 2008-01-15
US8187937B2 (en) 2012-05-29
EP1611613B1 (de) 2016-03-02
JP4518076B2 (ja) 2010-08-04
US20060086991A1 (en) 2006-04-27
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