CN1705129A - 具有形成在电容器上的可流动绝缘层的半导体装置及其制造方法 - Google Patents
具有形成在电容器上的可流动绝缘层的半导体装置及其制造方法 Download PDFInfo
- Publication number
- CN1705129A CN1705129A CNA2004101034976A CN200410103497A CN1705129A CN 1705129 A CN1705129 A CN 1705129A CN A2004101034976 A CNA2004101034976 A CN A2004101034976A CN 200410103497 A CN200410103497 A CN 200410103497A CN 1705129 A CN1705129 A CN 1705129A
- Authority
- CN
- China
- Prior art keywords
- insulation layer
- capacitor
- flowable insulation
- insulating barrier
- silicate glass
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000003990 capacitor Substances 0.000 title claims abstract description 68
- 238000009413 insulation Methods 0.000 title claims abstract description 60
- 230000009969 flowable effect Effects 0.000 title claims abstract description 58
- 238000000034 method Methods 0.000 title claims abstract description 49
- 239000004065 semiconductor Substances 0.000 title claims abstract description 23
- 239000000758 substrate Substances 0.000 claims abstract description 27
- 239000005368 silicate glass Substances 0.000 claims abstract description 21
- 229910052751 metal Inorganic materials 0.000 claims abstract description 11
- 239000002184 metal Substances 0.000 claims abstract description 11
- 230000004888 barrier function Effects 0.000 claims description 73
- 238000010438 heat treatment Methods 0.000 claims description 15
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 14
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims description 9
- 229920003209 poly(hydridosilsesquioxane) Polymers 0.000 claims description 9
- 238000005498 polishing Methods 0.000 claims description 7
- 238000004519 manufacturing process Methods 0.000 claims description 6
- 238000007669 thermal treatment Methods 0.000 claims description 5
- QYKABQMBXCBINA-UHFFFAOYSA-N 4-(oxan-2-yloxy)benzaldehyde Chemical compound C1=CC(C=O)=CC=C1OC1OCCCC1 QYKABQMBXCBINA-UHFFFAOYSA-N 0.000 claims description 4
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 claims description 4
- GQPLMRYTRLFLPF-UHFFFAOYSA-N Nitrous Oxide Chemical compound [O-][N+]#N GQPLMRYTRLFLPF-UHFFFAOYSA-N 0.000 claims description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 4
- 239000001301 oxygen Substances 0.000 claims description 4
- 229910052760 oxygen Inorganic materials 0.000 claims description 4
- 238000004528 spin coating Methods 0.000 claims description 4
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 claims description 3
- 125000002496 methyl group Chemical group [H]C([H])([H])* 0.000 claims description 3
- 239000003595 mist Substances 0.000 claims description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 2
- 239000011248 coating agent Substances 0.000 claims description 2
- 238000000576 coating method Methods 0.000 claims description 2
- 239000001257 hydrogen Substances 0.000 claims description 2
- 150000002431 hydrogen Chemical class 0.000 claims description 2
- 229910052739 hydrogen Inorganic materials 0.000 claims description 2
- 239000001272 nitrous oxide Substances 0.000 claims description 2
- 239000007788 liquid Substances 0.000 claims 5
- 239000000463 material Substances 0.000 claims 5
- 238000010276 construction Methods 0.000 claims 2
- 239000010410 layer Substances 0.000 description 61
- 230000002093 peripheral effect Effects 0.000 description 15
- 230000015572 biosynthetic process Effects 0.000 description 11
- 238000005530 etching Methods 0.000 description 8
- 238000007796 conventional method Methods 0.000 description 6
- 239000005380 borophosphosilicate glass Substances 0.000 description 5
- 238000000151 deposition Methods 0.000 description 5
- 230000008021 deposition Effects 0.000 description 5
- 238000005137 deposition process Methods 0.000 description 5
- 230000006866 deterioration Effects 0.000 description 4
- 230000002950 deficient Effects 0.000 description 2
- 208000002925 dental caries Diseases 0.000 description 2
- 239000003989 dielectric material Substances 0.000 description 2
- 239000012530 fluid Substances 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 238000010992 reflux Methods 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 1
- 208000027418 Wounds and injury Diseases 0.000 description 1
- GDFCWFBWQUEQIJ-UHFFFAOYSA-N [B].[P] Chemical compound [B].[P] GDFCWFBWQUEQIJ-UHFFFAOYSA-N 0.000 description 1
- 238000007743 anodising Methods 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(iv) oxide Chemical group O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 description 1
- 208000014674 injury Diseases 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 239000000376 reactant Substances 0.000 description 1
- 238000004062 sedimentation Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H01L21/02134—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material comprising hydrogen silsesquioxane, e.g. HSQ
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H01L21/02137—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material comprising alkyl silsesquioxane, e.g. MSQ
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
- H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
- H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/31604—Deposition from a gas or vapour
- H01L21/31633—Deposition of carbon doped silicon oxide, e.g. SiOC
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/09—Manufacture or treatment with simultaneous manufacture of the peripheral circuit region and memory cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/312—Organic layers, e.g. photoresist
- H01L21/3121—Layers comprising organo-silicon compounds
- H01L21/3122—Layers comprising organo-silicon compounds layers comprising polysiloxane compounds
- H01L21/3124—Layers comprising organo-silicon compounds layers comprising polysiloxane compounds layers comprising hydrogen silsesquioxane
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/5329—Insulating materials
- H01L23/53295—Stacked insulating layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/60—Electrodes
- H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
- H01L28/90—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions
- H01L28/91—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions made by depositing layers, e.g. by depositing alternating conductive and insulating layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
- H10B12/315—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor with the capacitor higher than a bit line
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Plasma & Fusion (AREA)
- Semiconductor Memories (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
本发明揭露一种具有形成在电容器上的可流动绝缘层的半导体装置,及其制造方法。尤其,该半导体装置包含:形成在衬底预定部分之上的电容器;通过在包括衬底和电容器的结果衬底结构上堆叠可流动绝缘层和未掺杂的硅酸盐玻璃层形成的绝缘层;和形成在绝缘层上的金属相互连接线。该方法包含下列步骤:在衬底的预定部分之上形成电容器;通过在包括衬底和电容器的结果衬底结构上,堆叠可流动绝缘层和未掺杂硅酸盐玻璃层,形成绝缘层;和在绝缘层上形成金属相互连接线。
Description
技术领域
本发明是关于一种半导体装置,尤其是关于具有电容器上的绝缘层的半导体装置,及其制造方法。
背景技术
就如广为人知的,半导体存储器装置集成的微型化和大型化的趋势已被大大地要求,以确保包含在动态随机存取存储器(DRAM)单元中的电容器有足够的电容值。为了得到足够的电容值,介电材料是通过堆叠氧化铝(Al2O3)和氧化铪(HfO2)形成,或电容器的上电极和下电极是通过使用金属,如氮化钛(TiN)形成。
因此,在电容器上方形成绝缘层的案例中,绝缘层基本上应透过低温处理形成,以防止电容器的下层劣化,例如金属氧化,介电材料特性的劣化,和扩散。
此外,DRAM装置被分成其中形成电容器的单元区域和不形成电容器的外围电路区域。形成在单元区域的电容器应该具有较高的高度,以确保电容值。因此,在单元区域和外围电路区域之间的边界,会产生至少10,000的高度差。
因此,需要采用能够通过低温处理形成的绝缘材料和克服高度差,从而使能在电容器上的绝缘层的平坦化处理。
图1A到图1B为在制造DRAM装置的顺序处理中,用以在电容器上方形成绝缘层的传统方法的横截面图。尤其,图1A为传统形成的电容器,而图1B为传统形成在电容器上的绝缘层。
参照图1A,多个电容器C被形成在提供底绝缘层11、接触塞12和蚀刻停止层13的衬底结构上。每一个电容器C都包含要接触对应的接触塞12且具有圆柱形的下电极14,覆盖下电极14的介电层15,和形成在介电层15上的上电极16。电容器C典型是形成在DRAM单元区域,而非形成在外围电路区域。因此,在单元区域和外围电路区域之间的边界,存在有至少10,000的高度差。
参照图1B,使用等离子体增强化学气相沉积(PECVD)法形成的未掺杂的硅酸盐玻璃层(USG),被用作顶绝缘层D。对于使用PECVD法形成的基于USG的顶绝缘层D,会因先期沉积阶段的底部薄层17而产生接缝。该接缝会连续产生,通过中期沉积阶段的中间薄层18,到达最后沉积阶段的顶部薄层19。此接缝的产生是因为在单元区域和外围电路区域之间的边界的高度差。
接着,图1C为传统形成在电容器上的绝缘层的横截面图,其中绝缘层被平坦化,然后清洗。尤其在此图式中,说明有关用以在电容器上形成绝缘层中的传统方法的问题。
如图所示,通过PECVD法形成的基于未掺杂的硅酸盐玻璃层(USG)绝缘层D,透过化学机械抛光(CMP)处理或回蚀刻处理平坦化,然后清洗干净。此外,图中有一形成在产生接缝的区域的空腔20。
此空腔在后续的金属相互连接线形成处理期间会引发蚀刻残留物的产生,然后蚀刻残留物会变成在金属相互连接线之间形成桥的原因。
另一方面,为了要移除绝缘层D的空腔20,可以使用具有良好平坦化和台阶覆盖特性的高密度等离子体-化学气相沉积(HDP-CVD)法,形成绝缘层D。但是,HDP-CVD法的沉积机制是重复蚀刻和沉积的步骤,因此,会有在构成电容器的底层产生等离子体伤害的缺点。
再者,绝缘层D可以采用具有良好平坦化特性的臭氧-原硅酸四乙酯(ozone-tetraethylorthosilicate,O3-TEOS)。但是,若增加臭氧(O3)的浓度,以沉积厚度超过20,000的厚层,则O3-TEOS取决于显示上和下电极氧化的底层。
在使用能够回流(reflow)的硼磷硅酸盐玻璃(borophosphosilicate glass,BPSG)的情形下,因为当作绝缘层D的BPSG掺有硼(B)和磷(P),所以基本上要采用高温热处理,以在800℃的温度下回流BPSG。因此,不适合使用BPSG来执行低温处理。
发明内容
因此,本发明的目的是要提供一种具有通过执行低温处理,形成在电容器上,有良好平坦化特性,但不会使包含电容器的底层特性劣化的可流动绝缘层的半导体装置,及其制造方法。
根据本发明的一个方面,本发明提供一种半导体装置,包含:形成在衬底预定部分之上的电容器;通过堆叠可流动绝缘层和未掺杂的硅酸盐玻璃层,形成在含有衬底和电容器的结果衬底结构上的绝缘层;和形成在绝缘层上的金属相互连接线。
根据本发明的另一方面,本发明提供一种半导体装置的制造方法,包含下列步骤:在衬底的预定部分之上形成电容器;通过在含有衬底和电容器的结果衬底结构上,堆叠可流动绝缘层和未掺杂的硅酸盐玻璃层,形成绝缘层;和在绝缘层上形成金属相互连接线。
附图说明
根据下面参照相关附图的较佳实施例的说明,本发明上述的和其他的目的与特征将会变得更清楚,其中:
图1A和图1B为用以在动态随机存取存储器(DRAM)装置的电容器上,形成绝缘层的传统方法的横截面图;
图1C为当执行用以在电容器上形成绝缘层的传统方法时,所发生的问题的横截面图;
图2为根据本发明第一实施例,在电容器上形成绝缘层的横截面图;
图3为根据本发明第二实施例,在电容器上形成绝缘层的横截面图;及
图4为根据本发明第三实施例,在电容器上形成绝缘层的横截面图。
具体实施方式
下面,将根据本发明的较佳实施例,参照附图详细说明具有在电容器上的可流动绝缘层的半导体装置,及其制造方法。
图2到图4为各种衬底结构的横截面图,其中绝缘层是根据本发明的第一到第三实施例形成在电容器上。
首先,图2为根据本发明第一实施例的衬底结构范例。
如图所示,许多电容器C形成在提供第一绝缘层201,接触塞202和蚀刻停止层203的衬底上。每一个电容器C都包含与接触塞202接触且具有圆柱形形状的下电极204,覆盖下电极204的介电层205,和形成在介电层205上的上电极206。电容器C是形成在典型的DRAM单元区域中,而非形成在外围区域中。因此,在单元区域和外围区域之间的边界,存在至少约10,000的高度差。
接着,在电容器C上形成可流动绝缘层210,其在沉积可流动绝缘层210时,通过具有可流动性,不会在高度差很大的区域域产生接缝。
尤其,可流动绝缘层210可以通过采用旋涂介电(SOD)法形成,其中可以旋转速度约为60rpm到10000rprn的衬底上涂布液体源,如氢倍半硅氧烷(hydrogen silsesquioxane,HSQ)或甲基倍半硅氧烷(methylsilsesquioxane,MSQ)。此外,可流动绝缘层210也可以使用采用反应源,如四氢化硅(SiH4)和过氧化氢(H2O2)的低压化学气相沉积(LPCVD)法形成。尤其是使用反应源,如SiH4和H2O2的LPCVD法,是在小于约100Torr的压力下,在约-10℃到约40℃的温度,即放置晶圆的平板的温度的范围下,形成可流动绝缘层210。LPCVD是一种方法,其是因为在沉积处理时,在薄层中所含的反应剂具有很高的可流动性,所以沉积的薄膜相当地平坦。
在上述的沉积处理之后,接着执行热处理,以完全形成可流动绝缘层210。在此,热处理是为了移除存在在已沉积的可流动绝缘层210内部的杂质或水份,及密化可流动绝缘层210。热处理是通过炉管热处理和快速热处理其中之一,在氧气(O2)、臭氧(O3)、氮气(N2)、一氧化二氮(N2O)、或氢气(H2)和氧气(O2)的混合气体的气氛中进行。炉管热处理要在约200℃到约650℃的温度范围下执行超过约5分钟。快速热处理要在高于约300℃的温度下执行超过约1秒。
如上所示,此种型式的可流动绝缘层210,可以施以低温处理,且具有良好的平坦化特性。因此,可流动绝缘层210可以非常有用的方式,用以当作高度集成的和微型化半导体装置的层间绝缘层,即当作电容器上的绝缘层。
基于未掺杂的硅酸盐玻璃(USG)的绝缘层220,通过执行等离子体增强化学气相沉积(PECVD)法,形成在可流动绝缘层210之上。因为可流动绝缘层210已经减少衬底的高度差,所以不会在使用PECVD法形成的基于USG的绝缘层220中产生接缝。使用PECVD法形成的基于USG的绝缘层220,具有快速沉积速度和层稳定性的良好特性。
若单元区域和外围区域之间的高度差大于约10,000,则可以形成厚度范围从约500到约1,000的可流动绝缘层210,和厚度为约200到约30,000的基于USG的绝缘层220。下面,将形成在电容器C上的可流动绝缘层210和基于USG的绝缘层220称为第二绝缘层,在图2中以″D″表示。
接着,通过蚀刻或抛光已沉积的第二绝缘层D,上述的结果衬底结构被平坦化。在上述的平坦化处理之后,第二绝缘层D最好具有范围从约500到约5,000的剩余厚度。因为有可流动绝缘层210,所以不会产生接缝,因此在结果衬底结构被平坦化之后,不会在第二绝缘层D上形成图1C所示应用传统方法时典型会产生的空腔。
各种不同的方法都可用于平坦化衬底结构的方法。例如,可以采用先选择性湿蚀刻位于具有高高度差的区域,即电容器的上部的第二绝缘层D的预定厚度,于是可以减少高度差,然后将化学机械抛光(CMP)处理应用到衬底结构,用以平坦化。
图3为另一典型衬底结构的横截面图,其中绝缘层是根据本发明第二实施例形成在电容器上。
参照图3,许多电容器C形成在提供第一绝缘层30、接触塞302和蚀刻停止层303的衬底上。每一个电容器C都包含接触对应的接触塞302且具有圆柱形形状的下电极304,覆盖下电极304的介电层305,和形成在介电层305上的上电极306。电容器C是形成在典型的DRAM单元区域中,而非形成在外围区域中,因此,在单元区域和外围区域之间的边界,展现至少约10,000的高度差。
接着,通过PECVD法,在电容器C上,形成基于USG的绝缘层310。此时,基于USG的绝缘层310的沉积厚度应该小于高度差。当基于USG的绝缘层是在很大的高度差的状态下,通过执行PECVD法,形成在电容器上时,会有接缝产生。但是,根据第二实施例,基于USG的绝缘层310以相对减少的厚度形成,因此接缝的深度没有很深。
其次,在基于USG的绝缘层310上形成可流动绝缘层320。此时,在外围区域的可流动绝缘层320的高度高于电容器。即使由于基于USG的绝缘层310的形成而产生一点点接缝,但是在可流动绝缘层320形成之后,就不会有接缝产生。
如第一实施例的说明,可以使用当衬底结构以约60rpm到约1,000rpm的速度旋转时,用液体源,如HSQ或MSQ,涂布衬底结构的旋涂介电(SOD)法,形成可流动绝缘层320。此外,也可以使用采用反应源,如SiH4和H2O2的LPCVD法形成可流动绝缘层320。
可流动绝缘层320的形成是要经历过沉积处理和热处理。在沉积处理之后,执行热处理,以移除存在在已沉积的绝缘层320内部的杂质或水份,然后密化可流动绝缘层320。热处理是使用炉管热处理和快速热处理,在O2、O3、N2、N2或H2和O2的混合气体的气氛中进行。炉管热处理要在约200℃到约650℃的温度范围下执行超过约5分钟。快速热处理要在高于约300℃的温度下执行超过约1秒。下面,将可流动绝缘层320和基于USG的绝缘层310称为第二绝缘层,在图3中以″D″表示。
接着,通过蚀刻或抛光已沉积的第二绝缘层D,平坦化结果衬底结构。在此,用以平坦化衬底结构的方法和第一实施例所采用的方法相同。另一方面,根据本发明的第二实施例,也可以不需要此平坦化步骤。
图4为衬底结构的横截面图,其中绝缘层是根据本发明第三实施例形成在电容器上。
参照图4,多数电容器C形成在提供第一绝缘层401、接触塞401和蚀刻停止层403的衬底上。每一个电容器C都包含接触对应的接触塞402且具有圆柱形形状的下电极404,覆盖下电极404的介电层405,和形成在介电层405上的上电极406。电容器C是形成在典型的DRAM单元区域中,而非形成在外围区域中,从而在单元区域和外围区域之间的边界,展现至少10,000的高度差。
接着,使用PECVD法,在提供多个电容器C的衬底上,形成基于USG的绝缘层410。此时,形成的基于USG的绝缘层的厚度比单元区域和外围区域之间的高度差更厚。然后,透过蚀刻处理和/或抛光处理,基于USG的绝缘层410被平坦化。此时,当以传统方法形成上述基于USG的绝缘层410时,会产生接缝,其在平坦化处理之后还会造成空腔的形成。
根据本发明的第三实施例,可流动绝缘层420所形成足以埋藏空腔和平坦化结果衬底结构的厚度,即厚度范围从约200到约5,000。下面,将可流动绝缘层420和基于USG的绝缘层410称为第二绝缘层,在图4中以″D″表示。
因为有可流动绝缘层420的形成,所以不仅可以移除产生在基于USG的绝缘层410表面上的空腔,还可以移除缺陷,如平坦化处理,像化学机械抛光(CMP)处理期间所产生的刮痕。换言之,由于空腔所造成的桥的形成,和为了在第二绝缘层D上形成金属相互连接线而造成的缺陷,这些问题都可以解决。
如先前的实施例,可以采用反应源,如SiH4和H2O2的SOD法或LPCVD法,形成可流动绝缘层420。此外,可流动绝缘层420的形成也可通过沉积处理和热处理完成。
根据本发明,形成在单元区域的电容器具有很高的高度,以确保在高度集成和微型化的装置如DRAM中,有很高的电容值,因此展现在单元区域和外围区域之间有很大的高度差,而且在电容器上形成具有良好层稳定性的基于USG的绝缘层,及具有低温处理容许量和良好平坦化特性的可流动绝缘层。结果,可以防止包含电容器的底层,在低温处理期间劣化,及可以防止在平坦化处理期间,在后续的金属相互连接线之间形成桥。结果,有增加高度集成半导体装置产量的效果。
本申请书包含在2004年5月31日向韩国专利局提交的韩国专利申请第KR2004-0039228号的相关内容,此处将所有的内容都纳入参考。
本发明已对于特定较佳实施例详细说明,那些熟悉本项技术人士所做的各种不同的变化例和修正例,明显将不脱离本发明在后面的权利要求所界定的精神和范围。
主要装置符号说明
11 底绝缘层
12,202,302,402 接触塞
13,203,303,403 蚀刻停止层
14,204,304,404 下电极
15,205,305,405 介电层
16,206,306,406 上电极
17 底部薄层
18 中间薄层
19 顶部薄层
20 空腔
201,301,401 第一绝缘层
210,320,420 可流动绝缘层
220,310,410 基于USG的绝缘层
D 第二绝缘层
Claims (17)
1.一种半导体装置,包含:
形成在衬底的预定部分之上的电容器;
通过在包括衬底和电容器的结果衬底结构上堆叠可流动绝缘层和未掺杂的硅酸盐玻璃层而形成的绝缘层;及
形成在绝缘层上的金属相互连接线。
2.如权利要求1所述的半导体装置,其中可流动绝缘层是形成在结果结构上,而未掺杂的硅酸盐玻璃层则形成在可流动绝缘层上。
3.如权利要求1所述的半导体装置,其中未掺杂的硅酸盐玻璃层是形成在包括电容器的结果结构上,而可流动绝缘层则形成在未掺杂的硅酸盐玻璃层上。
4.如权利要求2所述的半导体装置,其中可流动绝缘层是通过采用将液体源材料涂布在旋转的衬底上,随后衬底再施以热处理的旋涂介电法得到。
5.如权利要求3所述的半导体装置,其中可流动绝缘层是通过采用将液体源材料涂布在旋转的衬底上,随后再施以热处理的旋涂介电法得到。
6.如权利要求2所述的半导体装置,其中可流动绝缘层是通过使用如四氢化硅(SiH4)和过氧化氢(H2O2)的反应源的低压化学气相沉积法得到。
7.如权利要求3所述的半导体装置,其中可流动绝缘层是通过使用如四氢化硅(SiH4)和过氧化氢(H2O2)的反应源的低压化学气相沉积法得到。
8.如权利要求4所述的半导体装置,其中液体源材料是氢倍半硅氧烷(HSQ)和甲基倍半硅氧烷(MSQ)其中之一。
9.如权利要求5所述的半导体装置,其中液体源材料是HSQ和MSQ其中之一。
10.一种半导体装置的制造方法,包含下列步骤:
在衬底的预定部分之上形成电容器;
通过在包括衬底和电容器的结果衬底结构上堆叠可流动绝缘层和未掺杂的硅酸盐玻璃层,形成绝缘层;及
在绝缘层上形成金属互连接线。
11.如权利要求10所述的方法,其中形成绝缘层的步骤包含下列步骤:
在结果衬底结构上形成厚度小于电容器的高度的可流动绝缘层;
通过执行等离子体增强化学气相沉积法,在可流动绝缘层上形成未掺杂的硅酸盐玻璃层;及
平坦化未掺杂的硅酸盐玻璃层和可流动绝缘层。
12.如权利要求10所述的方法,其中形成绝缘层的步骤包含下列步骤:
通过执行等离子体增强化学气相沉积法,在结果衬底结构上形成厚度小于电容器的高度的未掺杂的硅酸盐玻璃层;
在未掺杂的硅酸盐玻璃层上,形成可流动绝缘层;及
平坦化未掺杂的硅酸盐玻璃层和可流动绝缘层。
13.如权利要求10所述的方法,其中形成绝缘层的步骤包含下列步骤:
通过执行等离子体增强化学气相沉积法,在结果衬底结构上形成厚度大于电容器的高度的未掺杂的硅酸盐玻璃层;
平坦化未掺杂的硅酸盐玻璃层;及
在已平坦化的未掺杂的硅酸盐玻璃层上形成可流动绝缘层。
14.如权利要求10所述的方法,其中形成可流动绝缘层的步骤包含下列步骤:
用选择自氢倍半硅氧烷(HSQ)和甲基倍半硅氧烷(MSQ)的液体源材料,通过旋转衬底,以薄层形式涂布在衬底上;及
对涂布的薄层执行热处理。
15.如权利要求10所述的方法,其中形成可流动绝缘层的步骤包含下列步骤:
通过使用四氢化硅(SiH4)和过氧化氢(H2O2)的反应源的低压化学气相沉积法,沉积薄层;及
对薄层执行热处理过程。
16.如权利要求10所述的方法,其中热处理是通过采用炉热处理过程和快速热处理过程其中之一,在选择自由氧气(O2)、臭氧(O3)、氮气(N2)、一氧化二氮(N2O)及氢气(H2)和氧气(O2)的混合气体所组成的组的气氛中进行。
17.如权利要求10所述的方法,其中平坦化处理是通过蚀刻处理和抛光处理其中之一执行。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020040039228A KR100624566B1 (ko) | 2004-05-31 | 2004-05-31 | 커패시터 상부에 유동성 절연막을 갖는 반도체소자 및 그제조 방법 |
KR1020040039228 | 2004-05-31 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1705129A true CN1705129A (zh) | 2005-12-07 |
CN100373624C CN100373624C (zh) | 2008-03-05 |
Family
ID=35425911
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2004101034976A Expired - Fee Related CN100373624C (zh) | 2004-05-31 | 2004-12-28 | 半导体存储器装置及其制造方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US7538007B2 (zh) |
KR (1) | KR100624566B1 (zh) |
CN (1) | CN100373624C (zh) |
TW (1) | TWI267187B (zh) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9607856B2 (en) | 2013-03-05 | 2017-03-28 | Applied Materials, Inc. | Selective titanium nitride removal |
CN107578996A (zh) * | 2017-08-31 | 2018-01-12 | 长江存储科技有限责任公司 | 一种三维存储器及其平坦化方法 |
CN108269807A (zh) * | 2017-01-03 | 2018-07-10 | 联华电子股份有限公司 | 半导体元件的制作方法 |
CN109427786A (zh) * | 2017-08-21 | 2019-03-05 | 联华电子股份有限公司 | 半导体存储装置及其制作工艺 |
CN109755243A (zh) * | 2017-11-02 | 2019-05-14 | 联华电子股份有限公司 | 半导体元件及其制作方法 |
CN114975450A (zh) * | 2022-06-22 | 2022-08-30 | 福建省晋华集成电路有限公司 | 半导体存储装置及其制作方法 |
Families Citing this family (96)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7037840B2 (en) * | 2004-01-26 | 2006-05-02 | Micron Technology, Inc. | Methods of forming planarized surfaces over semiconductor substrates |
US9324576B2 (en) | 2010-05-27 | 2016-04-26 | Applied Materials, Inc. | Selective etch for silicon films |
US10283321B2 (en) | 2011-01-18 | 2019-05-07 | Applied Materials, Inc. | Semiconductor processing system and methods using capacitively coupled plasma |
US9064815B2 (en) | 2011-03-14 | 2015-06-23 | Applied Materials, Inc. | Methods for etch of metal and metal-oxide films |
US8999856B2 (en) | 2011-03-14 | 2015-04-07 | Applied Materials, Inc. | Methods for etch of sin films |
US9267739B2 (en) | 2012-07-18 | 2016-02-23 | Applied Materials, Inc. | Pedestal with multi-zone temperature control and multiple purge capabilities |
US9373517B2 (en) | 2012-08-02 | 2016-06-21 | Applied Materials, Inc. | Semiconductor processing with DC assisted RF power for improved control |
US9132436B2 (en) | 2012-09-21 | 2015-09-15 | Applied Materials, Inc. | Chemical control features in wafer process equipment |
US10256079B2 (en) | 2013-02-08 | 2019-04-09 | Applied Materials, Inc. | Semiconductor processing systems having multiple plasma configurations |
US9362130B2 (en) | 2013-03-01 | 2016-06-07 | Applied Materials, Inc. | Enhanced etching processes using remote plasma sources |
US9773648B2 (en) | 2013-08-30 | 2017-09-26 | Applied Materials, Inc. | Dual discharge modes operation for remote plasma |
KR20150034981A (ko) * | 2013-09-27 | 2015-04-06 | 에스케이하이닉스 주식회사 | 반도체 장치의 제조 방법 |
US9520303B2 (en) | 2013-11-12 | 2016-12-13 | Applied Materials, Inc. | Aluminum selective etch |
US9299537B2 (en) | 2014-03-20 | 2016-03-29 | Applied Materials, Inc. | Radial waveguide systems and methods for post-match control of microwaves |
US9903020B2 (en) | 2014-03-31 | 2018-02-27 | Applied Materials, Inc. | Generation of compact alumina passivation layers on aluminum plasma equipment components |
US9309598B2 (en) | 2014-05-28 | 2016-04-12 | Applied Materials, Inc. | Oxide and metal removal |
US9496167B2 (en) | 2014-07-31 | 2016-11-15 | Applied Materials, Inc. | Integrated bit-line airgap formation and gate stack post clean |
US9613822B2 (en) | 2014-09-25 | 2017-04-04 | Applied Materials, Inc. | Oxide etch selectivity enhancement |
US9355922B2 (en) | 2014-10-14 | 2016-05-31 | Applied Materials, Inc. | Systems and methods for internal surface conditioning in plasma processing equipment |
US9966240B2 (en) | 2014-10-14 | 2018-05-08 | Applied Materials, Inc. | Systems and methods for internal surface conditioning assessment in plasma processing equipment |
US11637002B2 (en) | 2014-11-26 | 2023-04-25 | Applied Materials, Inc. | Methods and systems to enhance process uniformity |
US10224210B2 (en) | 2014-12-09 | 2019-03-05 | Applied Materials, Inc. | Plasma processing system with direct outlet toroidal plasma source |
US10573496B2 (en) | 2014-12-09 | 2020-02-25 | Applied Materials, Inc. | Direct outlet toroidal plasma source |
US11257693B2 (en) | 2015-01-09 | 2022-02-22 | Applied Materials, Inc. | Methods and systems to improve pedestal temperature control |
US9728437B2 (en) | 2015-02-03 | 2017-08-08 | Applied Materials, Inc. | High temperature chuck for plasma processing systems |
US20160225652A1 (en) | 2015-02-03 | 2016-08-04 | Applied Materials, Inc. | Low temperature chuck for plasma processing systems |
US9881805B2 (en) | 2015-03-02 | 2018-01-30 | Applied Materials, Inc. | Silicon selective removal |
US9691645B2 (en) | 2015-08-06 | 2017-06-27 | Applied Materials, Inc. | Bolted wafer chuck thermal management systems and methods for wafer processing systems |
US9741593B2 (en) | 2015-08-06 | 2017-08-22 | Applied Materials, Inc. | Thermal management systems and methods for wafer processing systems |
US9349605B1 (en) | 2015-08-07 | 2016-05-24 | Applied Materials, Inc. | Oxide etch selectivity systems and methods |
US10504700B2 (en) | 2015-08-27 | 2019-12-10 | Applied Materials, Inc. | Plasma etching systems and methods with secondary plasma injection |
US10889082B2 (en) | 2016-04-20 | 2021-01-12 | Sony Corporation | Laminated structure and method for producing the same |
US10522371B2 (en) | 2016-05-19 | 2019-12-31 | Applied Materials, Inc. | Systems and methods for improved semiconductor etching and component protection |
US10504754B2 (en) | 2016-05-19 | 2019-12-10 | Applied Materials, Inc. | Systems and methods for improved semiconductor etching and component protection |
US9865484B1 (en) | 2016-06-29 | 2018-01-09 | Applied Materials, Inc. | Selective etch using material modification and RF pulsing |
US10062575B2 (en) | 2016-09-09 | 2018-08-28 | Applied Materials, Inc. | Poly directional etch by oxidation |
US10629473B2 (en) | 2016-09-09 | 2020-04-21 | Applied Materials, Inc. | Footing removal for nitride spacer |
US10062585B2 (en) | 2016-10-04 | 2018-08-28 | Applied Materials, Inc. | Oxygen compatible plasma source |
US9934942B1 (en) | 2016-10-04 | 2018-04-03 | Applied Materials, Inc. | Chamber with flow-through source |
US9721789B1 (en) | 2016-10-04 | 2017-08-01 | Applied Materials, Inc. | Saving ion-damaged spacers |
US10546729B2 (en) | 2016-10-04 | 2020-01-28 | Applied Materials, Inc. | Dual-channel showerhead with improved profile |
US10062579B2 (en) | 2016-10-07 | 2018-08-28 | Applied Materials, Inc. | Selective SiN lateral recess |
US9947549B1 (en) | 2016-10-10 | 2018-04-17 | Applied Materials, Inc. | Cobalt-containing material removal |
US9768034B1 (en) | 2016-11-11 | 2017-09-19 | Applied Materials, Inc. | Removal methods for high aspect ratio structures |
US10163696B2 (en) | 2016-11-11 | 2018-12-25 | Applied Materials, Inc. | Selective cobalt removal for bottom up gapfill |
US10026621B2 (en) | 2016-11-14 | 2018-07-17 | Applied Materials, Inc. | SiN spacer profile patterning |
US10242908B2 (en) | 2016-11-14 | 2019-03-26 | Applied Materials, Inc. | Airgap formation with damage-free copper |
US10566206B2 (en) | 2016-12-27 | 2020-02-18 | Applied Materials, Inc. | Systems and methods for anisotropic material breakthrough |
US10403507B2 (en) | 2017-02-03 | 2019-09-03 | Applied Materials, Inc. | Shaped etch profile with oxidation |
US10431429B2 (en) | 2017-02-03 | 2019-10-01 | Applied Materials, Inc. | Systems and methods for radial and azimuthal control of plasma uniformity |
US10043684B1 (en) | 2017-02-06 | 2018-08-07 | Applied Materials, Inc. | Self-limiting atomic thermal etching systems and methods |
US10319739B2 (en) | 2017-02-08 | 2019-06-11 | Applied Materials, Inc. | Accommodating imperfectly aligned memory holes |
US10943834B2 (en) | 2017-03-13 | 2021-03-09 | Applied Materials, Inc. | Replacement contact process |
US10319649B2 (en) | 2017-04-11 | 2019-06-11 | Applied Materials, Inc. | Optical emission spectroscopy (OES) for remote plasma monitoring |
US10950500B2 (en) | 2017-05-05 | 2021-03-16 | Applied Materials, Inc. | Methods and apparatus for filling a feature disposed in a substrate |
US11276559B2 (en) | 2017-05-17 | 2022-03-15 | Applied Materials, Inc. | Semiconductor processing chamber for multiple precursor flow |
US11276590B2 (en) | 2017-05-17 | 2022-03-15 | Applied Materials, Inc. | Multi-zone semiconductor substrate supports |
US10497579B2 (en) | 2017-05-31 | 2019-12-03 | Applied Materials, Inc. | Water-free etching methods |
US10049891B1 (en) | 2017-05-31 | 2018-08-14 | Applied Materials, Inc. | Selective in situ cobalt residue removal |
US10920320B2 (en) | 2017-06-16 | 2021-02-16 | Applied Materials, Inc. | Plasma health determination in semiconductor substrate processing reactors |
US10541246B2 (en) | 2017-06-26 | 2020-01-21 | Applied Materials, Inc. | 3D flash memory cells which discourage cross-cell electrical tunneling |
US10727080B2 (en) | 2017-07-07 | 2020-07-28 | Applied Materials, Inc. | Tantalum-containing material removal |
US10541184B2 (en) | 2017-07-11 | 2020-01-21 | Applied Materials, Inc. | Optical emission spectroscopic techniques for monitoring etching |
US10354889B2 (en) | 2017-07-17 | 2019-07-16 | Applied Materials, Inc. | Non-halogen etching of silicon-containing materials |
US10170336B1 (en) | 2017-08-04 | 2019-01-01 | Applied Materials, Inc. | Methods for anisotropic control of selective silicon removal |
US10043674B1 (en) | 2017-08-04 | 2018-08-07 | Applied Materials, Inc. | Germanium etching systems and methods |
US10297458B2 (en) | 2017-08-07 | 2019-05-21 | Applied Materials, Inc. | Process window widening using coated parts in plasma etch processes |
US10283324B1 (en) | 2017-10-24 | 2019-05-07 | Applied Materials, Inc. | Oxygen treatment for nitride etching |
US10128086B1 (en) | 2017-10-24 | 2018-11-13 | Applied Materials, Inc. | Silicon pretreatment for nitride removal |
US10256112B1 (en) | 2017-12-08 | 2019-04-09 | Applied Materials, Inc. | Selective tungsten removal |
US10903054B2 (en) | 2017-12-19 | 2021-01-26 | Applied Materials, Inc. | Multi-zone gas distribution systems and methods |
US11328909B2 (en) | 2017-12-22 | 2022-05-10 | Applied Materials, Inc. | Chamber conditioning and removal processes |
US10854426B2 (en) | 2018-01-08 | 2020-12-01 | Applied Materials, Inc. | Metal recess for semiconductor structures |
US10964512B2 (en) | 2018-02-15 | 2021-03-30 | Applied Materials, Inc. | Semiconductor processing chamber multistage mixing apparatus and methods |
US10679870B2 (en) | 2018-02-15 | 2020-06-09 | Applied Materials, Inc. | Semiconductor processing chamber multistage mixing apparatus |
TWI766433B (zh) | 2018-02-28 | 2022-06-01 | 美商應用材料股份有限公司 | 形成氣隙的系統及方法 |
US10593560B2 (en) | 2018-03-01 | 2020-03-17 | Applied Materials, Inc. | Magnetic induction plasma source for semiconductor processes and equipment |
US10319600B1 (en) | 2018-03-12 | 2019-06-11 | Applied Materials, Inc. | Thermal silicon etch |
US10497573B2 (en) | 2018-03-13 | 2019-12-03 | Applied Materials, Inc. | Selective atomic layer etching of semiconductor materials |
US10573527B2 (en) | 2018-04-06 | 2020-02-25 | Applied Materials, Inc. | Gas-phase selective etching systems and methods |
US10490406B2 (en) | 2018-04-10 | 2019-11-26 | Appled Materials, Inc. | Systems and methods for material breakthrough |
US10699879B2 (en) | 2018-04-17 | 2020-06-30 | Applied Materials, Inc. | Two piece electrode assembly with gap for plasma control |
US10886137B2 (en) | 2018-04-30 | 2021-01-05 | Applied Materials, Inc. | Selective nitride removal |
US10755941B2 (en) | 2018-07-06 | 2020-08-25 | Applied Materials, Inc. | Self-limiting selective etching systems and methods |
US10872778B2 (en) | 2018-07-06 | 2020-12-22 | Applied Materials, Inc. | Systems and methods utilizing solid-phase etchants |
US10672642B2 (en) | 2018-07-24 | 2020-06-02 | Applied Materials, Inc. | Systems and methods for pedestal configuration |
US11049755B2 (en) | 2018-09-14 | 2021-06-29 | Applied Materials, Inc. | Semiconductor substrate supports with embedded RF shield |
US10892198B2 (en) | 2018-09-14 | 2021-01-12 | Applied Materials, Inc. | Systems and methods for improved performance in semiconductor processing |
US11062887B2 (en) | 2018-09-17 | 2021-07-13 | Applied Materials, Inc. | High temperature RF heater pedestals |
US11417534B2 (en) | 2018-09-21 | 2022-08-16 | Applied Materials, Inc. | Selective material removal |
US11682560B2 (en) | 2018-10-11 | 2023-06-20 | Applied Materials, Inc. | Systems and methods for hafnium-containing film removal |
US11121002B2 (en) | 2018-10-24 | 2021-09-14 | Applied Materials, Inc. | Systems and methods for etching metals and metal derivatives |
US11437242B2 (en) | 2018-11-27 | 2022-09-06 | Applied Materials, Inc. | Selective removal of silicon-containing materials |
US11721527B2 (en) | 2019-01-07 | 2023-08-08 | Applied Materials, Inc. | Processing chamber mixing systems |
US10920319B2 (en) | 2019-01-11 | 2021-02-16 | Applied Materials, Inc. | Ceramic showerheads with conductive electrodes |
US11647624B2 (en) | 2020-12-15 | 2023-05-09 | Micron Technology, Inc. | Apparatuses and methods for controlling structure of bottom electrodes and providing a top-support thereof |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5674773A (en) * | 1996-03-15 | 1997-10-07 | Vanguard International Semiconductor Corporation | Method for planarizing high step-height integrated circuit structures |
KR100211540B1 (ko) * | 1996-05-22 | 1999-08-02 | 김영환 | 반도체소자의 층간절연막 형성방법 |
US6013583A (en) * | 1996-06-25 | 2000-01-11 | International Business Machines Corporation | Low temperature BPSG deposition process |
KR100238252B1 (ko) * | 1996-09-13 | 2000-01-15 | 윤종용 | Sog층 큐어링방법 및 이를 이용한 반도체장치의 절연막제조방법 |
US6551665B1 (en) * | 1997-04-17 | 2003-04-22 | Micron Technology, Inc. | Method for improving thickness uniformity of deposited ozone-TEOS silicate glass layers |
KR100256055B1 (ko) | 1997-08-28 | 2000-06-01 | 윤종용 | 평탄화 개선을 위한 반도체 장치 제조 방법 |
KR100269317B1 (ko) * | 1997-12-09 | 2000-12-01 | 윤종용 | 평탄화를위한반도체장치및그제조방법 |
US6025279A (en) * | 1998-05-29 | 2000-02-15 | Taiwan Semiconductor Manufacturing Company | Method of reducing nitride and oxide peeling after planarization using an anneal |
JP2000164716A (ja) * | 1998-11-26 | 2000-06-16 | Seiko Epson Corp | 半導体装置及びその製造方法 |
TW429579B (en) * | 1999-08-23 | 2001-04-11 | Taiwan Semiconductor Mfg | Manufacturing method of inter-layer dielectric |
KR100362834B1 (ko) * | 2000-05-02 | 2002-11-29 | 삼성전자 주식회사 | 반도체 장치의 산화막 형성 방법 및 이에 의하여 제조된 반도체 장치 |
KR100363093B1 (ko) * | 2000-07-28 | 2002-12-05 | 삼성전자 주식회사 | 반도체 소자의 층간 절연막 평탄화 방법 |
US6432827B1 (en) * | 2000-11-29 | 2002-08-13 | United Microelectronics Corp. | ILD planarization method |
CN1173397C (zh) | 2001-01-23 | 2004-10-27 | 联华电子股份有限公司 | 一种层间介电层平坦化的方法 |
KR100420117B1 (ko) * | 2001-03-12 | 2004-03-02 | 삼성전자주식회사 | 수소 확산방지막을 포함하는 반도체 장치 및 그 제조 방법 |
KR100366639B1 (ko) * | 2001-03-23 | 2003-01-06 | 삼성전자 주식회사 | 다공성 산화막 플러그에 의한 저저항 컨택 형성방법 및이를 이용한 반도체 장치의 형성방법 |
US20030036240A1 (en) * | 2001-08-17 | 2003-02-20 | Trivedi Jigish D. | Method of simultaneous formation of local interconnect and gate electrode |
-
2004
- 2004-05-31 KR KR1020040039228A patent/KR100624566B1/ko not_active IP Right Cessation
- 2004-12-07 TW TW093137699A patent/TWI267187B/zh not_active IP Right Cessation
- 2004-12-10 US US11/008,908 patent/US7538007B2/en active Active
- 2004-12-28 CN CNB2004101034976A patent/CN100373624C/zh not_active Expired - Fee Related
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9607856B2 (en) | 2013-03-05 | 2017-03-28 | Applied Materials, Inc. | Selective titanium nitride removal |
CN108269807A (zh) * | 2017-01-03 | 2018-07-10 | 联华电子股份有限公司 | 半导体元件的制作方法 |
CN108269807B (zh) * | 2017-01-03 | 2021-06-22 | 联华电子股份有限公司 | 半导体元件的制作方法 |
CN109427786A (zh) * | 2017-08-21 | 2019-03-05 | 联华电子股份有限公司 | 半导体存储装置及其制作工艺 |
US10818664B2 (en) | 2017-08-21 | 2020-10-27 | United Microelectronics Corp. | Method of forming semiconductor memory device |
CN109427786B (zh) * | 2017-08-21 | 2021-08-17 | 联华电子股份有限公司 | 半导体存储装置及其制作工艺 |
CN107578996A (zh) * | 2017-08-31 | 2018-01-12 | 长江存储科技有限责任公司 | 一种三维存储器及其平坦化方法 |
CN107578996B (zh) * | 2017-08-31 | 2019-02-22 | 长江存储科技有限责任公司 | 一种三维存储器及其平坦化方法 |
CN109755243A (zh) * | 2017-11-02 | 2019-05-14 | 联华电子股份有限公司 | 半导体元件及其制作方法 |
CN114975450A (zh) * | 2022-06-22 | 2022-08-30 | 福建省晋华集成电路有限公司 | 半导体存储装置及其制作方法 |
Also Published As
Publication number | Publication date |
---|---|
KR20050114035A (ko) | 2005-12-05 |
CN100373624C (zh) | 2008-03-05 |
US7538007B2 (en) | 2009-05-26 |
TW200539422A (en) | 2005-12-01 |
KR100624566B1 (ko) | 2006-09-19 |
US20050266650A1 (en) | 2005-12-01 |
TWI267187B (en) | 2006-11-21 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN1705129A (zh) | 具有形成在电容器上的可流动绝缘层的半导体装置及其制造方法 | |
CN1230878C (zh) | 半导体装置及其制备方法 | |
CN1270352C (zh) | 形成方法以及包含钌和包含钨层的集成电路结构 | |
CN1129171C (zh) | 半导体器件的电容器的形成方法 | |
CN1122306C (zh) | 制造半导体器件电容器的方法 | |
TWI389297B (zh) | 在半導體裝置中之金屬-絕緣體-金屬(mim)電容及其方法 | |
CN1507045A (zh) | 包括金属-绝缘体-金属电容器的集成电路装置和半导体装置 | |
CN1384539A (zh) | 半导体元件的电容器及其制造方法 | |
CN1790674A (zh) | 具有氧化锆的电容器及其制造方法 | |
CN1216403A (zh) | 半导体器件及其生产方法 | |
CN1518100A (zh) | 半导体器件及其制造方法 | |
CN1794456A (zh) | 用于半导体元件的电容器及其制造方法 | |
KR100346294B1 (ko) | 반도체 장치의 제조 방법 | |
JP2004253791A (ja) | 絶縁膜およびそれを用いた半導体装置 | |
CN1409398A (zh) | 强电介质记忆装置及其制造方法 | |
CN1270384C (zh) | 适合形成有涂层的导电膜如铂的半导体器件及其制造方法 | |
CN1200564A (zh) | 半导体器件的制造方法 | |
KR100445077B1 (ko) | 반도체소자의 제조방법 | |
CN1635636A (zh) | 用于将铜与金属-绝缘体-金属电容器结合的方法和结构 | |
CN1266749C (zh) | 半导体器件的制造方法 | |
CN1290196C (zh) | 半导体器件及其制造方法 | |
CN1254866C (zh) | 用于制备半导体装置中的电容器的方法 | |
CN1242483C (zh) | 含有复合式接触栓塞的存储元件与制造方法 | |
CN1457099A (zh) | 堆栈式电容器的结构及其制造方法 | |
CN1349254A (zh) | 具有电容器的半导体存储器件的制造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20080305 Termination date: 20131228 |