CN1606804A - 散热增强的薄倒装引脚铸模封装 - Google Patents

散热增强的薄倒装引脚铸模封装 Download PDF

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CN1606804A
CN1606804A CNA028256220A CN02825622A CN1606804A CN 1606804 A CN1606804 A CN 1606804A CN A028256220 A CNA028256220 A CN A028256220A CN 02825622 A CN02825622 A CN 02825622A CN 1606804 A CN1606804 A CN 1606804A
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semiconductor element
die package
lead structure
semiconductor die
source lead
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CN100336216C (zh
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R·优施
C·-L·吴
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Fairchild Semiconductor Corp
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Abstract

本发明的实施例涉及一种半导体管芯封装。本发明的一个实施例涉及一种半导体管芯封装，它包括(a)半导体管芯，它包括第一表面和第二表面；(b)源极引脚结构，它包括有主表面的突出区，所述源极引脚结构耦合到所述第一表面；(c)栅极引脚结构，它耦合到所述第一表面；以及(d)模塑材料，它在所述源极引脚结构和半导体管芯周围，其中所述模塑材料露出半导体管芯的第二表面和源极引脚结构的主表面。

Description

散热增强的薄倒装引脚铸模封装
相关申请的对照
本申请要求2001年10月22日提交的美国临时专利申请No.60/349260以及2002年1月29日提交的美国临时专利申请No.60/352642的申请日。这两个临时申请都在此全文并入以供参考。
发明背景
有大量的半导体管芯封装。在半导体管芯封装的一个实例中，半导体管芯用引脚装配到引脚框架上。电线将半导体管芯耦合到引脚上。电线、半导体管芯和多数的引脚框架(除了向外伸出的引脚)随后都被密封在模塑材料中。随后，使模塑材料成形。所形成的半导体管芯封装包括模塑主体，它具有从模塑主体横向延伸出的引脚。半导体管芯封装可以安装在电路板上。
虽然这种半导体封装很有用，但可以进行改进。例如，需要降低半导体管芯封装的厚度。由于消费电子产品(例如，蜂窝电话，膝上电脑等)的尺寸继续减小，就更需要更薄的电子器件和电子部件。此外，需要改进半导体管芯封装的散热属性。例如，诸如直立式MOSFET(金属氧化物场效应晶体管)的功率半导体装置可以产生大量的热。对于高输出功率应用(例如，超过60瓦)，需要特殊的封装以除去功率晶体管的热量以防止过热。过热会使功率晶体管的工作特性劣化。
本发明的实施例单独或共同涉及这些和其它问题。
发明概述
本发明的实施例涉及半导体管芯封装。
本发明的一个实施例涉及一种半导体管芯封装，它包括：(a)半导体管芯，它包括第一表面和第二表面；(b)源极引脚结构，它包括有主表面的突出区，所述源极引脚结构耦合到所述第一表面；(c)栅极引脚结构，它耦合到所述第一表面；以及(d)模塑材料，它在所述源极引脚结构和半导体管芯周围，其中所述模塑材料露出半导体管芯的第二表面和源极引脚结构的主表面。
本发明的另一个实施例涉及一种半导体管芯封装，它包括：a)半导体管芯，它包括RF VDMOS晶体管，该晶体管包括源极区、栅极区和漏极区；b)源极引脚结构，它包括具有主表面的突出部分，以及从所述突出部分横向伸出的多个引脚，其中所述源极引脚结构耦合到半导体管芯的源极区；c)栅极引脚结构，它耦合到半导体管芯的栅极区；以及d)模塑材料，它覆盖至少部分源极引脚结构、栅极引脚结构和半导体管芯，其中主表面通过模塑材料露出。
本发明的另一个实施例针对一种用于形成半导体管芯封装的方法，所述方法包括：(a)将包括第一表面和第二表面以及第一表面上的焊料的半导体管芯贴附到引脚框架结构上，所述引脚框架结构包括源极引脚结构和栅极引脚结构，其中源极引脚结构具有含主表面的突出部分；以及(b)模塑半导体管芯与源极和栅极引脚结构周围的模塑材料，其中所述半导体管芯的第二表面和源极引脚结构的主表面通过所述模塑材料露出。
以下将进一步地详细描述本发明的这些和其它实施例。
附图概述
图1示出根据本发明实施例的半导体管芯封装的上部分的透视图。
图2示出根据本发明实施例的半导体管芯封装的下部分的透视图。
图3示出具有焊料突起阵列的半导体管芯。
图4示出包括栅极引脚结构和源极引脚结构的引脚框架结构的顶透视图。
图5示出包括栅极引脚结构和源极引脚结构的引脚框架结构的底透视图。
图6示出安装在包括栅极引脚结构和源极引脚结构的引脚框架结构上的半导体管芯。
图7示出安装在引脚框架结构上的半导体管芯的侧视图。
图8(a)示出包括漏极夹的半导体管芯封装的透视图。
图8(b)示出包括漏极夹的半导体管芯封装的侧视图。
图9(a)示出包括漏极夹的半导体管芯封装的顶视图。
图9(b)示出包括漏极夹的半导体管芯封装的侧视图。
图10(a)示出半导体管芯封装的侧剖视图。
图10(b)示出半导体管芯封装的顶视图，其中的块表示电耦合到半导体管芯封装的匹配网络
某些部件由虚线示出。
具体实施方式
例如，笔记本计算机主板上电源的架构变化需要使被散热的MOSFET漏极(作为接地)以及源极和栅极(在半导体管芯内)处于不同的平面上，而不是使所有三个端子处于同一平面上。笔记本电源设计者的这种改变就需要创建新改进的表面安装封装。
本发明的实施例涉及新改进的半导体管芯封装。在本发明的实施例中，可以将具有焊料突起的半导体管芯翻转并安装在包括源极引脚结构和栅极引脚结构的引脚框架结构上。源极引脚结构可以具有较大的下组(downset)部分和部分蚀刻(例如，半蚀刻)部分。模塑材料可以模塑于源极引脚结构和半导体管芯周围从而半导体管芯的一表面和源极引脚结构的部分蚀刻部分的表面可以通过模塑材料露出。
本发明的实施例具有大量优点。首先根据本发明实施例的半导体管芯封装可以具有较小的轮廓和用于散热的两个主表面。例如，可以通过耦合到半导体管芯第一表面的较大的源极引脚结构以及通过耦合到半导体管芯第二表面的漏极夹将热量转移出半导体管芯。该封装的热阻比标准SOIC(小轮廓集成电路)封装小35％且比FLMP封装(倒装引脚铸模封装)小10-15％。实例性的SOIC和FLMP封装在2002年10月22日提交的美国临时专利申请No.60/349260中进行了描述。其次，本发明的实施例具有较小的轮廓。例如，在本发明的某些实施例中，半导体管芯封装的厚度可以从约0.7到约1.0mm。根据本发明实施例的封装的轮廓比SOIC封装小约40-50％。这比多数的常规半导体管芯封装更薄。由于其较薄的轮廓和良好的热属性，根据本发明实施例的半导体管芯封装可以称作是小轮廓散热增强的倒装引脚铸模封装(TFLMP)。
根据本发明实施例的半导体管芯封装中使用的半导体管芯包括直立式功率晶体管。直立式功率晶体管包括VDMOS晶体管。VDMOS晶体管是具有通过扩散形成的两个或更多半导体区域的MOSFET。它具有源极区、漏极区和栅极。该器件是直立式的，其中源极区和漏极区位于半导体管芯的相对表面处。栅极可以是沟道栅极结构或平面栅极结构，并形成与源极区形成在同一表面上。沟道栅极结构是优选的，因为沟道栅极结构比平面栅极结构更窄并占据较少的空间。在工作期间，VDMOS器件中从源极区到漏极区的电流基本垂直于管芯表面。
图1示出根据本发明实施例的半导体管芯封装100。半导体管芯封装100包括具有主表面101(b)的半导体管芯101，通过模塑材料103该主表面。整个主表面101(b)或主表面101(b)的实质部分可以通过模塑材料103暴露。如图所示，模塑材料103的上表面可以是与半导体管芯101的主表面101(b)共平面的。主表面101(b)可以对应于MOSFET(金属氧化物半导体场效应晶体管)的漏极区，并可以对应于半导体管芯101的第二表面。半导体管芯的另一侧可以是半导体管芯101的第一侧。MOSFET的源极和栅极接触区可以在半导体管芯的第一侧处。
模塑材料103可以包括任意合适的材料。合适的模塑材料包括联苯基材料，以及多官能化交联环氧树脂复合材料。
在半导体管芯封装100中，从模塑材料103侧面延伸出大量源极引脚107(a)-107(c)。各种源极引脚107(a)-107(c)可以是部分由模塑材料103覆盖的源极引脚结构的一部分。栅极引脚105(a)从模塑材料103的侧面延伸出。
大量虚引脚102(a)-102(d)也可以从模塑材料103的侧面延伸出。在该实例中，虚引脚102(a)-102(d)提供对半导体管芯封装100的结构支撑而不与半导体管芯101电连接。在其它实施例中，一个或多个虚引脚102(a)-102(d)可以是源极引脚，从而功能性引脚可以位于半导体管芯封装的两侧上。
图2示出根据本发明实施例的半导体管芯封装100的底视图。半导体管芯封装100包括源极引脚结构107，它包括从源极引脚结构107的中心区域横向延伸出来的大量源极引脚107(a)-107(c)。该中心区由模塑材料103部分覆盖。该中心区包括具有主表面107(d)的突出区，它通过模塑材料103的下表面而露出。主表面107(d)可以与模塑材料103的下表面共平面。
图3示出半导体管芯101上具有焊料突起阵列110的半导体管芯101。一个或多个焊料突起110可以组成栅极焊料突起，且一个或多个焊料突起110可以组成源极焊料突起。半导体管芯101可以包括直立式MOSFET，其源极区和栅极区位于第一表面101(a)而漏极区位于第二主表面101(b)。焊料突起110可以位于第一表面上。
图4示出引脚框架结构的顶透视图，该结构包括源极引脚结构107、栅极引脚结构105和虚引脚结构102。术语“引脚框架结构”可以表示来源于引脚框架的结构。例如，引脚框架可以通过冲压工艺构成(本技术领域内已知的)。引脚框架还可以通过蚀刻连续的传导片形成预定图案来形成。但是，如果使用冲压，则引脚框架原来可以是由连杆连接在一起的引脚框架阵列中的许多引脚框架中的一个。在制造半导体管芯封装的过程期间，可以切割引脚框架阵列以便使该引脚框架和其它引脚框架分开。结果，最终的半导体管芯封装中的部分引脚框架结构，诸如源极引脚和栅极引脚，可以相互电气地和机械地相互分开。因此，在本发明的实施例中，半导体管芯封装中的引脚框架结构可以是连续的金属结构或不连续的金属结构。
源极引脚结构107包括三个源极引脚107(a)-107(c)。栅极引脚结构105具有一个栅极引脚105(a)。源极引脚107(a)-107(c)和栅极引脚105(a)的端子部分可以是共平面的并可以与具有焊料的电路板(未示出)物理耦合和电气耦合。虚引脚结构102具有虚引脚102(a)-102(d)，它们不耦合到源极引脚结构107。但是，在其它实施例中，虚引脚102(a)-102(d)可以耦合到源极引脚结构。
图5示出图4中示出的引脚框架结构的底视图。图5中，更清晰地示出从源极引脚结构的中心区延伸出的突出部分。突出部分190包括主表面107(d)。
在图5所示的实施例中，突出部分190可以通过部分蚀刻(例如，半蚀刻)引脚框架形成。在模塑期间，部分蚀刻的引脚框架允许模塑材料流动。部分蚀刻的区域提供足够的面积以使模塑化合物流动并在模塑后保持装配的管芯封装接触和被保护。可以采用本技术领域内已知的光刻法和蚀刻工艺进行部分蚀刻。例如，可以在引脚框架的所需区域上构成形成图案的光阻材料层。随后，可以(例如，采用湿蚀刻或干蚀刻)将该引脚框架蚀刻到预定深度，从而在某些区域中部分蚀刻该引脚框架。
图6和7示出安装在具有源极引脚107(c)的源极引脚结构107上的半导体管芯101。如图所示，半导体管芯的第一表面101(a)接近于源极引脚结构107，同时半导体管芯101的第二、主表面101(b)与之远离。图6中还示出虚引脚102(d)。图7中示出栅极引脚105(a)。
图8(a)示出根据本发明实施例的半导体管芯封装200。除了图8(a)中示出的半导体管芯封装200包含漏极夹118，该漏极夹118包括交错在多个虚引脚102(a)-102(d)之间的多个漏极引脚118(a)-118(d)，半导体管芯封装200类似于前述半导体管芯封装100。漏极引脚118(a)-118(d)和虚引脚102(a)-102(d)两者都可以安装在电路板上的漏极焊盘上。可使用焊料(未示出)将漏极夹118贴附到半导体管芯的背部上。
图8(b)示出图8(a)所示半导体管芯封装200的侧剖视图。半导体管芯封装200安装在电路基板130上。电路基板130可以是印刷电路板。焊料沉淀(deposit)120、122和128可以分别将源极引脚、源极引脚结构的突出部分和漏极引脚耦合到电路基板130。
图9(a)和9(b)示出根据本发明又一个实施例的半导体管芯封装300。在该实施例中，包括平坦的主部分138(b)和延长部分138(a)的漏极夹138被电耦合到半导体管芯的背部。如图9(b)所示，用焊料133将漏极夹138的延长部分138(a)贴附到电路基板130上。如图9(a)所示，漏极夹138位于源极引脚107(a)-107(c)以及107(d)-107(g)的组之间半导体管芯封装300的对边处。可以使用焊料134将源极引脚结构的突出部分贴附到电路基板130上。还可以使用焊料136将源极引脚107(a)-107(c)贴附到电路基板130上。可以使用焊料132将栅极引脚105(a)耦合到电路基板130上。可采用任何合适的工艺形成焊料突起，包括电镀、球贴附(ballattach)、模板印刷等等。
本发明的实施例还可用于RF VDMOS(垂直扩散金属氧化物半导体)封装中。这种管芯封装可用于RF功率应用中并可以包括功率晶体管。功率晶体管可用于高输出功率应用中(例如，80到100瓦的范围中或更大)。在本发明的某些实施例中，半导体管芯包括可用作RF功率放大器中有源器件的晶体管。这种放大器可以从低于1MHz到2GHz或以上的频率范围内工作。
图10(a)示出实例性实施例的侧剖视图。图10(a)示出RF VDMOS半导体管芯17，它置于具有漏极引脚的漏极夹228和源极引脚结构19之间。虚引脚215也从模塑材料27横向伸出并与漏极夹228的漏极引脚交替。源极引脚结构19将源电流提供给半导体管芯17中的MOSFET内的源极区。
参考图10(b)，具有栅极引脚21的栅极引脚结构将栅电流提供给半导体管芯17中的MOSFET内的栅极区。图10(b)中还示出焊料突起29。
再参考图10(a)，模塑材料27可以密封半导体管芯17。如之前的实施例中所示的，源极引脚结构19突出部分的主表面19(a)可以通过模塑材料27露出。
电介质涂层31可以位于漏极夹228之上。电介质涂层31可以以任何合适的方式采用任何合适的电介质材料形成。例如，电介质涂层31可以包括例如包含聚酰亚胺或苯并环丁烷(BCB)的电介质涂层。当然，类似的或者不同的电介质涂层可以以同样的方式用于任何之前描述的或示出的管芯封装实施例中。再制期间，电介质涂层31可以防止短路或可能的触点情况而不影响半导体管芯封装的散热属性。
如图10(a)所示，匹配网络13耦合到源极引脚结构19。在某些实施例中，匹配网络13可以包括半导体管芯电容器(硅MOS电容器)。这些电容器可以用来调整功率晶体管的输入和/或输出端子。MOS电容器可以用并联小直径电线耦合到晶体管端子从而可以调节电容和电感以特别地使功率晶体管的输入和/或输出信号与放大器电路匹配。匹配网络是现有技术中已知的。
根据本发明实施例的半导体管芯封装可以以任何合适的方式制造。在某些实施例中，可使用倒装晶片技术制造半导体管芯封装。首先，如图3所示，可以在半导体管芯上形成焊料突起阵列。可采用任何合适的工艺形成焊料突起，包括电镀、球贴附、模板糊印刷、拾取-贴装工艺等等。在将焊料沉积到半导体管芯上后，可以进行回流过程。
其次，在用焊料突起形成半导体管芯之前或之后，形成具有较大的下组(downset)(下组可以取决于封装的厚度)以及被部分蚀刻的突出区的引脚框架结构。引脚框架结构的设计可以是半导体管芯的背部和源极引脚结构的主表面通过半导体管芯封装中模塑材料的主外部表面而露出。图4和5中示出常规的引脚框架结构。以上描述了用于形成图4和5中引脚框架结构的过程。
再次，突起的半导体管芯被翻转并安装到引脚框架结构上。可以进行回流过程，且随后通过焊料将半导体管芯、源极引脚结构和栅极引脚结构耦合到一起。这在图6和7中示出。
第四，如图6和7所示的结构可以置于模塑腔内，从而模塑材料可以被模塑于部分半导体管芯、源极引脚结构和栅极引脚结构周围。图1和2示出用模塑材料进行模塑处理后的半导体管芯。
在某些实施例中，可以使用带辅助模塑过程以便在半导体管芯、栅极引脚结构和源极引脚结构周围模塑所述模塑材料。例如，在图6所示的封装前体中，可以对着半导体管芯的背部放置带。随后，可以将该组合置于引入模塑材料的模塑腔中。模塑材料不模塑于半导体管芯、栅极引脚结构和源极引脚结构的周围。将多余的模塑材料从源极引脚结构突出部分的主表面移除。可以采用去碎片(dejunk)和去毛边(deflash)过程来除去多余的模塑材料。可以将带从半导体管芯的背部除去，从而通过模塑的模塑材料露出管芯的背部。
随后，如果需要，可以将漏极夹贴附到半导体管芯的背部上。诸如图8(a)-8(b)所示的漏极夹可以贴附到半导体管芯上。或者，诸如图9(a)-9(b)所示的漏极夹可以贴附到半导体管芯上。漏极夹可以用作散热片。可选地或附加地，可以将分开的散热片贴附到漏极夹上以便于进一步地散热。
在将漏极夹贴附到半导体管芯背部后，所产生的半导体管芯封装可以安装在诸如印刷电路板(PCB)的电路基板上。漏极夹可以连接到半导体管芯中的漏极区。可以延伸漏极夹以便连接到PCB的散热片。这些普通的组件在图8(b)和9(b)中示出。
这里采用的术语和表述用作描述的术语而非限制，且在所示出和所描述特点的排外等效内容的这种术语和表述或其一部分的使用中没有这种意图，可以理解，各种修改可以在所要求的发明范围内。此外，任何实施例的一个或多个特点可以与任何其它特别描述的实施例的一个或多个特点组合而不背离本发明的范围。

Claims (15)

1.一种半导体管芯封装，其特征在于，包括：
(a)半导体管芯，它包括第一表面和第二表面；
(b)源极引脚结构，它包括有主表面的突出区，所述源极引脚结构耦合到所述第一表面；
(c)栅极引脚结构，它耦合到所述第一表面；以及
(d)模塑材料，它在所述源极引脚结构和半导体管芯周围，其中所述模塑材料露出半导体管芯的第二表面和源极引脚结构的主表面。
2.如权利要求1所述的半导体管芯封装，其特征在于，还包括耦合到半导体管芯中的漏极区的漏极夹，所述漏极夹具有多个漏极引脚。
3.如权利要求1所述的半导体管芯封装，其特征在于，所述源极引脚结构包括多个源极引脚，所述多个源极引脚从模塑材料横向延伸出。
4.如权利要求1所述的半导体管芯封装，其特征在于，所述半导体管芯包括第一表面处的源极区和栅极区，以及第二表面处的漏极区，其中所述栅极区是沟道栅极的形式。
5.如权利要求1所述的半导体管芯封装，其特征在于，所述源极引脚结构包括多个源极引脚，所述多个源极引脚从模塑材料横向伸出，其中所述半导体管芯封装进一步包括耦合到半导体管芯的漏极区的漏极夹，所述漏极夹具有与部分源极引脚基本共平面的延长部分。
6.如权利要求1所述的半导体管芯封装，其特征在于，还包括耦合到半导体管芯中的漏极区的漏极夹。
7.如权利要求1所述的半导体管芯封装，其特征在于，还包括耦合到半导体管芯中的漏极区的漏极夹，以及漏极夹上的电介质层。
8.如权利要求1所述的半导体管芯封装，其特征在于，所述半导体管芯包括直立式MOSFET，它包括第一表面处的源极区和栅极区以及第二表面处的漏极区。
9.一种半导体管芯封装，其特征在于，包括：
a)半导体管芯，它包括RF VDMOS晶体管，该晶体管包括源极区、栅极区和漏极区；
b)源极引脚结构，它包括具有主表面的突出部分，以及从所述突出部分横向伸出的多个引脚，其中所述源极引脚结构耦合到半导体管芯的源极区；
c)栅极引脚结构，它耦合到半导体管芯的栅极区；以及
d)模塑材料，它覆盖至少部分源极引脚结构、栅极引脚结构和半导体管芯，
其中所述突出部分的主表面通过模塑材料露出。
10.一种组件，其特征在于，包括：
如权利要求9所述的半导体管芯封装；以及
与源极引脚结构电气耦合的匹配网络。
11.如权利要求9所述的半导体管芯封装，其特征在于，进一步包括耦合到漏极区的漏极夹。
12.如权利要求11所述的半导体管芯封装，其特征在于，进一步包括漏极夹上的电介质层，其中所述电介质层位于相对于半导体管芯的一侧上。
13.如权利要求11所述的半导体管芯封装，其特征在于，进一步包括贴附到漏极夹上的散热片。
14.一种用于形成半导体管芯封装的方法，其特征在于，所述方法包括：
(a)将包括第一表面和第二表面的半导体管芯以及第一表面上的焊料贴附到引脚框架结构上，所述引脚框架结构包括源极引脚结构和栅极引脚结构，其中源极引脚结构具有含主表面的突出部分；以及
(b)模塑半导体管芯与源极和栅极引脚结构周围的模塑材料，其中所述半导体管芯的第二表面和源极引脚结构的主表面通过所述模塑材料露出。
15.如权利要求14所述的方法，其特征在于，所述半导体管芯包括直立式功率MOSFET。
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CN111106088A (zh) * 2018-10-25 2020-05-05 英飞凌科技股份有限公司 具有引线框架互连结构的半导体封装
US11444011B2 (en) 2018-10-25 2022-09-13 Infineon Technologies Ag Semiconductor package with leadframe interconnection structure

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