CN1568543A - 半导体元件 - Google Patents

半导体元件 Download PDF

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CN1568543A
CN1568543A CNA028203259A CN02820325A CN1568543A CN 1568543 A CN1568543 A CN 1568543A CN A028203259 A CNA028203259 A CN A028203259A CN 02820325 A CN02820325 A CN 02820325A CN 1568543 A CN1568543 A CN 1568543A
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lead
electrode terminal
wire
semiconductor element
via pad
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CN1568543B (zh
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小林壮
村松茂次
风间拓也
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Shinko Electric Co Ltd
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Shinko Electric Co Ltd
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Abstract

一种具有电极端子14的半导体元件，所述电极端子14具有在半导体芯片电极的表面上平行排列的矩形平面形状且具有通过覆盖表面电极的电绝缘层表面上的过孔与所述电极端子14电连接的引线布图16，所述半导体元件的特征在于：在电绝缘层的表面上形成的过孔焊盘20的平面排列是通过交替偏向所述电极端子14的纵向的一侧或另一侧形成，以及所述引线布图16与所述过孔焊盘20连接。即使电极端子之间间距微小，本发明能够很容易地形成引线布图。

Description

半导体元件
技术领域
本发明涉及半导体元件，其特征在于半导体芯片上具有引线布图(rerouting pattern)，其中电极端子以微小间距排列。
背景技术
晶片级封装是通过在半导体晶片态下处理晶片的表面以形成引线布图所获得的半导体元件。在晶片级进行预定的工艺后，晶片被分割成独立部分。然后把这些半导体元件安放在母板上或以芯片在芯片上的结构堆叠。
制造这种半导体元件时，在半导体晶片上形成的独立芯片具有从他们的电极端子到形成外部电极的预定位置的互连(称为‘重选路由’)，或所述互连通过用于在母板等上安放的引线焊接实现。
图6示出了这样一种状态，其中半导体晶片10的表面具有电绝缘层12，且电绝缘层12的表面具有通过导通孔15电连接到电极端子14上的引线布图16。例如，引线布图的一端电连接到电极端子14并在另一端形成与外部连接端子或引线焊接的焊接部分焊接的接触部分。在绝缘层12的表面上可以形成任何图形的引线布图16，引线布图16适合从电极端子14引出以排列接触部分或焊接部分。
图5示出了引线布图的传统形成的例子。它示出了电极端子14和引线布图16之间的连接部分的平面排列。在半导体晶片10的表面上以固定间距形成方形电极端子14。在电极端子14的平面内形成导通孔18，在导通孔18内部形成导体层作为过孔。在导通孔18的外围边缘以一定宽度形成过孔焊盘20，从而确保引线布图16和过孔之间的电连接。
然而，进来，半导体芯片的尺寸在缩小而端子的数量在增加，从而带来了问题，即电极端子14之间的排列间距变窄且在相邻过孔焊盘20之间不能获得足够的间距S。在图5的例子中，过孔焊盘20的直径R大于电极端子14的宽度，但当电极端子14之间的排列间距变窄时，可以通过形成更小的导通孔18和减小过孔焊盘20的直径R来确保过孔焊盘20之间的排列间距。然而，形成更小的导通孔18引起工艺精度问题和更高的接触电阻的问题。此外，如果形成更小的过孔焊盘20，降低了它与引线布图16之间电连接的可靠性。
此外，当在引线布图上具有焊接部分并通过引线焊接与母板或其它半导体芯片连接时，必须在半导体芯片的电极端子附近提供焊接部分。此时，当半导体芯片的电极端子的排列间距很窄时，很难确保电极端子附近的足够的焊接部分。
发明内容
本发明的目的是提供一种半导体元件，其特征为：甚至当电极端子以微小间距排列时，能够容易并可靠地形成引线布图而无需降低过孔焊盘的直径或减小布图的宽度，能够确保电极端子附近的焊接部分，以及能够容易地进行通过引线焊接的连接。
为了实现上述目的，如下实现本发明：
即，提供具有电极端子的半导体元件，所述电极端子在半导体芯片的电极形成表面上形成为平行排列的矩形平面形状且具有通过覆盖表面电极的电绝缘层表面上的过通孔与所述电极端子电连接的引线布图，所述半导体元件的特征在于：在电绝缘层的表面上形成的过孔焊盘的平面排列是通过交替偏向所述电极端子的纵向一侧或另一侧形成，以及所述引线布图与所述过孔焊盘连接。
此外，所述元件的特征在于：在所述引线布图的过孔焊盘附近的部分上具有通过形成更宽的引线布图获得且与引线焊接相连的焊接部分。
此外，所述元件的特征在于：通过从过孔焊盘引出所述焊接部分至相邻电极端子的区域而提供所述焊接部分。
此外，提供在覆盖半导体芯片表面的电极端子的电绝缘层的表面上形成的半导体元件，所述半导体芯片具有通过过孔与所述电极端子电连接的引线布图，所述半导体元件的特征在于：在所述引线布图的过孔焊盘附近的部分上具有通过形成更宽的引线布图获得且与引线焊接相连的焊接部分。
此外，所述元件的特征在于：在所述过孔焊盘附近的部分相互错开的位置形成所述焊接部分。
附图说明
图1示出了引线布图上形成的过孔焊盘和电极端子的平面排列；
图2示出了引线布图和焊接部分的平面排列；
图3A和3B示出了引线布图和焊接部分的平面排列的其它例子；
图4示出了安放具有引线布图的半导体芯片的例子；
图5示出了现有技术的电极端子和引线布图的平面排列；
图6为引线布图结构的截面图。
具体实施方式
下面，将参照附图详细说明本发明的优选实施例。
图1为根据本发明在半导体元件中形成引线布图的示例图。在图中，14代表在晶片上形成的电极端子，16代表电连接到电极端子14上的引线布图。本发明的半导体元件的特征在于：电连接到矩形平面形状的电极端子14上且平行排列的过孔焊盘20偏向电极端子14的纵向的一侧或另一侧。
如果半导体芯片更小且电极端子14的排列间距更窄，电极端子的焊接面积就更小，因此需要形成长而窄的矩形电极端子14以确保焊接面积。在本发明的半导体元件中，提供具有矩形电极端子14的半导体芯片，其特征为：即使电极端子14之间的排列间距更窄，以Z字形排列过孔焊盘20可以确保相邻过孔焊盘20之间的间距并能够引线而需要减小过孔焊盘20的直径或减小引线布图16的宽度。
注意，形成电连接到电极端子14上的引线布图16的方法与图6所示形成引线布图16的传统方法类似。即，在半导体晶片10的表面上形成电绝缘层12，然后与电极端子14的排列位置相匹配地形成导通孔18，并在导通孔18的内壁和绝缘层12的表面电镀形成导体层和引线布图16。在本实施例中，因为过孔焊盘20以Z字形结构排列，当在绝缘层12上形成导通孔18时，可在偏向电极端子14的纵向的一侧或另一侧的位置形成导通孔18。
形成导通孔18后，通过溅射在导通孔18的内壁和绝缘层12的表面形成电镀种子层。接着，用光刻胶覆盖电镀种子层的表面，然后曝光并显影光刻胶以形成抗蚀图，其中曝光形成引线布图16和过孔焊盘20的部分。接着，在电镀种子层的曝光位置把电镀种子层作为电镀源层(plating powerlayer)电解电镀铜以形成导体层，然后溶解除去抗蚀图，并蚀刻除去电镀种子层的曝光部分以形成通过过孔电连接到电极端子14上的引线布图16。
注意，所述过程在半导体晶片表面的整个电极上形成了引线布图16。实际的半导体晶片具有大量在垂直方向和水平方向连接的独立的半导体芯片，所以在与这些半导体芯片的排列相对应的预定布图内形成引线布图16。
此外，形成引线布图16后，半导体晶片可以被分割成独立部分以获得具有引线布图16的独立的半导体芯片。
通常，过孔焊盘20的直径比引线布图16的宽度大。因此，如图1所示，如果在平面区域内排列过孔焊盘20的排列部分，其中对每个电极端子而言，电极端子14可偏向一侧或另一侧，可以避免在相邻电极端子14上形成的过孔焊盘20交叠并确保相邻电极端子14之间的额外间距。因此，即使相邻排列过孔焊盘20和引线布图16，可以确保在过孔焊盘20和引线布图16之间具有足够的间距。由此，即使电极端子14之间的排列间距更窄，也很容易形成引线布图16而无需减小过孔焊盘20的直径。
对于形成引线布图的传统方法，如果电极端子14的宽度为80μm且电极端子14之间的排列间距为10μm，即电极端子14的步距为90μm，如果过孔焊盘的直径为80μm且引线布图的宽度为50μm，则过孔焊盘之间的间距为10μm，但是根据本发明的方法，可以确保过孔焊盘和相邻引线布图之间的间距为25μm(图1中的S1)。
注意，在图1所示的实施例中，引线布图16直接从电极端子14引出，但是通过偏离电极端子14的平面区域排列过孔焊盘20，可以在引线布图上形成引线焊接的焊接部分，如图2所示。
图2所示引线布图16的排列的特征为：对于排列在电极端子一侧(前端)的过孔焊盘20a，从过孔焊盘20a引出引线布图16并在相邻电极端子14上边的间距部分直接延伸过孔焊盘20a形成焊接部分22a，对于排列在电极端子另一侧(后端)的过孔焊盘20b，在从过孔焊盘20b引出的布图上直接从过孔焊盘20b形成宽焊接部分22b。
当通过引线焊接电连接引线布图16和另一个半导体芯片或母板(封装)时，引线布图16上形成的焊接部分22a和22b成为引线焊接的焊接部分。图2示出了通过焊接引线32连接另一个半导体芯片或母板(封装)的电极端子30和焊接部分22a和22b的例子。
如果按照本实施例在电极端子14的平面区域偏向一侧或另一侧排列过孔焊盘，可以有效利用绝缘层12的表面空间形成焊接部分22a和22b。
注意，根据本发明，形成用于通过引线焊接连接引线布图的焊接部分的方法也可以用于与上述相同的方式连续排列过孔焊盘的情况。图3A和3B示出了在过孔焊盘的传统排列情况下，在引线布图16上形成焊接部分22的例子。在图3A中，对于一个过孔焊盘20a，直接从后端的过孔焊盘20a延伸出宽焊接部分22a并从焊接部分22a引出窄引线布图16，然而对于另一个过孔焊盘20b，在与焊接部分22a错开的部分在面对引线布图16的方向延伸出焊接部分22b并从焊接部分22b引出窄引线布图16。
此外，在图3B所示的实施例中，对于过孔焊盘20a，在过孔焊盘20a附近的位置在面对过孔焊盘20b的方向从引线布图的侧边缘延伸出焊接部分22a，然而，对于过孔焊盘20b，在与焊接部分22a错开的部分在面对引线布图的方向从过孔焊盘20b引出的引线布图延伸出焊接部分22b。
图3A和3B所示的实施例在过孔焊盘20a和20b附近广泛地形成所述部分以形成焊接部分22a和22b。特别是，在焊接部分22a和22b附近有选择地错开焊接部分22a和22b，可以确保所需的焊接区域和稳定地引线焊接引线布图。
图4示出了安装具有引线布图16的半导体元件40的例子，所述引线布图16具有图2所示的焊接部分22a和22b。在此实例中，在半导体元件40上安放了另一个半导体芯片42并把半导体元件40安放在母板44上。通过凸起42a，利用倒装芯片连接把半导体芯片42电连接到半导体元件40的引线布图16的接触部分16a，同时通过引线焊接把半导体元件40电连接到母板上。
注意，可以代替母板44把半导体元件40安装在另一个半导体芯片上。此外，可以代替母板44把半导体元件40安装在另一个半导体封装上。
通过这种方式，在引线布图16上提供焊接部分22a和22b，可以通过引线焊接把半导体元件电连接到另一个半导体芯片或母板或半导体封装上，并可以提供各种类型的电子装置。
注意，根据过孔焊盘和引线布图的排列，过孔焊盘附近形成的焊接部分可以是相配的图形。过孔焊盘和引线布图的排列并不局限于上述实施例。
工业实用性
如上所述，根据本发明的半导体元件，与电极端子连接的过孔焊盘的平面排列可以是Z字形并可有效地确保排列过孔焊盘和引线布图的间距，以及即使电极端子之间间距微小，可以很容易地形成引线布图。此外，通过在引线布图上形成宽部分来提供焊接部分，显著的效果是可以利用所述部分通过引线焊接电连接引线布图。

Claims (7)

1.一种具有电极端子的半导体元件，所述电极端子具有在半导体芯片的电极形成表面上平行排列的矩形平面形状且具有通过覆盖表面电极的电绝缘层表面上的过孔与所述电极端子电连接的引线布图，所述半导体元件的特征在于：在电绝缘层的表面上形成的过孔焊盘的平面排列是通过有交替偏向所述电极端子的纵向的一侧或另一侧形成，以及所述引线布图与所述过孔焊盘连接。
2.根据权利要求1的半导体元件，其特征在于：在所述引线布图的过孔焊盘附近的部分上，具有通过形成更宽的引线布图获得且与引线焊接相连的焊接部分。
3.根据权利要求2的半导体元件，其特征在于：在相邻电极端子的区域从过孔焊盘引出所述焊接部分。
4.一种半导体元件，所述半导体元件在覆盖半导体芯片的电极端子形成表面的电绝缘层上形成，所述半导体芯片具有通过过孔与所述电极端子电连接的引线布图，所述半导体元件的特征在于：在所述引线布图的过孔焊盘附近的部分上具有通过形成更宽的引线布图获得且与引线焊接相连的焊接部分。
5.根据权利要求4的半导体元件，其特征在于：在所述过孔焊盘附近的部分相互错开的位置形成所述焊接部分。
6.根据权利要求1到5中任何一个的半导体元件，其特征在于：在所述半导体芯片上安装另一个半导体芯片。
7.一种半导体封装，其特征在于：根据权利要求6的半导体元件被安装在母板、另一个半导体芯片或另一个半导体封装中的任何一个上。
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