CN1531075A - 电子装置及其制造方法 - Google Patents

电子装置及其制造方法 Download PDF

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Publication number
CN1531075A
CN1531075A CNA2004100080943A CN200410008094A CN1531075A CN 1531075 A CN1531075 A CN 1531075A CN A2004100080943 A CNA2004100080943 A CN A2004100080943A CN 200410008094 A CN200410008094 A CN 200410008094A CN 1531075 A CN1531075 A CN 1531075A
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chip element
insulation division
electronic installation
liner
substrate
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CN100426495C (zh
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桥元伸晃
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Seiko Epson Corp
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Seiko Epson Corp
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Abstract

一种电子装置，具有：形成配线图案(22)的基板(20)；具有形成衬垫(14)的第1面(12)及其相反侧的第2面(18)，第2面(18)相向于基板(20)装载的芯片零件(10)；形成于衬垫(14)上的比衬垫14更难以氧化的金属层(15)；设置在芯片零件(10)的附近由树脂构成的绝缘部(30)；和配线(34)，从金属层(15)上通过绝缘部(30)后到达配线图案(22)上。

Description

电子装置及其制造方法
技术领域
本发明涉及一种电子装置及其制造方法。
背景技术
在现有COB(Chip On Board)安装中，因进行加热而要求基板具有耐热性，所以不能使用热可塑性基板，也难以使用廉价的基板。另外，因对半导体芯片加热或施加机械的外力，所以难以消除应力产生所导致的不良影响。而且，在适用引线接合的情况下，因对引线的长度有限制，所以不能使用通用基板。或者，即便在适用倒装焊接的情况下，因必需使用对应于半导体芯片的电极排列的专用基板，所以也不能使用通用基板。
发明内容
本发明的目的在于可减少对基板耐热性的要求，并可减少半导体芯片的应力的产生，通用基板的使用成为可能。
(1)根据本发明的电子装置，具有：
形成配线图案的基板；
芯片零件，具有形成衬垫的第1面和与所述第1面相反侧的第2面，所述第2面相向于所述基板装载；
形成于所述衬垫上，比所述衬垫更难以氧化的金属层；
设置在所述芯片零件侧的绝缘部；和
配线，以形成为从所述金属层上通过所述绝缘部上后到达所述配线图案上。
根据本发明，因在衬垫上形成比衬垫更难以氧化的金属层，所以可谋求衬垫与配线良好的电连接。另外，在电连接衬垫与配线图案时，可避免在引线接合或倒装焊接中进行的高温加热。因此，可减少对基板耐热性的要求，并可减少芯片零件的应力的产生。另外，因为可自由地形成配线，所以能使用通用基板。
(2)在该电子装置中，所述绝缘部也可以由树脂构成。
(3)该电子装置中，所述绝缘部可具有从所述芯片零件向外下降的倾斜面。
(4)根据本发明的电子装置的制造方法，包括：
在形成配线图案的基板上，装载具有衬垫的芯片零件，使与形成所述衬垫的第1面相反侧的第2面相向于所述基板；
在所述衬垫上形成比所述衬垫更难以氧化的金属层；
在所述芯片零件的侧面形成绝缘部，及
形成配线，以从所述金属层上通过所述绝缘部上后到达所述配线图案上。
根据本发明，因在衬垫上形成比衬垫更难以氧化的金属层，所以可谋求衬垫与配线良好的电连接。另外，在电连接衬垫与配线图案时，可避免在引线接合或倒装焊接中进行的高温加热。因此，可减少对基板耐热性的要求，并可减少芯片零件的应力的产生。另外，因可自由地形成配线，所以能使用通用基板。
(5)在该电子装置的制造方法中，也可以由包含导电性微粒子的分散液形成所述配线。
(6)在该电子装置的制造方法中，形成所述配线的工序可包括向所述金属层、所述绝缘部及所述配线图案上喷出包含所述导电性微粒子的所述分散液。
(7)在该电子装置的制造方法中，也可以由树脂形成所述绝缘部。
(8)在该电子装置中，也可以形成为所述绝缘部具有从所述芯片零件向外下降的倾斜面。
附图说明
图1是图2的I-I线截面图。
图2是说明涉及本发明实施方式的电子装置的平面图。
图3A-图3C是说明涉及本发明的电子装置的制造方法的图。
图4是说明涉及本发明实施方式的电子装置的变形例的图。
图5是说明涉及本发明实施方式的电子装置的变形例的图。
图6是说明涉及本发明实施方式的电子装置的变形例的图。
图7是说明涉及本发明实施方式的电子装置的变形例的图。
图8是说明涉及本发明实施方式的电子装置的变形例的图。
图9A-图9B是说明图8所示芯片零件的制造方法的图。
图10是说明涉及本发明实施方式的电子装置的变形例的图。
图11是说明涉及本发明实施方式的电子装置的变形例的图。
图12是说明涉及本发明实施方式的电子装置的变形例的图。
图13是说明涉及本发明实施方式的电子装置的变形例的图。
图14是表示安装涉及本实施方式的电子装置的电路基板的图。
图15是表示具有涉及本实施方式的电子装置的电子仪器图。
图16是表示具有涉及本实施方式的电子装置的电子仪器图。
实施方式
下面，参照附图说明本发明的实施方式。
图1是说明涉及本发明实施方式的电子装置图，是图2I-I线截面图。图2是说明涉及本发明实施方式的电子装置的平面图。
电子装置具有芯片零件10。芯片零件10可以是半导体零件(例如半导体芯片)等的主动零件(例如集成电路零件等)。在芯片零件10中也可以形成未图示的集成电路。在芯片零件10是半导体芯片的情况下，可称电子装置为半导体装置。芯片零件10也可以是被动零件(电阻器、电容器、电感线圈等)。
在芯片零件10的第1面12上，形成有多个衬垫14。第1面12可是四边形(例如矩形)。多个衬垫14也可以形成在第1面12的周围部(端部)。例如，可将多个衬垫14沿第1面12的四边排列，也可以沿二边排列。在第1面12的中央部至少配置1个衬垫14例如用Al形成的衬垫14。
在第1面12上可形成至少用1层构成的钝化膜16。钝化膜16是电绝缘膜。钝化膜16也可以仅用不是树脂的材料(例如SiO2或SiN)形成，而且在其上还包含用树脂(例如聚酰亚胺树脂)构成的膜。在钝化膜16上，形成使衬垫14的至少一部分(例如中央部)露出的开口。即，使钝化膜16避开衬垫14的至少中央部而形成。在衬垫14的端部也可以安装钝化膜16。钝化膜16也可以覆盖第1面12的全部周围部。
在衬垫14上形成有金属层15。金属层15也可以由1层形成，也可以由多层形成。金属层15的表面也可以由比衬垫14更难以氧化的材料(例如Au)形成。在由多层构成时，金属层15最好具有由比衬垫14更难以氧化的材料(例如Au)构成的最上层，也可以具有接触衬垫14的层。接触衬垫14的层也可以是防止扩散层(防止设置在其上的材料向芯片零件10的原料(例如硅)扩散的层)。金属层15的一部分也可以搭在钝化膜16上，金属层15的周围也可以在比衬垫14的周围更外侧的位置，也可以在比衬垫14周围更内侧的位置。金属层15的中央部也可以比其周围部低。此时，在金属层15形成凹部。金属层15的凹部的底面，可比钝化膜16搭在衬垫14上的部分的上面低，也可以比其高。金属层15的中央部也可以比其周围部高。金属层15也可以形成凸块状。
在芯片零件10的第2面(与第1面12相反侧的面)18上，不形成电极。第2面18与未图示的集成电路也可以电连接，也可以不连接。在第2面18上可形成钝化膜(电绝缘膜)，也可以不形成。第2面18也可以由半导体(或导体)形成。在芯片零件10的侧面(除第1及第2面12、18的面)，可形成钝化膜(电绝缘膜)，也可以不形成。在芯片零件10的侧面，不形成电极。芯片零件10的侧面也可以由半导体(或导体)形成。
电子装置具有基板20。在基板20上形成配线图案22。配线图案22包含在基板20的一面上露出的露出部24。在露出部24上设置用于芯片零件10与配线图案电连接的配线34。露出部24也可以具有未图示的岸面(宽度比线宽的部分)。
形成配线图案22的基板20可称作配线基板。配线基板也可以是多层基板(含两面基板)。多层基板包含多层(2层或2层以上)的导体模型。此时，配线图案22也可以包含在与露出部24露出的面相反侧的第2面露出的第2露出部26。另外，配线图案22也可以包含内置于基板20内的导体模型28。配线基板也可以是零件内置型配线基板。详细地说，在基板20的内部，在导体模型28上电连接电阻器、电容器、电感线圈等被动零件或集成电路零件等主动零件。或者，通过用高电阻值材料形成导体模型28的一部分，也可以形成电阻器。
在基板20上装载芯片零件10。芯片零件10的第2面18与基板20(详细地说为形成其露出部24的面)相向。粘接层29可介于芯片零件10与基板20之间。粘接层29也可以由粘接剂形成。粘接层29若具有导电性，则能电连接露出部24与芯片零件10的第2面18。另外，粘接层29若具有电绝缘性，则能电绝缘露出部24与芯片零件10的第2面18。粘接层29也可以由包含导电粒子的电绝缘性分散剂形成。
电子装置具有绝缘部30。绝缘部30由具有电绝缘性的材料(例如树脂)形成。绝缘部30也可以用与粘接层29不同的材料形成。绝缘部30设置于芯片零件10的附近。绝缘部30可围绕芯片零件10设置，也可以仅设置于芯片零件10的衬垫14附近。绝缘部30也可以接触芯片零件10的侧面。即，在绝缘部30与芯片零件10之间也可以不形成间隙。在图1所示例中，设置绝缘部30不超过芯片10的高度。绝缘部30的上端也可以与芯片零件10的上面(钝化膜16的表面)是相同的高度。此时，绝缘部30与芯片零件10没有阶差。绝缘部30也可以仅覆盖芯片零件10的侧面中由半导体或导体构成的部分。此时，绝缘部30的上端比钝化膜16的上面还低。
绝缘部30具有从芯片零件10向外下降的倾斜面32。绝缘部30最厚的部分位于最接近芯片零件10的位置，最薄的部分位于离芯片零件10最远的位置。绝缘部30也可以形成于配线图案22(详细地说是其露出部24)的一部分上。
电子装置具有配线34。配线34的一部分形成于金属层15上。因金属层15比衬垫14更难以氧化，所以与在衬垫14上直接形成配线34相比，能得到衬垫14与配线34更好的电连接。在金属层15的周围部搭载于钝化膜16上的情况下，因为金属层15的表面比衬垫14从钝化膜16的露出面宽，所以即使在这点上也可以有更好的电连接。而且，在金属层14的表面凹陷(或突出)的情况下，因为表面比平面时宽，所以可提高电的连接性能。
配线34也可以通过钝化膜16上。配线34通过绝缘部30上。在绝缘部30由树脂形成的情况下，绝缘部30与配线34的密接性比钝化膜16与配线34的密接性高。若芯片零件10(例如其钝化膜16)与绝缘部30的阶差小，则可防止配线34断路。配线34到达配线图案22(详细地说是其露出部24)上形成。即，配线34电连接有衬垫14与配线图案22。
电子装置也可以具有多个外部端子36。外部端子36可设置在配线图案22(例如第2露出部26)上。外部端子36也可以由焊剂材料形成。焊剂材料是具有导电性的金属(例如合金)，是用于使其熔化得到电连接的材料。焊剂材料可以是软焊剂(soft solder)或硬焊剂(hard solder)中的任一种。作为焊剂材料，可使用不含铅的焊锡(下面称为无铅焊锡)。作为无铅焊锡，可使用锡—银(Sn-Ag)类、锡—铋(Sn-Bi)类、锡—锌(Sn-Zn)类、或锡—铜(Sn-Cu)类的合金，在这些合金中尤其还可添加银、铋、锌、铜中的至少一种。
已知具有外部端子36的BGA(Ball Grid Array-球栅阵列)型封装或CSP(Chip Size Package-芯片尺寸封装)等。另外，还已知不设置外部端子36，配线图案22的一部分(例如第2露出部26)变为与外部电连接的LGP(Land Grid Array-面栅阵列)型封装。
电子装置也可以具有密封材料38。密封材料38至少密封配线34与金属层15的电连接部，和配线34与配线图案22的电连接部。密封材料38也密封芯片零件10。
图3A-图3C是说明根据本发明的电子装置的制造方法图。如图3A所示，基板20上装载芯片零件10。在芯片零件10的衬垫14上形成金属层15。在其形成中适用电解电镀或无电解电镀。金属层15至少表面由比构成衬垫14的材料(例如Al)更难以氧化的材料(例如Au)形成。也可以由多层形成金属层15。例如，在衬垫14上由Ni等形成阻挡层，也可以在其上用比衬垫14更难以氧化的材料形成层。因此，该第2面18相向于基板20来装载芯片零件10。也可以使粘接剂介于基板20及芯片零件10之间而形成粘接层29。即，也可以在装载芯片10到基板20后进行金属层15的形成。
如图3B所示，在芯片零件10附近形成绝缘部30。绝缘部30除形成粘接层29的粘接剂外，也可以另外设置材料而形成。绝缘部30也可以由聚酰亚胺树脂、硅变性聚酰亚胺树脂、环氧树脂、硅变性环氧树脂、苯环丁烯(BCB；benzocyclobutene)、聚苯并噁唑(PBO；polybenzoxazole)等树脂形成。绝缘部30可通过液状树脂的封装而形成，也可以通过固定干膜而形成。形成绝缘部30具有从芯片零件10向外下降的倾斜面32。也可以接触芯片零件10的侧面形成绝缘部30。
如图3C所示，形成配线34。配线34从金属层15上通过绝缘部30上后到达配线图案22(例如露出部24)上形成。也可以由包含导电性微粒子的分散液形成配线34。例如，也可以适用喷墨法。详细地说，可向金属层15、绝缘部30及配线图案22(例如露出部24)上喷出包含导电性微粒子的分散液而形成配线34。配线34的形成工序可包含将含有导电性微粒子的分散液干燥后除去分散介质。配线34的形成工序还可包含加热分解覆盖导电性微粒子的涂层材料。配线34的形成工序也可以包含聚合导电性微粒子彼此。导电微粒子也可以是纳粒子。此时可降低分散液的体积电阻率。
如图1所示，可设置密封材料38。密封材料38可以通过传递模塑或封装形成。也可以省略密封材料38。
根据本实施方式，因为金属层15比衬垫14更难以氧化，所以与在衬垫14上直接形成配线34相比，取得衬垫14与配线34更好的电连接。在电连接衬垫14与配线图案22时，可避免在引线接合或表面降低连接中进行的高温加热。因此，可减少对基板20耐热性的要求，并可减少芯片零件10的应力的产生。另外，作为基板20可使用通用基板，并对应于芯片零件10(其衬垫14的排列等)缠绕配线34。此时，对应于芯片零件10的种类，向配线图案22的不同部分连接配线34。
图4-图13是说明根据本发明实施方式的电子装置的变形例的图。
在图4中，绝缘部40的一部分搭在芯片零件10的第1面12(详细地说是钝化膜16)上而形成。绝缘部40的一部分搭在比芯片零件10的衬垫14(金属层15)更靠周围部侧的部分。为了防止金属层15被绝缘部40覆盖，使绝缘部40止于离开金属层15的位置(比衬垫更靠周围侧的位置)。或者，也可以相邻连接金属层15形成绝缘部40。此时配线42不搭在与绝缘部40密接性低的钝化膜16上。在金属层15具有比钝化膜16高的部分的情况下(例如，金属层15的周围部在钝化膜16上的情况或金属层15形成突块形状的情况)，用于形成绝缘部40的材料即便是液状也难以搭载在金属层15上，所以容易使金属层15露出。绝缘部40具有邻接于芯片零件10从第1面12凸起的部分。其它结构对应于与图1所示的电子装置相同的内容。
在图5中，绝缘部44的一部分不搭在芯片零件10的第1面12上而形成。绝缘部44具有邻接于芯片零件10上从第1面12凸起的部分。绝缘部44在与芯片零件10相反侧具有阶梯状的部分。其它结构对应于与图1所示的电子装置相同的内容。
在图6中，绝缘部50与粘接层52形成为一体。粘接层52由与绝缘部50相同材料形成。也可以在基板20及芯片零件10之间设置绝缘性的粘接剂，向基板20及芯片零件10之间施加压力，在芯片零件10的邻近挤出粘接剂，由粘接剂形成绝缘部50及粘接层52。绝缘部50的倾斜面54是凹面(例如，在垂直于第1面12的截面中描绘曲线的凹面)。其另外的结构，与图1所示电子装置相同的内容符合。另外，图6所示的形态也适用于其他的实施方式或变形例。
在图7中，绝缘部60与粘接层62形成为一体。粘接层62由与绝缘部60相同的材料形成。也可以在基板20及芯片零件10之间设置绝缘性的粘接剂，向基板20及芯片零件10之间施加压力，在芯片零件10的邻近挤出粘接剂，由粘接剂形成绝缘部60及粘接层62。绝缘部60的倾斜面是凸面(例如，在垂直于第1面12的截面中描绘曲线的凸面)。其它结构对应于与图1所示的电子装置相同的内容。另外，图7所示的形态也适用于其他的实施方式或变型例。
在图8中，芯片零件70具有从第1面(形成衬垫14的面)72向外下降倾斜的侧面74。因为侧面74倾斜，所以在其上容易设置绝缘部75以具有倾斜的面。芯片零件70也可以包含从与第1面72相反侧的第2面76垂直上升的侧面78。侧面74、78也可以连接。其它结构对应于与图1所示的电子装置相同的内容。另外，图8所示的形态也适用于其他的实施方式或变形例。
侧面74，如图9A所示，也可以在切断晶片(例如半导体晶片)80时形成。详细地说，使用角铣刀等2个切刃成角度连接的刀具(例如切片锯)82，在晶片80上形成具有倾斜面的沟(例如V沟)，由倾斜面形成侧面74。在形成沟后，如图9B所示，也可以由在外周面具有切刃的刀具(例如切片锯)84切断沟的底面。这样，可以形成从第2面76垂直上升的侧面78。
在图10中，芯片零件90的侧面94从第1面(形成衬垫14的面)92向外下降倾斜。侧面94也从与第1面92相反侧的第2面96倾斜。其它结构对应于与图1所示的电子装置相同的内容。另外，图10所示的形态也适用于其他的实施方式或变形例。
在图11中，芯片零件100在其端部具有阶差102。阶差102包含从第1面(形成衬垫14的面)104下降(例如垂直下降)的面；从与第1面104相反侧的第2面106上升(例如垂直上升)的面；和为连接这些面沿横向(例如与第1或第2面104、106平行的方向)延伸的面。其它结构对应于与图1所示的电子装置相同的内容。另外，图11所示的形态也适用于其他的实施方式或变形例。
在图12中，在基板20上，在与装载芯片零件10的面相反侧的面上，装载第2芯片零件110。将第2芯片零件110电连接于配线图案22(详细地说是第2露出部26)。第2芯片零件110的安装形态也可以是倒装焊接及正装焊接之任一种。在倒装焊接中，使第2芯片零件110的电极(突块)与配线图案22相向电连接。在正装焊接中可将引线用于电连接。其它结构对应于与图1所示的电子装置相同的内容。另外，图12所示的形态也适用于其他的实施方式或变形例中。
在图13中，在基板20上，在装载芯片零件10的面上，装载第2芯片零件120。例如，在芯片零件10的上方(或覆盖芯片零件10)配置第2芯片零件120。第2芯片零件120电连接于配线图案22(详细地说是露出部24)。第2芯片零件120的安装形态可以是倒装焊接及正装焊接之任一种。在倒装焊接中使第2芯片零件120的电极(突块)与配线图案22相向电连接。在正装焊接中也可以将引线用于电连接。其它结构对应于与图1所示的电子装置相同的内容。另外，图13所示的形态也适用于其他的实施方式或变形例中。
在图14中表示安装在所述的实施方式中说明的电子装置1的电路基板1000。作为具有该电子装置的电子仪器，在图15中表示笔记本个人电脑2000，在图16中表示移动电话3000。
本发明不只限于所述的实施方式，也可以有各种变形。例如，本发明包含实质上与在实施方式中说明的结构相同的结构(例如，功能、方法及结果相同的结构，或目的及结果相同的结构)。另外，本发明包含替换在实施方式中说明的结构的非本质的部分的结构。另外，本发明包含能取得与实施方式中说明的结构相同作用效果的结构，或能达到相同目的的结构。另外，本发明包含在实施方式中说明的结构中添加公知技术的结构。

Claims (8)

1、一种电子装置，具有：
形成配线图案的基板；
芯片零件，具有形成衬垫的第1面和与所述第1面相反侧的第2面，所述第2面相向于所述基板装载；
形成于所述衬垫上，比所述衬垫更难以氧化的金属层；
设置在所述芯片零件侧的绝缘部；和
配线，形成为以从所述金属层上通过所述绝缘部上后到达所述配线图案上。
2、根据权利要求1所述的电子装置，其特征在于：
所述绝缘部由树脂构成。
3、根据权利要求1或2所述的电子装置，其特征在于：
所述绝缘部具有从所述芯片零件向外下降的倾斜面。
4、一种电子装置的制造方法，包括：
在形成配线图案而成的基板上，装载具有衬垫的芯片零件以便与形成所述衬垫的第1面相反侧的第2面相向于所述基板；
在所述衬垫上，形成比所述衬垫更难以氧化的金属层；
在所述芯片零件的侧面形成绝缘部；和
形成配线，以从所述金属层上通过所述绝缘部上后到达所述配线图案上。
5、根据权利要求4所述的电子装置的制造方法，其特征在于：
由包含导电性微粒子的分散液形成所述配线。
6、根据权利要求5所述的电子装置的制造方法，其特征在于：
形成所述配线的工序包含向所述金属层、所述绝缘部及所述配线图案上喷出包含所述导电性微粒子的所述分散液。
7、根据权利要求4～6中的任意1项所述的电子装置的制造方法，其特征在于：
由树脂形成所述绝缘部。
8、根据权利要求4～6中的任意1项所述的电子装置的制造方法，其特征在于：
形成所述绝缘部，使之具有从所述芯片零件向外下降的倾斜面。
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CN110544674A (zh) * 2018-05-28 2019-12-06 浙江清华柔性电子技术研究院 芯片集成结构

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US20040232540A1 (en) 2004-11-25
US7514350B2 (en) 2009-04-07

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