CN1516897A - 为了改进的焊剂清洗在外壳容器和小硅片之间有较大间隙的高压半导体装置壳体 - Google Patents

为了改进的焊剂清洗在外壳容器和小硅片之间有较大间隙的高压半导体装置壳体 Download PDF

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CN1516897A
CN1516897A CNA028121775A CN02812177A CN1516897A CN 1516897 A CN1516897 A CN 1516897A CN A028121775 A CNA028121775 A CN A028121775A CN 02812177 A CN02812177 A CN 02812177A CN 1516897 A CN1516897 A CN 1516897A
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semiconductor device
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M·斯塔恩丁
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Infineon Science And Technology Americas
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Abstract

示出和叙述了一半导体装置，该装置包括在其一内部接纳一半导体小硅片的一金属容器。金属容器具有形成在其顶部上的一凹槽。该凹槽提供对金属容器的顶部的刚性，以允许容器的壁进一步与小硅片分开，从而提供一大得多的敞开通道，该通道便于在焊接之后易于洗净残留的焊剂。

Description

为了改进的焊剂清洗在外壳容器和小硅片之间 有较大间隙的高压半导体装置壳体
相关申请
本申请是在Martin standing于2001年6月1 8日提交的、标题为“为了改进的焊剂清洗(Flux Flushing)在外壳容器和小硅片之间有较大间隙的高压半导体装置壳体”的美国临时申请No.60/299,048的基础上提出和对其要求优先权。
技术领域
本发明涉及半导体装置，更具体地涉及允许增加该装置的额定电压的倒装晶片类的一半导体装置。
发明背景
装置小型化已导致开发晶片级或接近晶片级半导体装置。这样一种装置包括一容器型连接件，该连接件在它的内部接受一半导体小硅片和通过例如焊接或导电的环氧树脂的一层导电材料连接到小硅片的一电极。容器型连接件包括围绕小硅片的一壁部。该壁与小硅片和它的电极的周边封闭地分开。当使用熔解的焊接剂将这一装置焊接到一板上时，剩余的焊剂沉积在焊接处周围。当为这目的使用不是那些标注为“不清洁”产品的焊剂时，需要从该装置下面清除这些剩余物，以防止该装置形成腐蚀或断电。
图1A-1B和2A-2B示出了已知半导体装置的例子，其中一MOSFET小硅片10容装在一半导体金属容器11内，小硅片具有在它顶面的一漏极9和在它的底表面的源极14和门极(未示出)。从而，如通过焊接或通过一导电粘结剂将漏极9固定到容器11的内表面。容器11的边缘12与小硅片10的周边分开。可选择地，在边缘12和容器11之间可以设置一绝缘环13。源极14的底表面可以与边缘12的凸缘15的底面是共平面的或稍许不大齐平。当该组件被向下焊接到板17上的导电电路时，必须清除焊剂残余物。在容器的边缘12和板之间的一浅间隙16(见图2B)限制了清洗的介质在该装置之下的自由流动的能力。因此，不能易于实现在装置之下的适当清洗。在源电极14和边缘12的内部之间的封闭空间可能妨碍清洗残余焊剂和可能降低能够施加于该组件的电压。
因此，希望一半导体装置便于容易地清洗残留焊剂和施加较高的电压。
发明内容
按照本发明，可以增加小硅片的周边和金属容器的本体之间的间隙，从而可以较容易地去除残留的熔剂。
按照本发明的一半导体装置包括在它的内部接纳一半导体小硅片的一金属容器。该金属容器包括形成在它的顶表面上的一凹槽，这产生了围绕半导体小硅片的一框架。该凹槽增加了容器的顶部的刚性，从而降低了施加在小硅片和小硅片附连材料上的应力。由于容器的边缘的高度增加和所形成的诸漏极触点之间的距离增加。可以实现该装置之下的较有效的清洗。这又产生能在高压下工作的一装置。
从以下参照附图对本发明的叙述中本发明的其它特征和优点将变得显而易见。
附图概述
图1A和1B示出了按照现有技术的半导体装置的俯视图；
图2A是图1A和1B的装置沿着线2A-2A截取的、按箭头方向观察的剖视图；
图2B是图1A和1B的装置沿着线2B-2B截取的、按箭头方向观察的剖视图；
图3是按照本发明的一半导体装置；
图4是图3所示的装置沿着线4-4截取的、按箭头方向观察的剖视图。
具体实施方式
参阅图3，按照本发明的一半导体装置包括金属容器19。金属容器19较佳地由铜形成和可以镀银。金属容器19包括一腹板部分20。腹板部分20在其中形成凹槽21。例如可以通过冲压形成凹槽21。可以用围绕小硅片10的金属容器19的顶部的一半切割留下的部分来代替凹槽21。
现在参阅图4，按照本发明的一半导体装置包括金属容器19。金属容器19由一腹板部分20、周壁22和诸基部23组成。小硅片的漏极9例如由一层焊剂或导电环氧树脂电连接于金属容器19的腹板部分20。在金属容器19的腹板20中形成有凹槽21，该凹槽形成围绕小硅片10的周边的框架21a。可选用地，在框架21a和小硅片10的周边之间可以设置一绝缘环13。
周壁22与小硅片10分开和从金属容器19的腹板部分20的边缘向下延伸。围绕周壁22的底边分开诸基部23，以及诸基部与小硅片10的源极14是共平面的。诸基部23是可电连接于板17上的导电部分(未示出)，从而将漏极电连接于板17上的导电部分(未示出)。在较佳实施例中，诸基部23背离金属容器19的内部延伸，从而与小硅片10分开。但是，诸基部23可以形成为沿着任何方向延伸。例如，诸基部23可以被定向为朝向金属容器的内部的方向或者甚至垂直朝向板17的方向延伸以减小该装置接触底板的面积。
腹板20还包括设置在凹槽21和周壁22之间的边缘部分24。可以延伸边缘部分24以增加源极14和周壁22之间的空间30。在源极14和周壁22之间的距离增加改进了漏电，以及允许该组件使用于高压。同样，空间30的加大允许改进在该组件向下焊接到板17时产生的残余焊剂的清洗工作。能够通过延伸边缘部分24实现空间的增大，这是因为凹槽(或半切割所留下的部分)产生了围绕小硅片的一凸缘，这增加了刚度，否则通过简单地增加腹板的的尺寸是不能增加刚度的。其结果，在腹板部分20中形成的框架具有先前已知容器的刚度，同时提供了围绕该装置的边缘的更加大得多的间隙，这允许更可靠的清除残余焊剂。
虽然相对于它的特定实施例叙述了本发明，对于本领域的那些熟练人员来说许多其它变化和修改以及其它使用将变得很明显。因此，较佳的是本发明不是由在本文中的特定揭示的内容所限定，而是仅由所附权利要求书限定。

Claims (11)

1.一半导体装置，它包括：
一半导体小硅片，它具有在其一第一主要表面上的一第一主电极，在与所述第一主要表面相对的一第二主要表面上的一第二主电极，以及设置在所述第二主要表面上的和与所述第二主电极电绝缘的一控制电极；以及
一金属容器，所述金属容器包括：
电连接于所述第一主电极的一腹板部分，所述腹板部分包括设置在所述小硅片周围的一框架，以及
从所述腹板部分的边缘延伸一周壁，所述周壁与所述小硅片分开。
2.如权利要求1所述的半导体装置，其特征在于，所述周壁包括多个基部，所述诸基部与所述第二主电极是共平面的。
3.如权利要求1所述的半导体装置，其特征在于，所述诸基部背离小硅片延伸。
4.如权利要求1所述的半导体装置，其特征在于，所述半导体小硅片是一MOSFET。
5.如权利要求1所述的半导体装置，其特征在于，所述第一主电极通过一导电环氧树电连接至所述腹板部分。
6.如权利要求1所述的半导体装置，其特征在于，所述第一主电极通过一层焊料电连接至所述腹板部分。
7.如权利要求1所述的半导体装置，其特征在于，金属容器由铜制造。
8.如权利要求7所述的半导体装置，其特征在于，金属容器是镀银的。
9.如权利要求1所述的半导体装置，其特征在于，所述框架是通过冲压在所述金属容器的所述腹板部分中的一凹槽而形成。
10.如权利要求1所述的半导体装置，其特征在于，还包括在所述小硅片的周边和所述框架之间延伸的一绝缘环。
11.如权利要求1所述的半导体装置，其特征在于，用围绕所述第二主电极设置的所述腹板的一半切割留下的部分代替所述框架。
CNB028121775A 2001-06-18 2002-06-14 半导体装置 Expired - Fee Related CN1303683C (zh)

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Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7524701B2 (en) * 2005-04-20 2009-04-28 International Rectifier Corporation Chip-scale package
US7786558B2 (en) * 2005-10-20 2010-08-31 Infineon Technologies Ag Semiconductor component and methods to produce a semiconductor component
US20070215997A1 (en) * 2006-03-17 2007-09-20 Martin Standing Chip-scale package
US7663212B2 (en) 2006-03-21 2010-02-16 Infineon Technologies Ag Electronic component having exposed surfaces
US7541681B2 (en) * 2006-05-04 2009-06-02 Infineon Technologies Ag Interconnection structure, electronic component and method of manufacturing the same
US9536800B2 (en) 2013-12-07 2017-01-03 Fairchild Semiconductor Corporation Packaged semiconductor devices and methods of manufacturing

Family Cites Families (47)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3403438A (en) * 1964-12-02 1968-10-01 Corning Glass Works Process for joining transistor chip to printed circuit
US3871014A (en) * 1969-08-14 1975-03-11 Ibm Flip chip module with non-uniform solder wettable areas on the substrate
US3972062A (en) * 1973-10-04 1976-07-27 Motorola, Inc. Mounting assemblies for a plurality of transistor integrated circuit chips
GB1487945A (en) * 1974-11-20 1977-10-05 Ibm Semiconductor integrated circuit devices
JPS6020943Y2 (ja) * 1979-08-29 1985-06-22 三菱電機株式会社 半導体装置
US4454454A (en) * 1983-05-13 1984-06-12 Motorola, Inc. MOSFET "H" Switch circuit for a DC motor
US4646129A (en) * 1983-09-06 1987-02-24 General Electric Company Hermetic power chip packages
US4604644A (en) * 1985-01-28 1986-08-05 International Business Machines Corporation Solder interconnection structure for joining semiconductor devices to substrates that have improved fatigue life, and process for making
US4839716A (en) * 1987-06-01 1989-06-13 Olin Corporation Semiconductor packaging
JP2984068B2 (ja) * 1991-01-31 1999-11-29 株式会社日立製作所 半導体装置の製造方法
JPH05129516A (ja) 1991-11-01 1993-05-25 Hitachi Ltd 半導体装置
US5311402A (en) * 1992-02-14 1994-05-10 Nec Corporation Semiconductor device package having locating mechanism for properly positioning semiconductor device within package
JP2833326B2 (ja) * 1992-03-03 1998-12-09 松下電器産業株式会社 電子部品実装接続体およびその製造方法
JPH065401A (ja) * 1992-06-23 1994-01-14 Mitsubishi Electric Corp チップ型抵抗素子及び半導体装置
US5583377A (en) * 1992-07-15 1996-12-10 Motorola, Inc. Pad array semiconductor device having a heat sink with die receiving cavity
JPH0637143A (ja) * 1992-07-15 1994-02-10 Toshiba Corp 半導体装置および半導体装置の製造方法
US5394490A (en) * 1992-08-11 1995-02-28 Hitachi, Ltd. Semiconductor device having an optical waveguide interposed in the space between electrode members
US5313366A (en) * 1992-08-12 1994-05-17 International Business Machines Corporation Direct chip attach module (DCAM)
JPH06244231A (ja) * 1993-02-01 1994-09-02 Motorola Inc 気密半導体デバイスおよびその製造方法
US5371404A (en) * 1993-02-04 1994-12-06 Motorola, Inc. Thermally conductive integrated circuit package with radio frequency shielding
JP2795788B2 (ja) * 1993-02-18 1998-09-10 シャープ株式会社 半導体チップの実装方法
US5703405A (en) * 1993-03-15 1997-12-30 Motorola, Inc. Integrated circuit chip formed from processing two opposing surfaces of a wafer
US5510758A (en) * 1993-04-07 1996-04-23 Matsushita Electric Industrial Co., Ltd. Multilayer microstrip wiring board with a semiconductor device mounted thereon via bumps
JP3258764B2 (ja) * 1993-06-01 2002-02-18 三菱電機株式会社 樹脂封止型半導体装置の製造方法ならびに外部引出用電極およびその製造方法
US5397921A (en) * 1993-09-03 1995-03-14 Advanced Semiconductor Assembly Technology Tab grid array
US5455456A (en) * 1993-09-15 1995-10-03 Lsi Logic Corporation Integrated circuit package lid
US5734201A (en) * 1993-11-09 1998-03-31 Motorola, Inc. Low profile semiconductor device with like-sized chip and mounting substrate
US5367435A (en) * 1993-11-16 1994-11-22 International Business Machines Corporation Electronic package structure and method of making same
US5454160A (en) * 1993-12-03 1995-10-03 Ncr Corporation Apparatus and method for stacking integrated circuit devices
JPH07193184A (ja) * 1993-12-27 1995-07-28 Fujitsu Ltd マルチチップモジュールの製造方法及びマルチチップモジュール
US5637922A (en) * 1994-02-07 1997-06-10 General Electric Company Wireless radio frequency power semiconductor devices using high density interconnect
JPH07263618A (ja) 1994-03-24 1995-10-13 Nippondenso Co Ltd 混成集積回路装置
US5578869A (en) * 1994-03-29 1996-11-26 Olin Corporation Components for housing an integrated circuit device
JP3377867B2 (ja) * 1994-08-12 2003-02-17 京セラ株式会社 半導体素子収納用パッケージ
US5886408A (en) * 1994-09-08 1999-03-23 Fujitsu Limited Multi-chip semiconductor device
JP2546192B2 (ja) * 1994-09-30 1996-10-23 日本電気株式会社 フィルムキャリア半導体装置
US5532512A (en) * 1994-10-03 1996-07-02 General Electric Company Direct stacked and flip chip power semiconductor device structures
JP3138159B2 (ja) * 1994-11-22 2001-02-26 シャープ株式会社 半導体装置、半導体装置実装体、及び半導体装置の交換方法
JPH08335653A (ja) * 1995-04-07 1996-12-17 Nitto Denko Corp 半導体装置およびその製法並びに上記半導体装置の製造に用いる半導体装置用テープキャリア
US5655703A (en) * 1995-05-25 1997-08-12 International Business Machines Corporation Solder hierarchy for chip attachment to substrates
US5674785A (en) * 1995-11-27 1997-10-07 Micron Technology, Inc. Method of producing a single piece package for semiconductor die
US5726502A (en) * 1996-04-26 1998-03-10 Motorola, Inc. Bumped semiconductor device with alignment features and method for making the same
US6051888A (en) * 1997-04-07 2000-04-18 Texas Instruments Incorporated Semiconductor package and method for increased thermal dissipation of flip-chip semiconductor package
US6133634A (en) * 1998-08-05 2000-10-17 Fairchild Semiconductor Corporation High performance flip chip package
EP0978871A3 (en) 1998-08-05 2001-12-19 Harris Corporation A low power packaging design
US6624522B2 (en) * 2000-04-04 2003-09-23 International Rectifier Corporation Chip scale surface mounted device and process of manufacture
US6391687B1 (en) * 2000-10-31 2002-05-21 Fairchild Semiconductor Corporation Column ball grid array package

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